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1// SPDX-License-Identifier: GPL-2.0-only2/*3 * Copyright (C) 2023, STMicroelectronics - All Rights Reserved4 */5 6#include <linux/bitfield.h>7#include <linux/bits.h>8#include <linux/device.h>9#include <linux/err.h>10#include <linux/init.h>11#include <linux/io.h>12#include <linux/kernel.h>13#include <linux/module.h>14#include <linux/of.h>15#include <linux/of_platform.h>16#include <linux/platform_device.h>17#include <linux/types.h>18 19#include "stm32_firewall.h"20 21/*22 * ETZPC registers23 */24#define ETZPC_DECPROT 0x1025#define ETZPC_HWCFGR 0x3F026 27/*28 * HWCFGR register29 */30#define ETZPC_HWCFGR_NUM_TZMA GENMASK(7, 0)31#define ETZPC_HWCFGR_NUM_PER_SEC GENMASK(15, 8)32#define ETZPC_HWCFGR_NUM_AHB_SEC GENMASK(23, 16)33#define ETZPC_HWCFGR_CHUNKS1N4 GENMASK(31, 24)34 35/*36 * ETZPC miscellaneous37 */38#define ETZPC_PROT_MASK GENMASK(1, 0)39#define ETZPC_PROT_A7NS 0x340#define ETZPC_DECPROT_SHIFT 141 42#define IDS_PER_DECPROT_REGS 1643 44static int stm32_etzpc_grant_access(struct stm32_firewall_controller *ctrl, u32 firewall_id)45{46 u32 offset, reg_offset, sec_val;47 48 if (firewall_id >= ctrl->max_entries) {49 dev_err(ctrl->dev, "Invalid sys bus ID %u", firewall_id);50 return -EINVAL;51 }52 53 /* Check access configuration, 16 peripherals per register */54 reg_offset = ETZPC_DECPROT + 0x4 * (firewall_id / IDS_PER_DECPROT_REGS);55 offset = (firewall_id % IDS_PER_DECPROT_REGS) << ETZPC_DECPROT_SHIFT;56 57 /* Verify peripheral is non-secure and attributed to cortex A7 */58 sec_val = (readl(ctrl->mmio + reg_offset) >> offset) & ETZPC_PROT_MASK;59 if (sec_val != ETZPC_PROT_A7NS) {60 dev_dbg(ctrl->dev, "Invalid bus configuration: reg_offset %#x, value %d\n",61 reg_offset, sec_val);62 return -EACCES;63 }64 65 return 0;66}67 68static void stm32_etzpc_release_access(struct stm32_firewall_controller *ctrl __maybe_unused,69 u32 firewall_id __maybe_unused)70{71}72 73static int stm32_etzpc_probe(struct platform_device *pdev)74{75 struct stm32_firewall_controller *etzpc_controller;76 struct device_node *np = pdev->dev.of_node;77 u32 nb_per, nb_master;78 struct resource *res;79 void __iomem *mmio;80 int rc;81 82 etzpc_controller = devm_kzalloc(&pdev->dev, sizeof(*etzpc_controller), GFP_KERNEL);83 if (!etzpc_controller)84 return -ENOMEM;85 86 mmio = devm_platform_get_and_ioremap_resource(pdev, 0, &res);87 if (IS_ERR(mmio))88 return PTR_ERR(mmio);89 90 etzpc_controller->dev = &pdev->dev;91 etzpc_controller->mmio = mmio;92 etzpc_controller->name = dev_driver_string(etzpc_controller->dev);93 etzpc_controller->type = STM32_PERIPHERAL_FIREWALL | STM32_MEMORY_FIREWALL;94 etzpc_controller->grant_access = stm32_etzpc_grant_access;95 etzpc_controller->release_access = stm32_etzpc_release_access;96 97 /* Get number of etzpc entries*/98 nb_per = FIELD_GET(ETZPC_HWCFGR_NUM_PER_SEC,99 readl(etzpc_controller->mmio + ETZPC_HWCFGR));100 nb_master = FIELD_GET(ETZPC_HWCFGR_NUM_AHB_SEC,101 readl(etzpc_controller->mmio + ETZPC_HWCFGR));102 etzpc_controller->max_entries = nb_per + nb_master;103 104 platform_set_drvdata(pdev, etzpc_controller);105 106 rc = stm32_firewall_controller_register(etzpc_controller);107 if (rc) {108 dev_err(etzpc_controller->dev, "Couldn't register as a firewall controller: %d",109 rc);110 return rc;111 }112 113 rc = stm32_firewall_populate_bus(etzpc_controller);114 if (rc) {115 dev_err(etzpc_controller->dev, "Couldn't populate ETZPC bus: %d",116 rc);117 return rc;118 }119 120 /* Populate all allowed nodes */121 return of_platform_populate(np, NULL, NULL, &pdev->dev);122}123 124static const struct of_device_id stm32_etzpc_of_match[] = {125 { .compatible = "st,stm32-etzpc" },126 {}127};128MODULE_DEVICE_TABLE(of, stm32_etzpc_of_match);129 130static struct platform_driver stm32_etzpc_driver = {131 .probe = stm32_etzpc_probe,132 .driver = {133 .name = "stm32-etzpc",134 .of_match_table = stm32_etzpc_of_match,135 },136};137module_platform_driver(stm32_etzpc_driver);138 139MODULE_AUTHOR("Gatien Chevallier <gatien.chevallier@foss.st.com>");140MODULE_DESCRIPTION("STMicroelectronics ETZPC driver");141MODULE_LICENSE("GPL");142