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1/* SPDX-License-Identifier: GPL-2.0-only */2/*3 * Copyright (C) 2004 IBM Corporation4 * Copyright (C) 2015 Intel Corporation5 *6 * Authors:7 * Leendert van Doorn <leendert@watson.ibm.com>8 * Dave Safford <safford@watson.ibm.com>9 * Reiner Sailer <sailer@watson.ibm.com>10 * Kylene Hall <kjhall@us.ibm.com>11 *12 * Maintained by: <tpmdd-devel@lists.sourceforge.net>13 *14 * Device driver for TCG/TCPA TPM (trusted platform module).15 * Specifications at www.trustedcomputinggroup.org16 */17 18#ifndef __TPM_H__19#define __TPM_H__20 21#include <linux/module.h>22#include <linux/delay.h>23#include <linux/mutex.h>24#include <linux/sched.h>25#include <linux/platform_device.h>26#include <linux/io.h>27#include <linux/tpm.h>28#include <linux/tpm_eventlog.h>29 30#ifdef CONFIG_X8631#include <asm/cpu_device_id.h>32#endif33 34#define TPM_MINOR 224 /* officially assigned */35#define TPM_BUFSIZE 409636#define TPM_NUM_DEVICES 6553637#define TPM_RETRY 5038 39enum tpm_timeout {40 TPM_TIMEOUT = 5, /* msecs */41 TPM_TIMEOUT_RETRY = 100, /* msecs */42 TPM_TIMEOUT_RANGE_US = 300, /* usecs */43 TPM_TIMEOUT_POLL = 1, /* msecs */44 TPM_TIMEOUT_USECS_MIN = 100, /* usecs */45 TPM_TIMEOUT_USECS_MAX = 500 /* usecs */46};47 48/* TPM addresses */49enum tpm_addr {50 TPM_SUPERIO_ADDR = 0x2E,51 TPM_ADDR = 0x4E,52};53 54#define TPM_WARN_RETRY 0x80055#define TPM_WARN_DOING_SELFTEST 0x80256#define TPM_ERR_DEACTIVATED 0x657#define TPM_ERR_DISABLED 0x758#define TPM_ERR_FAILEDSELFTEST 0x1C59#define TPM_ERR_INVALID_POSTINIT 3860 61#define TPM_TAG_RQU_COMMAND 19362 63/* TPM2 specific constants. */64#define TPM2_SPACE_BUFFER_SIZE 16384 /* 16 kB */65 66struct stclear_flags_t {67 __be16 tag;68 u8 deactivated;69 u8 disableForceClear;70 u8 physicalPresence;71 u8 physicalPresenceLock;72 u8 bGlobalLock;73} __packed;74 75struct tpm1_version {76 u8 major;77 u8 minor;78 u8 rev_major;79 u8 rev_minor;80} __packed;81 82struct tpm1_version2 {83 __be16 tag;84 struct tpm1_version version;85} __packed;86 87struct timeout_t {88 __be32 a;89 __be32 b;90 __be32 c;91 __be32 d;92} __packed;93 94struct duration_t {95 __be32 tpm_short;96 __be32 tpm_medium;97 __be32 tpm_long;98} __packed;99 100struct permanent_flags_t {101 __be16 tag;102 u8 disable;103 u8 ownership;104 u8 deactivated;105 u8 readPubek;106 u8 disableOwnerClear;107 u8 allowMaintenance;108 u8 physicalPresenceLifetimeLock;109 u8 physicalPresenceHWEnable;110 u8 physicalPresenceCMDEnable;111 u8 CEKPUsed;112 u8 TPMpost;113 u8 TPMpostLock;114 u8 FIPS;115 u8 operator;116 u8 enableRevokeEK;117 u8 nvLocked;118 u8 readSRKPub;119 u8 tpmEstablished;120 u8 maintenanceDone;121 u8 disableFullDALogicInfo;122} __packed;123 124typedef union {125 struct permanent_flags_t perm_flags;126 struct stclear_flags_t stclear_flags;127 __u8 owned;128 __be32 num_pcrs;129 struct tpm1_version version1;130 struct tpm1_version2 version2;131 __be32 manufacturer_id;132 struct timeout_t timeout;133 struct duration_t duration;134} cap_t;135 136enum tpm_capabilities {137 TPM_CAP_FLAG = 4,138 TPM_CAP_PROP = 5,139 TPM_CAP_VERSION_1_1 = 0x06,140 TPM_CAP_VERSION_1_2 = 0x1A,141};142 143enum tpm_sub_capabilities {144 TPM_CAP_PROP_PCR = 0x101,145 TPM_CAP_PROP_MANUFACTURER = 0x103,146 TPM_CAP_FLAG_PERM = 0x108,147 TPM_CAP_FLAG_VOL = 0x109,148 TPM_CAP_PROP_OWNER = 0x111,149 TPM_CAP_PROP_TIS_TIMEOUT = 0x115,150 TPM_CAP_PROP_TIS_DURATION = 0x120,151};152 153enum tpm2_pt_props {154 TPM2_PT_NONE = 0x00000000,155 TPM2_PT_GROUP = 0x00000100,156 TPM2_PT_FIXED = TPM2_PT_GROUP * 1,157 TPM2_PT_FAMILY_INDICATOR = TPM2_PT_FIXED + 0,158 TPM2_PT_LEVEL = TPM2_PT_FIXED + 1,159 TPM2_PT_REVISION = TPM2_PT_FIXED + 2,160 TPM2_PT_DAY_OF_YEAR = TPM2_PT_FIXED + 3,161 TPM2_PT_YEAR = TPM2_PT_FIXED + 4,162 TPM2_PT_MANUFACTURER = TPM2_PT_FIXED + 5,163 TPM2_PT_VENDOR_STRING_1 = TPM2_PT_FIXED + 6,164 TPM2_PT_VENDOR_STRING_2 = TPM2_PT_FIXED + 7,165 TPM2_PT_VENDOR_STRING_3 = TPM2_PT_FIXED + 8,166 TPM2_PT_VENDOR_STRING_4 = TPM2_PT_FIXED + 9,167 TPM2_PT_VENDOR_TPM_TYPE = TPM2_PT_FIXED + 10,168 TPM2_PT_FIRMWARE_VERSION_1 = TPM2_PT_FIXED + 11,169 TPM2_PT_FIRMWARE_VERSION_2 = TPM2_PT_FIXED + 12,170 TPM2_PT_INPUT_BUFFER = TPM2_PT_FIXED + 13,171 TPM2_PT_HR_TRANSIENT_MIN = TPM2_PT_FIXED + 14,172 TPM2_PT_HR_PERSISTENT_MIN = TPM2_PT_FIXED + 15,173 TPM2_PT_HR_LOADED_MIN = TPM2_PT_FIXED + 16,174 TPM2_PT_ACTIVE_SESSIONS_MAX = TPM2_PT_FIXED + 17,175 TPM2_PT_PCR_COUNT = TPM2_PT_FIXED + 18,176 TPM2_PT_PCR_SELECT_MIN = TPM2_PT_FIXED + 19,177 TPM2_PT_CONTEXT_GAP_MAX = TPM2_PT_FIXED + 20,178 TPM2_PT_NV_COUNTERS_MAX = TPM2_PT_FIXED + 22,179 TPM2_PT_NV_INDEX_MAX = TPM2_PT_FIXED + 23,180 TPM2_PT_MEMORY = TPM2_PT_FIXED + 24,181 TPM2_PT_CLOCK_UPDATE = TPM2_PT_FIXED + 25,182 TPM2_PT_CONTEXT_HASH = TPM2_PT_FIXED + 26,183 TPM2_PT_CONTEXT_SYM = TPM2_PT_FIXED + 27,184 TPM2_PT_CONTEXT_SYM_SIZE = TPM2_PT_FIXED + 28,185 TPM2_PT_ORDERLY_COUNT = TPM2_PT_FIXED + 29,186 TPM2_PT_MAX_COMMAND_SIZE = TPM2_PT_FIXED + 30,187 TPM2_PT_MAX_RESPONSE_SIZE = TPM2_PT_FIXED + 31,188 TPM2_PT_MAX_DIGEST = TPM2_PT_FIXED + 32,189 TPM2_PT_MAX_OBJECT_CONTEXT = TPM2_PT_FIXED + 33,190 TPM2_PT_MAX_SESSION_CONTEXT = TPM2_PT_FIXED + 34,191 TPM2_PT_PS_FAMILY_INDICATOR = TPM2_PT_FIXED + 35,192 TPM2_PT_PS_LEVEL = TPM2_PT_FIXED + 36,193 TPM2_PT_PS_REVISION = TPM2_PT_FIXED + 37,194 TPM2_PT_PS_DAY_OF_YEAR = TPM2_PT_FIXED + 38,195 TPM2_PT_PS_YEAR = TPM2_PT_FIXED + 39,196 TPM2_PT_SPLIT_MAX = TPM2_PT_FIXED + 40,197 TPM2_PT_TOTAL_COMMANDS = TPM2_PT_FIXED + 41,198 TPM2_PT_LIBRARY_COMMANDS = TPM2_PT_FIXED + 42,199 TPM2_PT_VENDOR_COMMANDS = TPM2_PT_FIXED + 43,200 TPM2_PT_NV_BUFFER_MAX = TPM2_PT_FIXED + 44,201 TPM2_PT_MODES = TPM2_PT_FIXED + 45,202 TPM2_PT_MAX_CAP_BUFFER = TPM2_PT_FIXED + 46,203 TPM2_PT_VAR = TPM2_PT_GROUP * 2,204 TPM2_PT_PERMANENT = TPM2_PT_VAR + 0,205 TPM2_PT_STARTUP_CLEAR = TPM2_PT_VAR + 1,206 TPM2_PT_HR_NV_INDEX = TPM2_PT_VAR + 2,207 TPM2_PT_HR_LOADED = TPM2_PT_VAR + 3,208 TPM2_PT_HR_LOADED_AVAIL = TPM2_PT_VAR + 4,209 TPM2_PT_HR_ACTIVE = TPM2_PT_VAR + 5,210 TPM2_PT_HR_ACTIVE_AVAIL = TPM2_PT_VAR + 6,211 TPM2_PT_HR_TRANSIENT_AVAIL = TPM2_PT_VAR + 7,212 TPM2_PT_HR_PERSISTENT = TPM2_PT_VAR + 8,213 TPM2_PT_HR_PERSISTENT_AVAIL = TPM2_PT_VAR + 9,214 TPM2_PT_NV_COUNTERS = TPM2_PT_VAR + 10,215 TPM2_PT_NV_COUNTERS_AVAIL = TPM2_PT_VAR + 11,216 TPM2_PT_ALGORITHM_SET = TPM2_PT_VAR + 12,217 TPM2_PT_LOADED_CURVES = TPM2_PT_VAR + 13,218 TPM2_PT_LOCKOUT_COUNTER = TPM2_PT_VAR + 14,219 TPM2_PT_MAX_AUTH_FAIL = TPM2_PT_VAR + 15,220 TPM2_PT_LOCKOUT_INTERVAL = TPM2_PT_VAR + 16,221 TPM2_PT_LOCKOUT_RECOVERY = TPM2_PT_VAR + 17,222 TPM2_PT_NV_WRITE_RECOVERY = TPM2_PT_VAR + 18,223 TPM2_PT_AUDIT_COUNTER_0 = TPM2_PT_VAR + 19,224 TPM2_PT_AUDIT_COUNTER_1 = TPM2_PT_VAR + 20,225};226 227/* 128 bytes is an arbitrary cap. This could be as large as TPM_BUFSIZE - 18228 * bytes, but 128 is still a relatively large number of random bytes and229 * anything much bigger causes users of struct tpm_cmd_t to start getting230 * compiler warnings about stack frame size. */231#define TPM_MAX_RNG_DATA 128232 233extern const struct class tpm_class;234extern const struct class tpmrm_class;235extern dev_t tpm_devt;236extern const struct file_operations tpm_fops;237extern const struct file_operations tpmrm_fops;238extern struct idr dev_nums_idr;239 240ssize_t tpm_transmit(struct tpm_chip *chip, u8 *buf, size_t bufsiz);241int tpm_get_timeouts(struct tpm_chip *);242int tpm_auto_startup(struct tpm_chip *chip);243 244int tpm1_pm_suspend(struct tpm_chip *chip, u32 tpm_suspend_pcr);245int tpm1_auto_startup(struct tpm_chip *chip);246int tpm1_do_selftest(struct tpm_chip *chip);247int tpm1_get_timeouts(struct tpm_chip *chip);248unsigned long tpm1_calc_ordinal_duration(struct tpm_chip *chip, u32 ordinal);249int tpm1_pcr_extend(struct tpm_chip *chip, u32 pcr_idx, const u8 *hash,250 const char *log_msg);251int tpm1_pcr_read(struct tpm_chip *chip, u32 pcr_idx, u8 *res_buf);252ssize_t tpm1_getcap(struct tpm_chip *chip, u32 subcap_id, cap_t *cap,253 const char *desc, size_t min_cap_length);254int tpm1_get_random(struct tpm_chip *chip, u8 *out, size_t max);255int tpm1_get_pcr_allocation(struct tpm_chip *chip);256unsigned long tpm_calc_ordinal_duration(struct tpm_chip *chip, u32 ordinal);257int tpm_pm_suspend(struct device *dev);258int tpm_pm_resume(struct device *dev);259int tpm_class_shutdown(struct device *dev);260 261static inline void tpm_msleep(unsigned int delay_msec)262{263 usleep_range((delay_msec * 1000) - TPM_TIMEOUT_RANGE_US,264 delay_msec * 1000);265};266 267int tpm_chip_bootstrap(struct tpm_chip *chip);268int tpm_chip_start(struct tpm_chip *chip);269void tpm_chip_stop(struct tpm_chip *chip);270struct tpm_chip *tpm_find_get_ops(struct tpm_chip *chip);271 272struct tpm_chip *tpm_chip_alloc(struct device *dev,273 const struct tpm_class_ops *ops);274struct tpm_chip *tpmm_chip_alloc(struct device *pdev,275 const struct tpm_class_ops *ops);276int tpm_chip_register(struct tpm_chip *chip);277void tpm_chip_unregister(struct tpm_chip *chip);278 279void tpm_sysfs_add_device(struct tpm_chip *chip);280 281 282#ifdef CONFIG_ACPI283extern void tpm_add_ppi(struct tpm_chip *chip);284#else285static inline void tpm_add_ppi(struct tpm_chip *chip)286{287}288#endif289 290int tpm2_get_timeouts(struct tpm_chip *chip);291int tpm2_pcr_read(struct tpm_chip *chip, u32 pcr_idx,292 struct tpm_digest *digest, u16 *digest_size_ptr);293int tpm2_pcr_extend(struct tpm_chip *chip, u32 pcr_idx,294 struct tpm_digest *digests);295int tpm2_get_random(struct tpm_chip *chip, u8 *dest, size_t max);296ssize_t tpm2_get_tpm_pt(struct tpm_chip *chip, u32 property_id,297 u32 *value, const char *desc);298 299ssize_t tpm2_get_pcr_allocation(struct tpm_chip *chip);300int tpm2_auto_startup(struct tpm_chip *chip);301void tpm2_shutdown(struct tpm_chip *chip, u16 shutdown_type);302unsigned long tpm2_calc_ordinal_duration(struct tpm_chip *chip, u32 ordinal);303int tpm2_probe(struct tpm_chip *chip);304int tpm2_get_cc_attrs_tbl(struct tpm_chip *chip);305int tpm2_find_cc(struct tpm_chip *chip, u32 cc);306int tpm2_init_space(struct tpm_space *space, unsigned int buf_size);307void tpm2_del_space(struct tpm_chip *chip, struct tpm_space *space);308void tpm2_flush_space(struct tpm_chip *chip);309int tpm2_prepare_space(struct tpm_chip *chip, struct tpm_space *space, u8 *cmd,310 size_t cmdsiz);311int tpm2_commit_space(struct tpm_chip *chip, struct tpm_space *space, void *buf,312 size_t *bufsiz);313int tpm_devs_add(struct tpm_chip *chip);314void tpm_devs_remove(struct tpm_chip *chip);315int tpm2_save_context(struct tpm_chip *chip, u32 handle, u8 *buf,316 unsigned int buf_size, unsigned int *offset);317int tpm2_load_context(struct tpm_chip *chip, u8 *buf,318 unsigned int *offset, u32 *handle);319 320void tpm_bios_log_setup(struct tpm_chip *chip);321void tpm_bios_log_teardown(struct tpm_chip *chip);322int tpm_dev_common_init(void);323void tpm_dev_common_exit(void);324 325#ifdef CONFIG_TCG_TPM2_HMAC326int tpm2_sessions_init(struct tpm_chip *chip);327#else328static inline int tpm2_sessions_init(struct tpm_chip *chip)329{330 return 0;331}332#endif333 334#endif335