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1// SPDX-License-Identifier: GPL-2.02/*3 * Copyright 2020 Google Inc.4 *5 * Based on Infineon TPM driver by Peter Huewe.6 *7 * cr50 is a firmware for H1 secure modules that requires special8 * handling for the I2C interface.9 *10 * - Use an interrupt for transaction status instead of hardcoded delays.11 * - Must use write+wait+read read protocol.12 * - All 4 bytes of status register must be read/written at once.13 * - Burst count max is 63 bytes, and burst count behaves slightly differently14 *   than other I2C TPMs.15 * - When reading from FIFO the full burstcnt must be read instead of just16 *   reading header and determining the remainder.17 */18 19#include <linux/acpi.h>20#include <linux/completion.h>21#include <linux/i2c.h>22#include <linux/interrupt.h>23#include <linux/module.h>24#include <linux/pm.h>25#include <linux/slab.h>26#include <linux/wait.h>27 28#include "tpm_tis_core.h"29 30#define TPM_CR50_MAX_BUFSIZE		6431#define TPM_CR50_TIMEOUT_SHORT_MS	2		/* Short timeout during transactions */32#define TPM_CR50_TIMEOUT_NOIRQ_MS	20		/* Timeout for TPM ready without IRQ */33#define TPM_CR50_I2C_DID_VID		0x00281ae0L	/* Device and vendor ID reg value */34#define TPM_TI50_I2C_DID_VID		0x504a6666L	/* Device and vendor ID reg value */35#define TPM_CR50_I2C_MAX_RETRIES	3		/* Max retries due to I2C errors */36#define TPM_CR50_I2C_RETRY_DELAY_LO	55		/* Min usecs between retries on I2C */37#define TPM_CR50_I2C_RETRY_DELAY_HI	65		/* Max usecs between retries on I2C */38 39#define TPM_I2C_ACCESS(l)	(0x0000 | ((l) << 4))40#define TPM_I2C_STS(l)		(0x0001 | ((l) << 4))41#define TPM_I2C_DATA_FIFO(l)	(0x0005 | ((l) << 4))42#define TPM_I2C_DID_VID(l)	(0x0006 | ((l) << 4))43 44/**45 * struct tpm_i2c_cr50_priv_data - Driver private data.46 * @irq:	Irq number used for this chip.47 *		If irq <= 0, then a fixed timeout is used instead of waiting for irq.48 * @tpm_ready:	Struct used by irq handler to signal R/W readiness.49 * @buf:	Buffer used for i2c writes, with i2c address prepended to content.50 *51 * Private driver struct used by kernel threads and interrupt context.52 */53struct tpm_i2c_cr50_priv_data {54	int irq;55	struct completion tpm_ready;56	u8 buf[TPM_CR50_MAX_BUFSIZE];57};58 59/**60 * tpm_cr50_i2c_int_handler() - cr50 interrupt handler.61 * @dummy:	Unused parameter.62 * @tpm_info:	TPM chip information.63 *64 * The cr50 interrupt handler signals waiting threads that the65 * interrupt has been asserted. It does not do any interrupt triggered66 * processing but is instead used to avoid fixed delays.67 *68 * Return:69 *	IRQ_HANDLED signifies irq was handled by this device.70 */71static irqreturn_t tpm_cr50_i2c_int_handler(int dummy, void *tpm_info)72{73	struct tpm_chip *chip = tpm_info;74	struct tpm_i2c_cr50_priv_data *priv = dev_get_drvdata(&chip->dev);75 76	complete(&priv->tpm_ready);77 78	return IRQ_HANDLED;79}80 81/**82 * tpm_cr50_i2c_wait_tpm_ready() - Wait for tpm to signal ready.83 * @chip: A TPM chip.84 *85 * Wait for completion interrupt if available, otherwise use a fixed86 * delay for the TPM to be ready.87 *88 * Return:89 * - 0:		Success.90 * - -errno:	A POSIX error code.91 */92static int tpm_cr50_i2c_wait_tpm_ready(struct tpm_chip *chip)93{94	struct tpm_i2c_cr50_priv_data *priv = dev_get_drvdata(&chip->dev);95 96	/* Use a safe fixed delay if interrupt is not supported */97	if (priv->irq <= 0) {98		msleep(TPM_CR50_TIMEOUT_NOIRQ_MS);99		return 0;100	}101 102	/* Wait for interrupt to indicate TPM is ready to respond */103	if (!wait_for_completion_timeout(&priv->tpm_ready, chip->timeout_a)) {104		dev_warn(&chip->dev, "Timeout waiting for TPM ready\n");105		return -ETIMEDOUT;106	}107 108	return 0;109}110 111/**112 * tpm_cr50_i2c_enable_tpm_irq() - Enable TPM irq.113 * @chip: A TPM chip.114 */115static void tpm_cr50_i2c_enable_tpm_irq(struct tpm_chip *chip)116{117	struct tpm_i2c_cr50_priv_data *priv = dev_get_drvdata(&chip->dev);118 119	if (priv->irq > 0) {120		reinit_completion(&priv->tpm_ready);121		enable_irq(priv->irq);122	}123}124 125/**126 * tpm_cr50_i2c_disable_tpm_irq() - Disable TPM irq.127 * @chip: A TPM chip.128 */129static void tpm_cr50_i2c_disable_tpm_irq(struct tpm_chip *chip)130{131	struct tpm_i2c_cr50_priv_data *priv = dev_get_drvdata(&chip->dev);132 133	if (priv->irq > 0)134		disable_irq(priv->irq);135}136 137/**138 * tpm_cr50_i2c_transfer_message() - Transfer a message over i2c.139 * @dev:	Device information.140 * @adapter:	I2C adapter.141 * @msg:	Message to transfer.142 *143 * Call unlocked i2c transfer routine with the provided parameters and144 * retry in case of bus errors.145 *146 * Return:147 * - 0:		Success.148 * - -errno:	A POSIX error code.149 */150static int tpm_cr50_i2c_transfer_message(struct device *dev,151					 struct i2c_adapter *adapter,152					 struct i2c_msg *msg)153{154	unsigned int try;155	int rc;156 157	for (try = 0; try < TPM_CR50_I2C_MAX_RETRIES; try++) {158		rc = __i2c_transfer(adapter, msg, 1);159		if (rc == 1)160			return 0; /* Successfully transferred the message */161		if (try)162			dev_warn(dev, "i2c transfer failed (attempt %d/%d): %d\n",163				 try + 1, TPM_CR50_I2C_MAX_RETRIES, rc);164		usleep_range(TPM_CR50_I2C_RETRY_DELAY_LO, TPM_CR50_I2C_RETRY_DELAY_HI);165	}166 167	/* No i2c message transferred */168	return -EIO;169}170 171/**172 * tpm_cr50_i2c_read() - Read from TPM register.173 * @chip:	A TPM chip.174 * @addr:	Register address to read from.175 * @buffer:	Read destination, provided by caller.176 * @len:	Number of bytes to read.177 *178 * Sends the register address byte to the TPM, then waits until TPM179 * is ready via interrupt signal or timeout expiration, then 'len'180 * bytes are read from TPM response into the provided 'buffer'.181 *182 * Return:183 * - 0:		Success.184 * - -errno:	A POSIX error code.185 */186static int tpm_cr50_i2c_read(struct tpm_chip *chip, u8 addr, u8 *buffer, size_t len)187{188	struct i2c_client *client = to_i2c_client(chip->dev.parent);189	struct i2c_msg msg_reg_addr = {190		.addr = client->addr,191		.len = 1,192		.buf = &addr193	};194	struct i2c_msg msg_response = {195		.addr = client->addr,196		.flags = I2C_M_RD,197		.len = len,198		.buf = buffer199	};200	int rc;201 202	i2c_lock_bus(client->adapter, I2C_LOCK_SEGMENT);203 204	/* Prepare for completion interrupt */205	tpm_cr50_i2c_enable_tpm_irq(chip);206 207	/* Send the register address byte to the TPM */208	rc = tpm_cr50_i2c_transfer_message(&chip->dev, client->adapter, &msg_reg_addr);209	if (rc < 0)210		goto out;211 212	/* Wait for TPM to be ready with response data */213	rc = tpm_cr50_i2c_wait_tpm_ready(chip);214	if (rc < 0)215		goto out;216 217	/* Read response data from the TPM */218	rc = tpm_cr50_i2c_transfer_message(&chip->dev, client->adapter, &msg_response);219 220out:221	tpm_cr50_i2c_disable_tpm_irq(chip);222	i2c_unlock_bus(client->adapter, I2C_LOCK_SEGMENT);223 224	if (rc < 0)225		return rc;226 227	return 0;228}229 230/**231 * tpm_cr50_i2c_write()- Write to TPM register.232 * @chip:	A TPM chip.233 * @addr:	Register address to write to.234 * @buffer:	Data to write.235 * @len:	Number of bytes to write.236 *237 * The provided address is prepended to the data in 'buffer', the238 * combined address+data is sent to the TPM, then wait for TPM to239 * indicate it is done writing.240 *241 * Return:242 * - 0:		Success.243 * - -errno:	A POSIX error code.244 */245static int tpm_cr50_i2c_write(struct tpm_chip *chip, u8 addr, u8 *buffer,246			      size_t len)247{248	struct tpm_i2c_cr50_priv_data *priv = dev_get_drvdata(&chip->dev);249	struct i2c_client *client = to_i2c_client(chip->dev.parent);250	struct i2c_msg msg = {251		.addr = client->addr,252		.len = len + 1,253		.buf = priv->buf254	};255	int rc;256 257	if (len > TPM_CR50_MAX_BUFSIZE - 1)258		return -EINVAL;259 260	/* Prepend the 'register address' to the buffer */261	priv->buf[0] = addr;262	memcpy(priv->buf + 1, buffer, len);263 264	i2c_lock_bus(client->adapter, I2C_LOCK_SEGMENT);265 266	/* Prepare for completion interrupt */267	tpm_cr50_i2c_enable_tpm_irq(chip);268 269	/* Send write request buffer with address */270	rc = tpm_cr50_i2c_transfer_message(&chip->dev, client->adapter, &msg);271	if (rc < 0)272		goto out;273 274	/* Wait for TPM to be ready, ignore timeout */275	tpm_cr50_i2c_wait_tpm_ready(chip);276 277out:278	tpm_cr50_i2c_disable_tpm_irq(chip);279	i2c_unlock_bus(client->adapter, I2C_LOCK_SEGMENT);280 281	if (rc < 0)282		return rc;283 284	return 0;285}286 287/**288 * tpm_cr50_check_locality() - Verify TPM locality 0 is active.289 * @chip: A TPM chip.290 *291 * Return:292 * - 0:		Success.293 * - -errno:	A POSIX error code.294 */295static int tpm_cr50_check_locality(struct tpm_chip *chip)296{297	u8 mask = TPM_ACCESS_VALID | TPM_ACCESS_ACTIVE_LOCALITY;298	u8 buf;299	int rc;300 301	rc = tpm_cr50_i2c_read(chip, TPM_I2C_ACCESS(0), &buf, sizeof(buf));302	if (rc < 0)303		return rc;304 305	if ((buf & mask) == mask)306		return 0;307 308	return -EIO;309}310 311/**312 * tpm_cr50_release_locality() - Release TPM locality.313 * @chip:	A TPM chip.314 * @force:	Flag to force release if set.315 */316static void tpm_cr50_release_locality(struct tpm_chip *chip, bool force)317{318	u8 mask = TPM_ACCESS_VALID | TPM_ACCESS_REQUEST_PENDING;319	u8 addr = TPM_I2C_ACCESS(0);320	u8 buf;321 322	if (tpm_cr50_i2c_read(chip, addr, &buf, sizeof(buf)) < 0)323		return;324 325	if (force || (buf & mask) == mask) {326		buf = TPM_ACCESS_ACTIVE_LOCALITY;327		tpm_cr50_i2c_write(chip, addr, &buf, sizeof(buf));328	}329}330 331/**332 * tpm_cr50_request_locality() - Request TPM locality 0.333 * @chip: A TPM chip.334 *335 * Return:336 * - 0:		Success.337 * - -errno:	A POSIX error code.338 */339static int tpm_cr50_request_locality(struct tpm_chip *chip)340{341	u8 buf = TPM_ACCESS_REQUEST_USE;342	unsigned long stop;343	int rc;344 345	if (!tpm_cr50_check_locality(chip))346		return 0;347 348	rc = tpm_cr50_i2c_write(chip, TPM_I2C_ACCESS(0), &buf, sizeof(buf));349	if (rc < 0)350		return rc;351 352	stop = jiffies + chip->timeout_a;353	do {354		if (!tpm_cr50_check_locality(chip))355			return 0;356 357		msleep(TPM_CR50_TIMEOUT_SHORT_MS);358	} while (time_before(jiffies, stop));359 360	return -ETIMEDOUT;361}362 363/**364 * tpm_cr50_i2c_tis_status() - Read cr50 tis status.365 * @chip: A TPM chip.366 *367 * cr50 requires all 4 bytes of status register to be read.368 *369 * Return:370 *	TPM status byte.371 */372static u8 tpm_cr50_i2c_tis_status(struct tpm_chip *chip)373{374	u8 buf[4];375 376	if (tpm_cr50_i2c_read(chip, TPM_I2C_STS(0), buf, sizeof(buf)) < 0)377		return 0;378 379	return buf[0];380}381 382/**383 * tpm_cr50_i2c_tis_set_ready() - Set status register to ready.384 * @chip: A TPM chip.385 *386 * cr50 requires all 4 bytes of status register to be written.387 */388static void tpm_cr50_i2c_tis_set_ready(struct tpm_chip *chip)389{390	u8 buf[4] = { TPM_STS_COMMAND_READY };391 392	tpm_cr50_i2c_write(chip, TPM_I2C_STS(0), buf, sizeof(buf));393	msleep(TPM_CR50_TIMEOUT_SHORT_MS);394}395 396/**397 * tpm_cr50_i2c_get_burst_and_status() - Get burst count and status.398 * @chip:	A TPM chip.399 * @mask:	Status mask.400 * @burst:	Return value for burst.401 * @status:	Return value for status.402 *403 * cr50 uses bytes 3:2 of status register for burst count and404 * all 4 bytes must be read.405 *406 * Return:407 * - 0:		Success.408 * - -errno:	A POSIX error code.409 */410static int tpm_cr50_i2c_get_burst_and_status(struct tpm_chip *chip, u8 mask,411					     size_t *burst, u32 *status)412{413	unsigned long stop;414	u8 buf[4];415 416	*status = 0;417 418	/* wait for burstcount */419	stop = jiffies + chip->timeout_b;420 421	do {422		if (tpm_cr50_i2c_read(chip, TPM_I2C_STS(0), buf, sizeof(buf)) < 0) {423			msleep(TPM_CR50_TIMEOUT_SHORT_MS);424			continue;425		}426 427		*status = *buf;428		*burst = le16_to_cpup((__le16 *)(buf + 1));429 430		if ((*status & mask) == mask &&431		    *burst > 0 && *burst <= TPM_CR50_MAX_BUFSIZE - 1)432			return 0;433 434		msleep(TPM_CR50_TIMEOUT_SHORT_MS);435	} while (time_before(jiffies, stop));436 437	dev_err(&chip->dev, "Timeout reading burst and status\n");438	return -ETIMEDOUT;439}440 441/**442 * tpm_cr50_i2c_tis_recv() - TPM reception callback.443 * @chip:	A TPM chip.444 * @buf:	Reception buffer.445 * @buf_len:	Buffer length to read.446 *447 * Return:448 * - >= 0:	Number of read bytes.449 * - -errno:	A POSIX error code.450 */451static int tpm_cr50_i2c_tis_recv(struct tpm_chip *chip, u8 *buf, size_t buf_len)452{453 454	u8 mask = TPM_STS_VALID | TPM_STS_DATA_AVAIL;455	size_t burstcnt, cur, len, expected;456	u8 addr = TPM_I2C_DATA_FIFO(0);457	u32 status;458	int rc;459 460	if (buf_len < TPM_HEADER_SIZE)461		return -EINVAL;462 463	rc = tpm_cr50_i2c_get_burst_and_status(chip, mask, &burstcnt, &status);464	if (rc < 0)465		goto out_err;466 467	if (burstcnt > buf_len || burstcnt < TPM_HEADER_SIZE) {468		dev_err(&chip->dev,469			"Unexpected burstcnt: %zu (max=%zu, min=%d)\n",470			burstcnt, buf_len, TPM_HEADER_SIZE);471		rc = -EIO;472		goto out_err;473	}474 475	/* Read first chunk of burstcnt bytes */476	rc = tpm_cr50_i2c_read(chip, addr, buf, burstcnt);477	if (rc < 0) {478		dev_err(&chip->dev, "Read of first chunk failed\n");479		goto out_err;480	}481 482	/* Determine expected data in the return buffer */483	expected = be32_to_cpup((__be32 *)(buf + 2));484	if (expected > buf_len) {485		dev_err(&chip->dev, "Buffer too small to receive i2c data\n");486		rc = -E2BIG;487		goto out_err;488	}489 490	/* Now read the rest of the data */491	cur = burstcnt;492	while (cur < expected) {493		/* Read updated burst count and check status */494		rc = tpm_cr50_i2c_get_burst_and_status(chip, mask, &burstcnt, &status);495		if (rc < 0)496			goto out_err;497 498		len = min_t(size_t, burstcnt, expected - cur);499		rc = tpm_cr50_i2c_read(chip, addr, buf + cur, len);500		if (rc < 0) {501			dev_err(&chip->dev, "Read failed\n");502			goto out_err;503		}504 505		cur += len;506	}507 508	/* Ensure TPM is done reading data */509	rc = tpm_cr50_i2c_get_burst_and_status(chip, TPM_STS_VALID, &burstcnt, &status);510	if (rc < 0)511		goto out_err;512	if (status & TPM_STS_DATA_AVAIL) {513		dev_err(&chip->dev, "Data still available\n");514		rc = -EIO;515		goto out_err;516	}517 518	tpm_cr50_release_locality(chip, false);519	return cur;520 521out_err:522	/* Abort current transaction if still pending */523	if (tpm_cr50_i2c_tis_status(chip) & TPM_STS_COMMAND_READY)524		tpm_cr50_i2c_tis_set_ready(chip);525 526	tpm_cr50_release_locality(chip, false);527	return rc;528}529 530/**531 * tpm_cr50_i2c_tis_send() - TPM transmission callback.532 * @chip:	A TPM chip.533 * @buf:	Buffer to send.534 * @len:	Buffer length.535 *536 * Return:537 * - 0:		Success.538 * - -errno:	A POSIX error code.539 */540static int tpm_cr50_i2c_tis_send(struct tpm_chip *chip, u8 *buf, size_t len)541{542	size_t burstcnt, limit, sent = 0;543	u8 tpm_go[4] = { TPM_STS_GO };544	unsigned long stop;545	u32 status;546	int rc;547 548	rc = tpm_cr50_request_locality(chip);549	if (rc < 0)550		return rc;551 552	/* Wait until TPM is ready for a command */553	stop = jiffies + chip->timeout_b;554	while (!(tpm_cr50_i2c_tis_status(chip) & TPM_STS_COMMAND_READY)) {555		if (time_after(jiffies, stop)) {556			rc = -ETIMEDOUT;557			goto out_err;558		}559 560		tpm_cr50_i2c_tis_set_ready(chip);561	}562 563	while (len > 0) {564		u8 mask = TPM_STS_VALID;565 566		/* Wait for data if this is not the first chunk */567		if (sent > 0)568			mask |= TPM_STS_DATA_EXPECT;569 570		/* Read burst count and check status */571		rc = tpm_cr50_i2c_get_burst_and_status(chip, mask, &burstcnt, &status);572		if (rc < 0)573			goto out_err;574 575		/*576		 * Use burstcnt - 1 to account for the address byte577		 * that is inserted by tpm_cr50_i2c_write()578		 */579		limit = min_t(size_t, burstcnt - 1, len);580		rc = tpm_cr50_i2c_write(chip, TPM_I2C_DATA_FIFO(0), &buf[sent], limit);581		if (rc < 0) {582			dev_err(&chip->dev, "Write failed\n");583			goto out_err;584		}585 586		sent += limit;587		len -= limit;588	}589 590	/* Ensure TPM is not expecting more data */591	rc = tpm_cr50_i2c_get_burst_and_status(chip, TPM_STS_VALID, &burstcnt, &status);592	if (rc < 0)593		goto out_err;594	if (status & TPM_STS_DATA_EXPECT) {595		dev_err(&chip->dev, "Data still expected\n");596		rc = -EIO;597		goto out_err;598	}599 600	/* Start the TPM command */601	rc = tpm_cr50_i2c_write(chip, TPM_I2C_STS(0), tpm_go,602				sizeof(tpm_go));603	if (rc < 0) {604		dev_err(&chip->dev, "Start command failed\n");605		goto out_err;606	}607	return 0;608 609out_err:610	/* Abort current transaction if still pending */611	if (tpm_cr50_i2c_tis_status(chip) & TPM_STS_COMMAND_READY)612		tpm_cr50_i2c_tis_set_ready(chip);613 614	tpm_cr50_release_locality(chip, false);615	return rc;616}617 618/**619 * tpm_cr50_i2c_req_canceled() - Callback to notify a request cancel.620 * @chip:	A TPM chip.621 * @status:	Status given by the cancel callback.622 *623 * Return:624 *	True if command is ready, False otherwise.625 */626static bool tpm_cr50_i2c_req_canceled(struct tpm_chip *chip, u8 status)627{628	return status == TPM_STS_COMMAND_READY;629}630 631static bool tpm_cr50_i2c_is_firmware_power_managed(struct device *dev)632{633	u8 val;634	int ret;635 636	/* This flag should default true when the device property is not present */637	ret = device_property_read_u8(dev, "firmware-power-managed", &val);638	if (ret)639		return true;640 641	return val;642}643 644static const struct tpm_class_ops cr50_i2c = {645	.flags = TPM_OPS_AUTO_STARTUP,646	.status = &tpm_cr50_i2c_tis_status,647	.recv = &tpm_cr50_i2c_tis_recv,648	.send = &tpm_cr50_i2c_tis_send,649	.cancel = &tpm_cr50_i2c_tis_set_ready,650	.req_complete_mask = TPM_STS_DATA_AVAIL | TPM_STS_VALID,651	.req_complete_val = TPM_STS_DATA_AVAIL | TPM_STS_VALID,652	.req_canceled = &tpm_cr50_i2c_req_canceled,653};654 655#ifdef CONFIG_ACPI656static const struct acpi_device_id cr50_i2c_acpi_id[] = {657	{ "GOOG0005", 0 },658	{}659};660MODULE_DEVICE_TABLE(acpi, cr50_i2c_acpi_id);661#endif662 663#ifdef CONFIG_OF664static const struct of_device_id of_cr50_i2c_match[] = {665	{ .compatible = "google,cr50", },666	{}667};668MODULE_DEVICE_TABLE(of, of_cr50_i2c_match);669#endif670 671/**672 * tpm_cr50_i2c_probe() - Driver probe function.673 * @client:	I2C client information.674 *675 * Return:676 * - 0:		Success.677 * - -errno:	A POSIX error code.678 */679static int tpm_cr50_i2c_probe(struct i2c_client *client)680{681	struct tpm_i2c_cr50_priv_data *priv;682	struct device *dev = &client->dev;683	struct tpm_chip *chip;684	u32 vendor;685	u8 buf[4];686	int rc;687 688	if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))689		return -ENODEV;690 691	chip = tpmm_chip_alloc(dev, &cr50_i2c);692	if (IS_ERR(chip))693		return PTR_ERR(chip);694 695	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);696	if (!priv)697		return -ENOMEM;698 699	/* cr50 is a TPM 2.0 chip */700	chip->flags |= TPM_CHIP_FLAG_TPM2;701	if (tpm_cr50_i2c_is_firmware_power_managed(dev))702		chip->flags |= TPM_CHIP_FLAG_FIRMWARE_POWER_MANAGED;703 704	/* Default timeouts */705	chip->timeout_a = msecs_to_jiffies(TIS_SHORT_TIMEOUT);706	chip->timeout_b = msecs_to_jiffies(TIS_LONG_TIMEOUT);707	chip->timeout_c = msecs_to_jiffies(TIS_SHORT_TIMEOUT);708	chip->timeout_d = msecs_to_jiffies(TIS_SHORT_TIMEOUT);709 710	dev_set_drvdata(&chip->dev, priv);711	init_completion(&priv->tpm_ready);712 713	if (client->irq > 0) {714		rc = devm_request_irq(dev, client->irq, tpm_cr50_i2c_int_handler,715				      IRQF_TRIGGER_FALLING | IRQF_ONESHOT |716				      IRQF_NO_AUTOEN,717				      dev->driver->name, chip);718		if (rc < 0) {719			dev_err(dev, "Failed to probe IRQ %d\n", client->irq);720			return rc;721		}722 723		priv->irq = client->irq;724	} else {725		dev_warn(dev, "No IRQ, will use %ums delay for TPM ready\n",726			 TPM_CR50_TIMEOUT_NOIRQ_MS);727	}728 729	rc = tpm_cr50_request_locality(chip);730	if (rc < 0) {731		dev_err(dev, "Could not request locality\n");732		return rc;733	}734 735	/* Read four bytes from DID_VID register */736	rc = tpm_cr50_i2c_read(chip, TPM_I2C_DID_VID(0), buf, sizeof(buf));737	if (rc < 0) {738		dev_err(dev, "Could not read vendor id\n");739		tpm_cr50_release_locality(chip, true);740		return rc;741	}742 743	vendor = le32_to_cpup((__le32 *)buf);744	if (vendor != TPM_CR50_I2C_DID_VID && vendor != TPM_TI50_I2C_DID_VID) {745		dev_err(dev, "Vendor ID did not match! ID was %08x\n", vendor);746		tpm_cr50_release_locality(chip, true);747		return -ENODEV;748	}749 750	dev_info(dev, "%s TPM 2.0 (i2c 0x%02x irq %d id 0x%x)\n",751		 vendor == TPM_TI50_I2C_DID_VID ? "ti50" : "cr50",752		 client->addr, client->irq, vendor >> 16);753	return tpm_chip_register(chip);754}755 756/**757 * tpm_cr50_i2c_remove() - Driver remove function.758 * @client: I2C client information.759 *760 * Return:761 * - 0:		Success.762 * - -errno:	A POSIX error code.763 */764static void tpm_cr50_i2c_remove(struct i2c_client *client)765{766	struct tpm_chip *chip = i2c_get_clientdata(client);767	struct device *dev = &client->dev;768 769	if (!chip) {770		dev_crit(dev, "Could not get client data at remove, memory corruption ahead\n");771		return;772	}773 774	tpm_chip_unregister(chip);775	tpm_cr50_release_locality(chip, true);776}777 778static SIMPLE_DEV_PM_OPS(cr50_i2c_pm, tpm_pm_suspend, tpm_pm_resume);779 780static struct i2c_driver cr50_i2c_driver = {781	.probe = tpm_cr50_i2c_probe,782	.remove = tpm_cr50_i2c_remove,783	.driver = {784		.name = "cr50_i2c",785		.pm = &cr50_i2c_pm,786		.acpi_match_table = ACPI_PTR(cr50_i2c_acpi_id),787		.of_match_table = of_match_ptr(of_cr50_i2c_match),788	},789};790 791module_i2c_driver(cr50_i2c_driver);792 793MODULE_DESCRIPTION("cr50 TPM I2C Driver");794MODULE_LICENSE("GPL");795