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1/* SPDX-License-Identifier: GPL-2.0+ */2//3// OWL factor clock driver4//5// Copyright (c) 2014 Actions Semi Inc.6// Author: David Liu <liuwei@actions-semi.com>7//8// Copyright (c) 2018 Linaro Ltd.9// Author: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>10 11#ifndef _OWL_FACTOR_H_12#define _OWL_FACTOR_H_13 14#include "owl-common.h"15 16struct clk_factor_table {17 unsigned int val;18 unsigned int mul;19 unsigned int div;20};21 22struct owl_factor_hw {23 u32 reg;24 u8 shift;25 u8 width;26 u8 fct_flags;27 struct clk_factor_table *table;28};29 30struct owl_factor {31 struct owl_factor_hw factor_hw;32 struct owl_clk_common common;33};34 35#define OWL_FACTOR_HW(_reg, _shift, _width, _fct_flags, _table) \36 { \37 .reg = _reg, \38 .shift = _shift, \39 .width = _width, \40 .fct_flags = _fct_flags, \41 .table = _table, \42 }43 44#define OWL_FACTOR(_struct, _name, _parent, _reg, \45 _shift, _width, _table, _fct_flags, _flags) \46 struct owl_factor _struct = { \47 .factor_hw = OWL_FACTOR_HW(_reg, _shift, \48 _width, _fct_flags, _table), \49 .common = { \50 .regmap = NULL, \51 .hw.init = CLK_HW_INIT(_name, \52 _parent, \53 &owl_factor_ops, \54 _flags), \55 }, \56 }57 58#define div_mask(d) ((1 << ((d)->width)) - 1)59 60static inline struct owl_factor *hw_to_owl_factor(const struct clk_hw *hw)61{62 struct owl_clk_common *common = hw_to_owl_clk_common(hw);63 64 return container_of(common, struct owl_factor, common);65}66 67long owl_factor_helper_round_rate(struct owl_clk_common *common,68 const struct owl_factor_hw *factor_hw,69 unsigned long rate,70 unsigned long *parent_rate);71 72unsigned long owl_factor_helper_recalc_rate(struct owl_clk_common *common,73 const struct owl_factor_hw *factor_hw,74 unsigned long parent_rate);75 76int owl_factor_helper_set_rate(const struct owl_clk_common *common,77 const struct owl_factor_hw *factor_hw,78 unsigned long rate,79 unsigned long parent_rate);80 81extern const struct clk_ops owl_factor_ops;82 83#endif /* _OWL_FACTOR_H_ */84