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1/* SPDX-License-Identifier: GPL-2.0-only */2/*3 * Copyright (C) 2020 BAIKAL ELECTRONICS, JSC4 *5 * Baikal-T1 CCU PLL interface driver6 */7#ifndef __CLK_BT1_CCU_PLL_H__8#define __CLK_BT1_CCU_PLL_H__9 10#include <linux/clk-provider.h>11#include <linux/spinlock.h>12#include <linux/regmap.h>13#include <linux/bits.h>14#include <linux/of.h>15 16/*17 * CCU PLL private flags18 * @CCU_PLL_BASIC: Basic PLL required by the kernel as early as possible.19 */20#define CCU_PLL_BASIC BIT(0)21 22/*23 * struct ccu_pll_init_data - CCU PLL initialization data24 * @id: Clock private identifier.25 * @name: Clocks name.26 * @parent_name: Clocks parent name in a fw node.27 * @base: PLL registers base address with respect to the sys_regs base.28 * @sys_regs: Baikal-T1 System Controller registers map.29 * @np: Pointer to the node describing the CCU PLLs.30 * @flags: PLL clock flags.31 * @features: PLL private features.32 */33struct ccu_pll_init_data {34 unsigned int id;35 const char *name;36 const char *parent_name;37 unsigned int base;38 struct regmap *sys_regs;39 struct device_node *np;40 unsigned long flags;41 unsigned long features;42};43 44/*45 * struct ccu_pll - CCU PLL descriptor46 * @hw: clk_hw of the PLL.47 * @id: Clock private identifier.48 * @reg_ctl: PLL control register base.49 * @reg_ctl1: PLL control1 register base.50 * @sys_regs: Baikal-T1 System Controller registers map.51 * @lock: PLL state change spin-lock.52 */53struct ccu_pll {54 struct clk_hw hw;55 unsigned int id;56 unsigned int reg_ctl;57 unsigned int reg_ctl1;58 struct regmap *sys_regs;59 spinlock_t lock;60};61#define to_ccu_pll(_hw) container_of(_hw, struct ccu_pll, hw)62 63static inline struct clk_hw *ccu_pll_get_clk_hw(struct ccu_pll *pll)64{65 return pll ? &pll->hw : NULL;66}67 68struct ccu_pll *ccu_pll_hw_register(const struct ccu_pll_init_data *init);69 70void ccu_pll_hw_unregister(struct ccu_pll *pll);71 72#endif /* __CLK_BT1_CCU_PLL_H__ */73