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1// SPDX-License-Identifier: GPL-2.0-only2/*3 * Copyright (C) 2013 Broadcom Corporation4 * Copyright 2013 Linaro Limited5 */6 7#include "clk-kona.h"8#include "dt-bindings/clock/bcm281xx.h"9 10#define BCM281XX_CCU_COMMON(_name, _ucase_name) \11 KONA_CCU_COMMON(BCM281XX, _name, _ucase_name)12 13/* Root CCU */14 15static struct peri_clk_data frac_1m_data = {16 .gate = HW_SW_GATE(0x214, 16, 0, 1),17 .trig = TRIGGER(0x0e04, 0),18 .div = FRAC_DIVIDER(0x0e00, 0, 22, 16),19 .clocks = CLOCKS("ref_crystal"),20};21 22static struct ccu_data root_ccu_data = {23 BCM281XX_CCU_COMMON(root, ROOT),24 .kona_clks = {25 [BCM281XX_ROOT_CCU_FRAC_1M] =26 KONA_CLK(root, frac_1m, peri),27 [BCM281XX_ROOT_CCU_CLOCK_COUNT] = LAST_KONA_CLK,28 },29};30 31/* AON CCU */32 33static struct peri_clk_data hub_timer_data = {34 .gate = HW_SW_GATE(0x0414, 16, 0, 1),35 .clocks = CLOCKS("bbl_32k",36 "frac_1m",37 "dft_19_5m"),38 .sel = SELECTOR(0x0a10, 0, 2),39 .trig = TRIGGER(0x0a40, 4),40};41 42static struct peri_clk_data pmu_bsc_data = {43 .gate = HW_SW_GATE(0x0418, 16, 0, 1),44 .clocks = CLOCKS("ref_crystal",45 "pmu_bsc_var",46 "bbl_32k"),47 .sel = SELECTOR(0x0a04, 0, 2),48 .div = DIVIDER(0x0a04, 3, 4),49 .trig = TRIGGER(0x0a40, 0),50};51 52static struct peri_clk_data pmu_bsc_var_data = {53 .clocks = CLOCKS("var_312m",54 "ref_312m"),55 .sel = SELECTOR(0x0a00, 0, 2),56 .div = DIVIDER(0x0a00, 4, 5),57 .trig = TRIGGER(0x0a40, 2),58};59 60static struct ccu_data aon_ccu_data = {61 BCM281XX_CCU_COMMON(aon, AON),62 .kona_clks = {63 [BCM281XX_AON_CCU_HUB_TIMER] =64 KONA_CLK(aon, hub_timer, peri),65 [BCM281XX_AON_CCU_PMU_BSC] =66 KONA_CLK(aon, pmu_bsc, peri),67 [BCM281XX_AON_CCU_PMU_BSC_VAR] =68 KONA_CLK(aon, pmu_bsc_var, peri),69 [BCM281XX_AON_CCU_CLOCK_COUNT] = LAST_KONA_CLK,70 },71};72 73/* Hub CCU */74 75static struct peri_clk_data tmon_1m_data = {76 .gate = HW_SW_GATE(0x04a4, 18, 2, 3),77 .clocks = CLOCKS("ref_crystal",78 "frac_1m"),79 .sel = SELECTOR(0x0e74, 0, 2),80 .trig = TRIGGER(0x0e84, 1),81};82 83static struct ccu_data hub_ccu_data = {84 BCM281XX_CCU_COMMON(hub, HUB),85 .kona_clks = {86 [BCM281XX_HUB_CCU_TMON_1M] =87 KONA_CLK(hub, tmon_1m, peri),88 [BCM281XX_HUB_CCU_CLOCK_COUNT] = LAST_KONA_CLK,89 },90};91 92/* Master CCU */93 94static struct peri_clk_data sdio1_data = {95 .gate = HW_SW_GATE(0x0358, 18, 2, 3),96 .clocks = CLOCKS("ref_crystal",97 "var_52m",98 "ref_52m",99 "var_96m",100 "ref_96m"),101 .sel = SELECTOR(0x0a28, 0, 3),102 .div = DIVIDER(0x0a28, 4, 14),103 .trig = TRIGGER(0x0afc, 9),104};105 106static struct peri_clk_data sdio2_data = {107 .gate = HW_SW_GATE(0x035c, 18, 2, 3),108 .clocks = CLOCKS("ref_crystal",109 "var_52m",110 "ref_52m",111 "var_96m",112 "ref_96m"),113 .sel = SELECTOR(0x0a2c, 0, 3),114 .div = DIVIDER(0x0a2c, 4, 14),115 .trig = TRIGGER(0x0afc, 10),116};117 118static struct peri_clk_data sdio3_data = {119 .gate = HW_SW_GATE(0x0364, 18, 2, 3),120 .clocks = CLOCKS("ref_crystal",121 "var_52m",122 "ref_52m",123 "var_96m",124 "ref_96m"),125 .sel = SELECTOR(0x0a34, 0, 3),126 .div = DIVIDER(0x0a34, 4, 14),127 .trig = TRIGGER(0x0afc, 12),128};129 130static struct peri_clk_data sdio4_data = {131 .gate = HW_SW_GATE(0x0360, 18, 2, 3),132 .clocks = CLOCKS("ref_crystal",133 "var_52m",134 "ref_52m",135 "var_96m",136 "ref_96m"),137 .sel = SELECTOR(0x0a30, 0, 3),138 .div = DIVIDER(0x0a30, 4, 14),139 .trig = TRIGGER(0x0afc, 11),140};141 142static struct peri_clk_data usb_ic_data = {143 .gate = HW_SW_GATE(0x0354, 18, 2, 3),144 .clocks = CLOCKS("ref_crystal",145 "var_96m",146 "ref_96m"),147 .div = FIXED_DIVIDER(2),148 .sel = SELECTOR(0x0a24, 0, 2),149 .trig = TRIGGER(0x0afc, 7),150};151 152/* also called usbh_48m */153static struct peri_clk_data hsic2_48m_data = {154 .gate = HW_SW_GATE(0x0370, 18, 2, 3),155 .clocks = CLOCKS("ref_crystal",156 "var_96m",157 "ref_96m"),158 .sel = SELECTOR(0x0a38, 0, 2),159 .div = FIXED_DIVIDER(2),160 .trig = TRIGGER(0x0afc, 5),161};162 163/* also called usbh_12m */164static struct peri_clk_data hsic2_12m_data = {165 .gate = HW_SW_GATE(0x0370, 20, 4, 5),166 .div = DIVIDER(0x0a38, 12, 2),167 .clocks = CLOCKS("ref_crystal",168 "var_96m",169 "ref_96m"),170 .pre_div = FIXED_DIVIDER(2),171 .sel = SELECTOR(0x0a38, 0, 2),172 .trig = TRIGGER(0x0afc, 5),173};174 175static struct ccu_data master_ccu_data = {176 BCM281XX_CCU_COMMON(master, MASTER),177 .kona_clks = {178 [BCM281XX_MASTER_CCU_SDIO1] =179 KONA_CLK(master, sdio1, peri),180 [BCM281XX_MASTER_CCU_SDIO2] =181 KONA_CLK(master, sdio2, peri),182 [BCM281XX_MASTER_CCU_SDIO3] =183 KONA_CLK(master, sdio3, peri),184 [BCM281XX_MASTER_CCU_SDIO4] =185 KONA_CLK(master, sdio4, peri),186 [BCM281XX_MASTER_CCU_USB_IC] =187 KONA_CLK(master, usb_ic, peri),188 [BCM281XX_MASTER_CCU_HSIC2_48M] =189 KONA_CLK(master, hsic2_48m, peri),190 [BCM281XX_MASTER_CCU_HSIC2_12M] =191 KONA_CLK(master, hsic2_12m, peri),192 [BCM281XX_MASTER_CCU_CLOCK_COUNT] = LAST_KONA_CLK,193 },194};195 196/* Slave CCU */197 198static struct peri_clk_data uartb_data = {199 .gate = HW_SW_GATE(0x0400, 18, 2, 3),200 .clocks = CLOCKS("ref_crystal",201 "var_156m",202 "ref_156m"),203 .sel = SELECTOR(0x0a10, 0, 2),204 .div = FRAC_DIVIDER(0x0a10, 4, 12, 8),205 .trig = TRIGGER(0x0afc, 2),206};207 208static struct peri_clk_data uartb2_data = {209 .gate = HW_SW_GATE(0x0404, 18, 2, 3),210 .clocks = CLOCKS("ref_crystal",211 "var_156m",212 "ref_156m"),213 .sel = SELECTOR(0x0a14, 0, 2),214 .div = FRAC_DIVIDER(0x0a14, 4, 12, 8),215 .trig = TRIGGER(0x0afc, 3),216};217 218static struct peri_clk_data uartb3_data = {219 .gate = HW_SW_GATE(0x0408, 18, 2, 3),220 .clocks = CLOCKS("ref_crystal",221 "var_156m",222 "ref_156m"),223 .sel = SELECTOR(0x0a18, 0, 2),224 .div = FRAC_DIVIDER(0x0a18, 4, 12, 8),225 .trig = TRIGGER(0x0afc, 4),226};227 228static struct peri_clk_data uartb4_data = {229 .gate = HW_SW_GATE(0x0408, 18, 2, 3),230 .clocks = CLOCKS("ref_crystal",231 "var_156m",232 "ref_156m"),233 .sel = SELECTOR(0x0a1c, 0, 2),234 .div = FRAC_DIVIDER(0x0a1c, 4, 12, 8),235 .trig = TRIGGER(0x0afc, 5),236};237 238static struct peri_clk_data ssp0_data = {239 .gate = HW_SW_GATE(0x0410, 18, 2, 3),240 .clocks = CLOCKS("ref_crystal",241 "var_104m",242 "ref_104m",243 "var_96m",244 "ref_96m"),245 .sel = SELECTOR(0x0a20, 0, 3),246 .div = DIVIDER(0x0a20, 4, 14),247 .trig = TRIGGER(0x0afc, 6),248};249 250static struct peri_clk_data ssp2_data = {251 .gate = HW_SW_GATE(0x0418, 18, 2, 3),252 .clocks = CLOCKS("ref_crystal",253 "var_104m",254 "ref_104m",255 "var_96m",256 "ref_96m"),257 .sel = SELECTOR(0x0a28, 0, 3),258 .div = DIVIDER(0x0a28, 4, 14),259 .trig = TRIGGER(0x0afc, 8),260};261 262static struct peri_clk_data bsc1_data = {263 .gate = HW_SW_GATE(0x0458, 18, 2, 3),264 .clocks = CLOCKS("ref_crystal",265 "var_104m",266 "ref_104m",267 "var_13m",268 "ref_13m"),269 .sel = SELECTOR(0x0a64, 0, 3),270 .trig = TRIGGER(0x0afc, 23),271};272 273static struct peri_clk_data bsc2_data = {274 .gate = HW_SW_GATE(0x045c, 18, 2, 3),275 .clocks = CLOCKS("ref_crystal",276 "var_104m",277 "ref_104m",278 "var_13m",279 "ref_13m"),280 .sel = SELECTOR(0x0a68, 0, 3),281 .trig = TRIGGER(0x0afc, 24),282};283 284static struct peri_clk_data bsc3_data = {285 .gate = HW_SW_GATE(0x0484, 18, 2, 3),286 .clocks = CLOCKS("ref_crystal",287 "var_104m",288 "ref_104m",289 "var_13m",290 "ref_13m"),291 .sel = SELECTOR(0x0a84, 0, 3),292 .trig = TRIGGER(0x0b00, 2),293};294 295static struct peri_clk_data pwm_data = {296 .gate = HW_SW_GATE(0x0468, 18, 2, 3),297 .clocks = CLOCKS("ref_crystal",298 "var_104m"),299 .sel = SELECTOR(0x0a70, 0, 2),300 .div = DIVIDER(0x0a70, 4, 3),301 .trig = TRIGGER(0x0afc, 15),302};303 304static struct ccu_data slave_ccu_data = {305 BCM281XX_CCU_COMMON(slave, SLAVE),306 .kona_clks = {307 [BCM281XX_SLAVE_CCU_UARTB] =308 KONA_CLK(slave, uartb, peri),309 [BCM281XX_SLAVE_CCU_UARTB2] =310 KONA_CLK(slave, uartb2, peri),311 [BCM281XX_SLAVE_CCU_UARTB3] =312 KONA_CLK(slave, uartb3, peri),313 [BCM281XX_SLAVE_CCU_UARTB4] =314 KONA_CLK(slave, uartb4, peri),315 [BCM281XX_SLAVE_CCU_SSP0] =316 KONA_CLK(slave, ssp0, peri),317 [BCM281XX_SLAVE_CCU_SSP2] =318 KONA_CLK(slave, ssp2, peri),319 [BCM281XX_SLAVE_CCU_BSC1] =320 KONA_CLK(slave, bsc1, peri),321 [BCM281XX_SLAVE_CCU_BSC2] =322 KONA_CLK(slave, bsc2, peri),323 [BCM281XX_SLAVE_CCU_BSC3] =324 KONA_CLK(slave, bsc3, peri),325 [BCM281XX_SLAVE_CCU_PWM] =326 KONA_CLK(slave, pwm, peri),327 [BCM281XX_SLAVE_CCU_CLOCK_COUNT] = LAST_KONA_CLK,328 },329};330 331/* Device tree match table callback functions */332 333static void __init kona_dt_root_ccu_setup(struct device_node *node)334{335 kona_dt_ccu_setup(&root_ccu_data, node);336}337 338static void __init kona_dt_aon_ccu_setup(struct device_node *node)339{340 kona_dt_ccu_setup(&aon_ccu_data, node);341}342 343static void __init kona_dt_hub_ccu_setup(struct device_node *node)344{345 kona_dt_ccu_setup(&hub_ccu_data, node);346}347 348static void __init kona_dt_master_ccu_setup(struct device_node *node)349{350 kona_dt_ccu_setup(&master_ccu_data, node);351}352 353static void __init kona_dt_slave_ccu_setup(struct device_node *node)354{355 kona_dt_ccu_setup(&slave_ccu_data, node);356}357 358CLK_OF_DECLARE(bcm281xx_root_ccu, BCM281XX_DT_ROOT_CCU_COMPAT,359 kona_dt_root_ccu_setup);360CLK_OF_DECLARE(bcm281xx_aon_ccu, BCM281XX_DT_AON_CCU_COMPAT,361 kona_dt_aon_ccu_setup);362CLK_OF_DECLARE(bcm281xx_hub_ccu, BCM281XX_DT_HUB_CCU_COMPAT,363 kona_dt_hub_ccu_setup);364CLK_OF_DECLARE(bcm281xx_master_ccu, BCM281XX_DT_MASTER_CCU_COMPAT,365 kona_dt_master_ccu_setup);366CLK_OF_DECLARE(bcm281xx_slave_ccu, BCM281XX_DT_SLAVE_CCU_COMPAT,367 kona_dt_slave_ccu_setup);368