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1# SPDX-License-Identifier: GPL-2.0-only2config COMMON_CLK_HI3516CV3003 tristate "HI3516CV300 Clock Driver"4 depends on ARCH_HISI || COMPILE_TEST5 select RESET_HISI6 default ARCH_HISI7 help8 Build the clock driver for hi3516cv300.9 10config COMMON_CLK_HI351911 tristate "Hi3519 Clock Driver"12 depends on ARCH_HISI || COMPILE_TEST13 select RESET_HISI14 default ARCH_HISI15 help16 Build the clock driver for hi3519.17 18config COMMON_CLK_HI3559A19 bool "Hi3559A Clock Driver"20 depends on ARCH_HISI || COMPILE_TEST21 select RESET_HISI22 default ARCH_HISI23 help24 Build the clock driver for hi3559a.25 26config COMMON_CLK_HI366027 bool "Hi3660 Clock Driver"28 depends on ARCH_HISI || COMPILE_TEST29 default ARCH_HISI30 help31 Build the clock driver for hi3660.32 33config COMMON_CLK_HI367034 bool "Hi3670 Clock Driver"35 depends on ARCH_HISI || COMPILE_TEST36 default ARCH_HISI37 help38 Build the clock driver for hi3670.39 40config COMMON_CLK_HI3798CV20041 tristate "Hi3798CV200 Clock Driver"42 depends on ARCH_HISI || COMPILE_TEST43 select RESET_HISI44 default ARCH_HISI45 help46 Build the clock driver for hi3798cv200.47 48config COMMON_CLK_HI622049 bool "Hi6220 Clock Driver"50 depends on ARCH_HISI || COMPILE_TEST51 default ARCH_HISI52 help53 Build the Hisilicon Hi6220 clock driver based on the common clock framework.54 55config RESET_HISI56 bool "HiSilicon Reset Controller Driver"57 depends on ARCH_HISI || COMPILE_TEST58 select RESET_CONTROLLER59 help60 Build reset controller driver for HiSilicon device chipsets.61 62config STUB_CLK_HI622063 bool "Hi6220 Stub Clock Driver" if EXPERT64 depends on (COMMON_CLK_HI6220 || COMPILE_TEST)65 depends on MAILBOX66 default COMMON_CLK_HI622067 help68 Build the Hisilicon Hi6220 stub clock driver.69 70config STUB_CLK_HI366071 bool "Hi3660 Stub Clock Driver" if EXPERT72 depends on (COMMON_CLK_HI3660 || COMPILE_TEST)73 depends on MAILBOX74 default COMMON_CLK_HI366075 help76 Build the Hisilicon Hi3660 stub clock driver.77