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1// SPDX-License-Identifier: GPL-2.0-only2/*3 * Copyright (c) 2017 MediaTek Inc.4 * Author: Kevin-CW Chen <kevin-cw.chen@mediatek.com>5 */6 7#include <linux/clk-provider.h>8#include <linux/platform_device.h>9 10#include "clk-mtk.h"11#include "clk-gate.h"12 13#include <dt-bindings/clock/mt6797-clk.h>14 15static const struct mtk_gate_regs vdec0_cg_regs = {16 .set_ofs = 0x0000,17 .clr_ofs = 0x0004,18 .sta_ofs = 0x0000,19};20 21static const struct mtk_gate_regs vdec1_cg_regs = {22 .set_ofs = 0x0008,23 .clr_ofs = 0x000c,24 .sta_ofs = 0x0008,25};26 27#define GATE_VDEC0(_id, _name, _parent, _shift) \28 GATE_MTK(_id, _name, _parent, &vdec0_cg_regs, _shift, &mtk_clk_gate_ops_setclr_inv)29 30#define GATE_VDEC1(_id, _name, _parent, _shift) \31 GATE_MTK(_id, _name, _parent, &vdec1_cg_regs, _shift, &mtk_clk_gate_ops_setclr_inv)32 33static const struct mtk_gate vdec_clks[] = {34 GATE_VDEC0(CLK_VDEC_CKEN_ENG, "vdec_cken_eng", "vdec_sel", 8),35 GATE_VDEC0(CLK_VDEC_ACTIVE, "vdec_active", "vdec_sel", 4),36 GATE_VDEC0(CLK_VDEC_CKEN, "vdec_cken", "vdec_sel", 0),37 GATE_VDEC1(CLK_VDEC_LARB1_CKEN, "vdec_larb1_cken", "mm_sel", 0),38};39 40static const struct mtk_clk_desc vdec_desc = {41 .clks = vdec_clks,42 .num_clks = ARRAY_SIZE(vdec_clks),43};44 45static const struct of_device_id of_match_clk_mt6797_vdec[] = {46 {47 .compatible = "mediatek,mt6797-vdecsys",48 .data = &vdec_desc,49 }, {50 /* sentinel */51 }52};53MODULE_DEVICE_TABLE(of, of_match_clk_mt6797_vdec);54 55static struct platform_driver clk_mt6797_vdec_drv = {56 .probe = mtk_clk_simple_probe,57 .remove = mtk_clk_simple_remove,58 .driver = {59 .name = "clk-mt6797-vdec",60 .of_match_table = of_match_clk_mt6797_vdec,61 },62};63module_platform_driver(clk_mt6797_vdec_drv);64 65MODULE_DESCRIPTION("MediaTek MT6797 Video Decoders clocks driver");66MODULE_LICENSE("GPL");67