66 lines · c
1// SPDX-License-Identifier: GPL-2.02/*3 * Copyright (c) 2020 MediaTek Inc.4 * Copyright (c) 2020 BayLibre, SAS5 * Author: James Liao <jamesjj.liao@mediatek.com>6 * Fabien Parent <fparent@baylibre.com>7 */8 9#include <linux/clk-provider.h>10#include <linux/mod_devicetable.h>11#include <linux/platform_device.h>12 13#include "clk-mtk.h"14#include "clk-gate.h"15 16#include <dt-bindings/clock/mt8167-clk.h>17 18static const struct mtk_gate_regs vdec0_cg_regs = {19 .set_ofs = 0x0,20 .clr_ofs = 0x4,21 .sta_ofs = 0x0,22};23 24static const struct mtk_gate_regs vdec1_cg_regs = {25 .set_ofs = 0x8,26 .clr_ofs = 0xc,27 .sta_ofs = 0x8,28};29 30#define GATE_VDEC0_I(_id, _name, _parent, _shift) \31 GATE_MTK(_id, _name, _parent, &vdec0_cg_regs, _shift, &mtk_clk_gate_ops_setclr_inv)32 33#define GATE_VDEC1_I(_id, _name, _parent, _shift) \34 GATE_MTK(_id, _name, _parent, &vdec1_cg_regs, _shift, &mtk_clk_gate_ops_setclr_inv)35 36static const struct mtk_gate vdec_clks[] = {37 /* VDEC0 */38 GATE_VDEC0_I(CLK_VDEC_CKEN, "vdec_cken", "rg_vdec", 0),39 /* VDEC1 */40 GATE_VDEC1_I(CLK_VDEC_LARB1_CKEN, "vdec_larb1_cken", "smi_mm", 0),41};42 43static const struct mtk_clk_desc vdec_desc = {44 .clks = vdec_clks,45 .num_clks = ARRAY_SIZE(vdec_clks),46};47 48static const struct of_device_id of_match_clk_mt8167_vdec[] = {49 { .compatible = "mediatek,mt8167-vdecsys", .data = &vdec_desc },50 { /* sentinel */ }51};52MODULE_DEVICE_TABLE(of, of_match_clk_mt8167_vdec);53 54static struct platform_driver clk_mt8167_vdec_drv = {55 .probe = mtk_clk_simple_probe,56 .remove = mtk_clk_simple_remove,57 .driver = {58 .name = "clk-mt8167-vdecsys",59 .of_match_table = of_match_clk_mt8167_vdec,60 },61};62module_platform_driver(clk_mt8167_vdec_drv);63 64MODULE_DESCRIPTION("MediaTek MT8167 Video Decoders clocks driver");65MODULE_LICENSE("GPL");66