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1// SPDX-License-Identifier: GPL-2.0-only2//3// Copyright (c) 2021 MediaTek Inc.4// Author: Chun-Jie Chen <chun-jie.chen@mediatek.com>5 6#include <linux/clk-provider.h>7#include <linux/mod_devicetable.h>8#include <linux/platform_device.h>9 10#include "clk-mtk.h"11#include "clk-gate.h"12 13#include <dt-bindings/clock/mt8192-clk.h>14 15static const struct mtk_gate_regs venc_cg_regs = {16 .set_ofs = 0x4,17 .clr_ofs = 0x8,18 .sta_ofs = 0x0,19};20 21#define GATE_VENC(_id, _name, _parent, _shift) \22 GATE_MTK(_id, _name, _parent, &venc_cg_regs, _shift, &mtk_clk_gate_ops_setclr_inv)23 24static const struct mtk_gate venc_clks[] = {25 GATE_VENC(CLK_VENC_SET0_LARB, "venc_set0_larb", "venc_sel", 0),26 GATE_VENC(CLK_VENC_SET1_VENC, "venc_set1_venc", "venc_sel", 4),27 GATE_VENC(CLK_VENC_SET2_JPGENC, "venc_set2_jpgenc", "venc_sel", 8),28 GATE_VENC(CLK_VENC_SET5_GALS, "venc_set5_gals", "venc_sel", 28),29};30 31static const struct mtk_clk_desc venc_desc = {32 .clks = venc_clks,33 .num_clks = ARRAY_SIZE(venc_clks),34};35 36static const struct of_device_id of_match_clk_mt8192_venc[] = {37 {38 .compatible = "mediatek,mt8192-vencsys",39 .data = &venc_desc,40 }, {41 /* sentinel */42 }43};44MODULE_DEVICE_TABLE(of, of_match_clk_mt8192_venc);45 46static struct platform_driver clk_mt8192_venc_drv = {47 .probe = mtk_clk_simple_probe,48 .remove = mtk_clk_simple_remove,49 .driver = {50 .name = "clk-mt8192-venc",51 .of_match_table = of_match_clk_mt8192_venc,52 },53};54module_platform_driver(clk_mt8192_venc_drv);55 56MODULE_DESCRIPTION("MediaTek MT8192 Video Encoders clocks driver");57MODULE_LICENSE("GPL");58