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1/* SPDX-License-Identifier: GPL-2.0+ */2/*3 * Amlogic A1 PLL Clock Controller internals4 *5 * Copyright (c) 2019 Amlogic, Inc. All rights reserved.6 * Author: Jian Hu <jian.hu@amlogic.com>7 *8 * Copyright (c) 2023, SberDevices. All Rights Reserved.9 * Author: Dmitry Rokosov <ddrokosov@sberdevices.ru>10 */11 12#ifndef __A1_PLL_H13#define __A1_PLL_H14 15#include "clk-pll.h"16 17/* PLL register offset */18#define ANACTRL_FIXPLL_CTRL0 0x019#define ANACTRL_FIXPLL_CTRL1 0x420#define ANACTRL_FIXPLL_STS 0x1421#define ANACTRL_HIFIPLL_CTRL0 0xc022#define ANACTRL_HIFIPLL_CTRL1 0xc423#define ANACTRL_HIFIPLL_CTRL2 0xc824#define ANACTRL_HIFIPLL_CTRL3 0xcc25#define ANACTRL_HIFIPLL_CTRL4 0xd026#define ANACTRL_HIFIPLL_STS 0xd427 28#endif /* __A1_PLL_H */29