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1# SPDX-License-Identifier: GPL-2.02 3config CLK_RENESAS4 bool "Renesas SoC clock support" if COMPILE_TEST && !ARCH_RENESAS5 default y if ARCH_RENESAS6 select CLK_EMEV2 if ARCH_EMEV27 select CLK_RZA1 if ARCH_R7S721008 select CLK_R7S9210 if ARCH_R7S92109 select CLK_R8A73A4 if ARCH_R8A73A410 select CLK_R8A7740 if ARCH_R8A774011 select CLK_R8A7742 if ARCH_R8A774212 select CLK_R8A7743 if ARCH_R8A7743 || ARCH_R8A774413 select CLK_R8A7745 if ARCH_R8A774514 select CLK_R8A77470 if ARCH_R8A7747015 select CLK_R8A774A1 if ARCH_R8A774A116 select CLK_R8A774B1 if ARCH_R8A774B117 select CLK_R8A774C0 if ARCH_R8A774C018 select CLK_R8A774E1 if ARCH_R8A774E119 select CLK_R8A7778 if ARCH_R8A777820 select CLK_R8A7779 if ARCH_R8A777921 select CLK_R8A7790 if ARCH_R8A779022 select CLK_R8A7791 if ARCH_R8A7791 || ARCH_R8A779323 select CLK_R8A7792 if ARCH_R8A779224 select CLK_R8A7794 if ARCH_R8A779425 select CLK_R8A7795 if ARCH_R8A7795126 select CLK_R8A77960 if ARCH_R8A7796027 select CLK_R8A77961 if ARCH_R8A7796128 select CLK_R8A77965 if ARCH_R8A7796529 select CLK_R8A77970 if ARCH_R8A7797030 select CLK_R8A77980 if ARCH_R8A7798031 select CLK_R8A77990 if ARCH_R8A7799032 select CLK_R8A77995 if ARCH_R8A7799533 select CLK_R8A779A0 if ARCH_R8A779A034 select CLK_R8A779F0 if ARCH_R8A779F035 select CLK_R8A779G0 if ARCH_R8A779G036 select CLK_R8A779H0 if ARCH_R8A779H037 select CLK_R9A06G032 if ARCH_R9A06G03238 select CLK_R9A07G043 if ARCH_R9A07G04339 select CLK_R9A07G044 if ARCH_R9A07G04440 select CLK_R9A07G054 if ARCH_R9A07G05441 select CLK_R9A08G045 if ARCH_R9A08G04542 select CLK_R9A09G011 if ARCH_R9A09G01143 select CLK_R9A09G057 if ARCH_R9A09G05744 select CLK_SH73A0 if ARCH_SH73A045 46if CLK_RENESAS47 48# SoC49config CLK_EMEV250 bool "Emma Mobile EV2 clock support" if COMPILE_TEST51 52config CLK_RZA153 bool "RZ/A1H clock support" if COMPILE_TEST54 select CLK_RENESAS_CPG_MSTP55 56config CLK_R7S921057 bool "RZ/A2 clock support" if COMPILE_TEST58 select CLK_RENESAS_CPG_MSSR59 60config CLK_R8A73A461 bool "R-Mobile APE6 clock support" if COMPILE_TEST62 select CLK_RENESAS_CPG_MSTP63 select CLK_RENESAS_DIV664 65config CLK_R8A774066 bool "R-Mobile A1 clock support" if COMPILE_TEST67 select CLK_RENESAS_CPG_MSTP68 select CLK_RENESAS_DIV669 70config CLK_R8A774271 bool "RZ/G1H clock support" if COMPILE_TEST72 select CLK_RCAR_GEN2_CPG73 74config CLK_R8A774375 bool "RZ/G1M clock support" if COMPILE_TEST76 select CLK_RCAR_GEN2_CPG77 78config CLK_R8A774579 bool "RZ/G1E clock support" if COMPILE_TEST80 select CLK_RCAR_GEN2_CPG81 82config CLK_R8A7747083 bool "RZ/G1C clock support" if COMPILE_TEST84 select CLK_RCAR_GEN2_CPG85 86config CLK_R8A774A187 bool "RZ/G2M clock support" if COMPILE_TEST88 select CLK_RCAR_GEN3_CPG89 90config CLK_R8A774B191 bool "RZ/G2N clock support" if COMPILE_TEST92 select CLK_RCAR_GEN3_CPG93 94config CLK_R8A774C095 bool "RZ/G2E clock support" if COMPILE_TEST96 select CLK_RCAR_GEN3_CPG97 98config CLK_R8A774E199 bool "RZ/G2H clock support" if COMPILE_TEST100 select CLK_RCAR_GEN3_CPG101 102config CLK_R8A7778103 bool "R-Car M1A clock support" if COMPILE_TEST104 select CLK_RENESAS_CPG_MSTP105 106config CLK_R8A7779107 bool "R-Car H1 clock support" if COMPILE_TEST108 select CLK_RENESAS_CPG_MSTP109 110config CLK_R8A7790111 bool "R-Car H2 clock support" if COMPILE_TEST112 select CLK_RCAR_GEN2_CPG113 114config CLK_R8A7791115 bool "R-Car M2-W/N clock support" if COMPILE_TEST116 select CLK_RCAR_GEN2_CPG117 118config CLK_R8A7792119 bool "R-Car V2H clock support" if COMPILE_TEST120 select CLK_RCAR_GEN2_CPG121 122config CLK_R8A7794123 bool "R-Car E2 clock support" if COMPILE_TEST124 select CLK_RCAR_GEN2_CPG125 126config CLK_R8A7795127 bool "R-Car H3 clock support" if COMPILE_TEST128 select CLK_RCAR_GEN3_CPG129 130config CLK_R8A77960131 bool "R-Car M3-W clock support" if COMPILE_TEST132 select CLK_RCAR_GEN3_CPG133 134config CLK_R8A77961135 bool "R-Car M3-W+ clock support" if COMPILE_TEST136 select CLK_RCAR_GEN3_CPG137 138config CLK_R8A77965139 bool "R-Car M3-N clock support" if COMPILE_TEST140 select CLK_RCAR_GEN3_CPG141 142config CLK_R8A77970143 bool "R-Car V3M clock support" if COMPILE_TEST144 select CLK_RCAR_GEN3_CPG145 146config CLK_R8A77980147 bool "R-Car V3H clock support" if COMPILE_TEST148 select CLK_RCAR_GEN3_CPG149 150config CLK_R8A77990151 bool "R-Car E3 clock support" if COMPILE_TEST152 select CLK_RCAR_GEN3_CPG153 154config CLK_R8A77995155 bool "R-Car D3 clock support" if COMPILE_TEST156 select CLK_RCAR_GEN3_CPG157 158config CLK_R8A779A0159 bool "R-Car V3U clock support" if COMPILE_TEST160 select CLK_RCAR_GEN4_CPG161 162config CLK_R8A779F0163 bool "R-Car S4-8 clock support" if COMPILE_TEST164 select CLK_RCAR_GEN4_CPG165 166config CLK_R8A779G0167 bool "R-Car V4H clock support" if COMPILE_TEST168 select CLK_RCAR_GEN4_CPG169 170config CLK_R8A779H0171 bool "R-Car V4M clock support" if COMPILE_TEST172 select CLK_RCAR_GEN4_CPG173 174config CLK_R9A06G032175 bool "RZ/N1D clock support" if COMPILE_TEST176 177config CLK_R9A07G043178 bool "RZ/G2UL clock support" if COMPILE_TEST179 select CLK_RZG2L180 181config CLK_R9A07G044182 bool "RZ/G2L clock support" if COMPILE_TEST183 select CLK_RZG2L184 185config CLK_R9A07G054186 bool "RZ/V2L clock support" if COMPILE_TEST187 select CLK_RZG2L188 189config CLK_R9A08G045190 bool "RZ/G3S clock support" if COMPILE_TEST191 select CLK_RZG2L192 193config CLK_R9A09G011194 bool "RZ/V2M clock support" if COMPILE_TEST195 select CLK_RZG2L196 197config CLK_R9A09G057198 bool "RZ/V2H(P) clock support" if COMPILE_TEST199 select CLK_RZV2H200 201config CLK_SH73A0202 bool "SH-Mobile AG5 clock support" if COMPILE_TEST203 select CLK_RENESAS_CPG_MSTP204 select CLK_RENESAS_DIV6205 206 207# Family208config CLK_RCAR_CPG_LIB209 bool "CPG/MSSR library functions" if COMPILE_TEST210 211config CLK_RCAR_GEN2_CPG212 bool "R-Car Gen2 CPG clock support" if COMPILE_TEST213 select CLK_RENESAS_CPG_MSSR214 215config CLK_RCAR_GEN3_CPG216 bool "R-Car Gen3 and RZ/G2 CPG clock support" if COMPILE_TEST217 select CLK_RCAR_CPG_LIB218 select CLK_RENESAS_CPG_MSSR219 220config CLK_RCAR_GEN4_CPG221 bool "R-Car Gen4 clock support" if COMPILE_TEST222 select CLK_RCAR_CPG_LIB223 select CLK_RENESAS_CPG_MSSR224 225config CLK_RCAR_USB2_CLOCK_SEL226 bool "R-Car USB2 clock selector support"227 depends on ARCH_RENESAS || COMPILE_TEST228 select RESET_CONTROLLER229 help230 This is a driver for R-Car USB2 clock selector231 232config CLK_RZG2L233 bool "RZ/{G2L,G2UL,G3S,V2L} family clock support" if COMPILE_TEST234 select RESET_CONTROLLER235 236config CLK_RZV2H237 bool "RZ/V2H(P) family clock support" if COMPILE_TEST238 select RESET_CONTROLLER239 240# Generic241config CLK_RENESAS_CPG_MSSR242 bool "CPG/MSSR clock support" if COMPILE_TEST243 select CLK_RENESAS_DIV6244 245config CLK_RENESAS_CPG_MSTP246 bool "MSTP clock support" if COMPILE_TEST247 248config CLK_RENESAS_DIV6249 bool "DIV6 clock support" if COMPILE_TEST250 251endif # CLK_RENESAS252