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1// SPDX-License-Identifier: GPL-2.02/*3 * R-Car Gen3 Clock Pulse Generator Library4 *5 * Copyright (C) 2015-2018 Glider bvba6 * Copyright (C) 2019 Renesas Electronics Corp.7 *8 * Based on clk-rcar-gen3.c9 *10 * Copyright (C) 2015 Renesas Electronics Corp.11 */12 13#include <linux/clk.h>14#include <linux/clk-provider.h>15#include <linux/device.h>16#include <linux/err.h>17#include <linux/init.h>18#include <linux/io.h>19#include <linux/pm.h>20#include <linux/slab.h>21#include <linux/sys_soc.h>22 23#include "rcar-cpg-lib.h"24 25DEFINE_SPINLOCK(cpg_lock);26 27void cpg_reg_modify(void __iomem *reg, u32 clear, u32 set)28{29	unsigned long flags;30	u32 val;31 32	spin_lock_irqsave(&cpg_lock, flags);33	val = readl(reg);34	val &= ~clear;35	val |= set;36	writel(val, reg);37	spin_unlock_irqrestore(&cpg_lock, flags);38};39 40static int cpg_simple_notifier_call(struct notifier_block *nb,41				    unsigned long action, void *data)42{43	struct cpg_simple_notifier *csn =44		container_of(nb, struct cpg_simple_notifier, nb);45 46	switch (action) {47	case PM_EVENT_SUSPEND:48		csn->saved = readl(csn->reg);49		return NOTIFY_OK;50 51	case PM_EVENT_RESUME:52		writel(csn->saved, csn->reg);53		return NOTIFY_OK;54	}55	return NOTIFY_DONE;56}57 58void cpg_simple_notifier_register(struct raw_notifier_head *notifiers,59				  struct cpg_simple_notifier *csn)60{61	csn->nb.notifier_call = cpg_simple_notifier_call;62	raw_notifier_chain_register(notifiers, &csn->nb);63}64 65/*66 * SDn Clock67 */68 69#define SDnSRCFC_SHIFT 270#define STPnHCK	BIT(9 - SDnSRCFC_SHIFT)71 72static const struct clk_div_table cpg_sdh_div_table[] = {73	/*74	 * These values are recommended by the datasheet.  Because they come75	 * first, Linux will only use these.76	 */77	{ 0, 1 }, { 1, 2 }, { STPnHCK | 2, 4 }, { STPnHCK | 3, 8 },78	{ STPnHCK | 4, 16 },79	/*80	 * These values are not recommended because STPnHCK is wrong.  But they81	 * have been seen because of broken firmware.  So, we support reading82	 * them but Linux will sanitize them when initializing through83	 * recalc_rate.84	 */85	{ STPnHCK | 0, 1 }, { STPnHCK | 1, 2 },  { 2, 4 }, { 3, 8 }, { 4, 16 },86	/* Sentinel */87	{ 0, 0 }88};89 90struct clk * __init cpg_sdh_clk_register(const char *name,91	void __iomem *sdnckcr, const char *parent_name,92	struct raw_notifier_head *notifiers)93{94	struct cpg_simple_notifier *csn;95	struct clk *clk;96 97	csn = kzalloc(sizeof(*csn), GFP_KERNEL);98	if (!csn)99		return ERR_PTR(-ENOMEM);100 101	csn->reg = sdnckcr;102 103	clk = clk_register_divider_table(NULL, name, parent_name, 0, sdnckcr,104					 SDnSRCFC_SHIFT, 8, 0, cpg_sdh_div_table,105					 &cpg_lock);106	if (IS_ERR(clk)) {107		kfree(csn);108		return clk;109	}110 111	cpg_simple_notifier_register(notifiers, csn);112	return clk;113}114 115static const struct clk_div_table cpg_sd_div_table[] = {116	{ 0, 2 }, { 1, 4 }, { 0, 0 },117};118 119struct clk * __init cpg_sd_clk_register(const char *name,120	void __iomem *sdnckcr, const char *parent_name)121{122	return clk_register_divider_table(NULL, name, parent_name, 0, sdnckcr,123					  0, 2, 0, cpg_sd_div_table, &cpg_lock);124}125 126struct rpc_clock {127	struct clk_divider div;128	struct clk_gate gate;129	/*130	 * One notifier covers both RPC and RPCD2 clocks as they are both131	 * controlled by the same RPCCKCR register...132	 */133	struct cpg_simple_notifier csn;134};135 136static const struct clk_div_table cpg_rpc_div_table[] = {137	{ 1, 2 }, { 3, 4 }, { 5, 6 }, { 7, 8 }, { 0, 0 },138};139 140struct clk * __init cpg_rpc_clk_register(const char *name,141	void __iomem *rpcckcr, const char *parent_name,142	struct raw_notifier_head *notifiers)143{144	struct rpc_clock *rpc;145	struct clk *clk;146 147	rpc = kzalloc(sizeof(*rpc), GFP_KERNEL);148	if (!rpc)149		return ERR_PTR(-ENOMEM);150 151	rpc->div.reg = rpcckcr;152	rpc->div.width = 3;153	rpc->div.table = cpg_rpc_div_table;154	rpc->div.lock = &cpg_lock;155 156	rpc->gate.reg = rpcckcr;157	rpc->gate.bit_idx = 8;158	rpc->gate.flags = CLK_GATE_SET_TO_DISABLE;159	rpc->gate.lock = &cpg_lock;160 161	rpc->csn.reg = rpcckcr;162 163	clk = clk_register_composite(NULL, name, &parent_name, 1, NULL, NULL,164				     &rpc->div.hw,  &clk_divider_ops,165				     &rpc->gate.hw, &clk_gate_ops,166				     CLK_SET_RATE_PARENT);167	if (IS_ERR(clk)) {168		kfree(rpc);169		return clk;170	}171 172	cpg_simple_notifier_register(notifiers, &rpc->csn);173	return clk;174}175 176struct rpcd2_clock {177	struct clk_fixed_factor fixed;178	struct clk_gate gate;179};180 181struct clk * __init cpg_rpcd2_clk_register(const char *name,182					   void __iomem *rpcckcr,183					   const char *parent_name)184{185	struct rpcd2_clock *rpcd2;186	struct clk *clk;187 188	rpcd2 = kzalloc(sizeof(*rpcd2), GFP_KERNEL);189	if (!rpcd2)190		return ERR_PTR(-ENOMEM);191 192	rpcd2->fixed.mult = 1;193	rpcd2->fixed.div = 2;194 195	rpcd2->gate.reg = rpcckcr;196	rpcd2->gate.bit_idx = 9;197	rpcd2->gate.flags = CLK_GATE_SET_TO_DISABLE;198	rpcd2->gate.lock = &cpg_lock;199 200	clk = clk_register_composite(NULL, name, &parent_name, 1, NULL, NULL,201				     &rpcd2->fixed.hw, &clk_fixed_factor_ops,202				     &rpcd2->gate.hw, &clk_gate_ops,203				     CLK_SET_RATE_PARENT);204	if (IS_ERR(clk))205		kfree(rpcd2);206 207	return clk;208}209 210