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1/* SPDX-License-Identifier: GPL-2.0-only */2/*3 * Copyright (C) STMicroelectronics 2023 - All Rights Reserved4 * Author: Gabriel Fernandez <gabriel.fernandez@foss.st.com> for STMicroelectronics.5 */6 7#ifndef STM32MP25_RCC_H8#define STM32MP25_RCC_H9 10#define RCC_SECCFGR0				0x011#define RCC_SECCFGR1				0x412#define RCC_SECCFGR2				0x813#define RCC_SECCFGR3				0xC14#define RCC_PRIVCFGR0				0x1015#define RCC_PRIVCFGR1				0x1416#define RCC_PRIVCFGR2				0x1817#define RCC_PRIVCFGR3				0x1C18#define RCC_RCFGLOCKR0				0x2019#define RCC_RCFGLOCKR1				0x2420#define RCC_RCFGLOCKR2				0x2821#define RCC_RCFGLOCKR3				0x2C22#define RCC_R0CIDCFGR				0x3023#define RCC_R0SEMCR				0x3424#define RCC_R1CIDCFGR				0x3825#define RCC_R1SEMCR				0x3C26#define RCC_R2CIDCFGR				0x4027#define RCC_R2SEMCR				0x4428#define RCC_R3CIDCFGR				0x4829#define RCC_R3SEMCR				0x4C30#define RCC_R4CIDCFGR				0x5031#define RCC_R4SEMCR				0x5432#define RCC_R5CIDCFGR				0x5833#define RCC_R5SEMCR				0x5C34#define RCC_R6CIDCFGR				0x6035#define RCC_R6SEMCR				0x6436#define RCC_R7CIDCFGR				0x6837#define RCC_R7SEMCR				0x6C38#define RCC_R8CIDCFGR				0x7039#define RCC_R8SEMCR				0x7440#define RCC_R9CIDCFGR				0x7841#define RCC_R9SEMCR				0x7C42#define RCC_R10CIDCFGR				0x8043#define RCC_R10SEMCR				0x8444#define RCC_R11CIDCFGR				0x8845#define RCC_R11SEMCR				0x8C46#define RCC_R12CIDCFGR				0x9047#define RCC_R12SEMCR				0x9448#define RCC_R13CIDCFGR				0x9849#define RCC_R13SEMCR				0x9C50#define RCC_R14CIDCFGR				0xA051#define RCC_R14SEMCR				0xA452#define RCC_R15CIDCFGR				0xA853#define RCC_R15SEMCR				0xAC54#define RCC_R16CIDCFGR				0xB055#define RCC_R16SEMCR				0xB456#define RCC_R17CIDCFGR				0xB857#define RCC_R17SEMCR				0xBC58#define RCC_R18CIDCFGR				0xC059#define RCC_R18SEMCR				0xC460#define RCC_R19CIDCFGR				0xC861#define RCC_R19SEMCR				0xCC62#define RCC_R20CIDCFGR				0xD063#define RCC_R20SEMCR				0xD464#define RCC_R21CIDCFGR				0xD865#define RCC_R21SEMCR				0xDC66#define RCC_R22CIDCFGR				0xE067#define RCC_R22SEMCR				0xE468#define RCC_R23CIDCFGR				0xE869#define RCC_R23SEMCR				0xEC70#define RCC_R24CIDCFGR				0xF071#define RCC_R24SEMCR				0xF472#define RCC_R25CIDCFGR				0xF873#define RCC_R25SEMCR				0xFC74#define RCC_R26CIDCFGR				0x10075#define RCC_R26SEMCR				0x10476#define RCC_R27CIDCFGR				0x10877#define RCC_R27SEMCR				0x10C78#define RCC_R28CIDCFGR				0x11079#define RCC_R28SEMCR				0x11480#define RCC_R29CIDCFGR				0x11881#define RCC_R29SEMCR				0x11C82#define RCC_R30CIDCFGR				0x12083#define RCC_R30SEMCR				0x12484#define RCC_R31CIDCFGR				0x12885#define RCC_R31SEMCR				0x12C86#define RCC_R32CIDCFGR				0x13087#define RCC_R32SEMCR				0x13488#define RCC_R33CIDCFGR				0x13889#define RCC_R33SEMCR				0x13C90#define RCC_R34CIDCFGR				0x14091#define RCC_R34SEMCR				0x14492#define RCC_R35CIDCFGR				0x14893#define RCC_R35SEMCR				0x14C94#define RCC_R36CIDCFGR				0x15095#define RCC_R36SEMCR				0x15496#define RCC_R37CIDCFGR				0x15897#define RCC_R37SEMCR				0x15C98#define RCC_R38CIDCFGR				0x16099#define RCC_R38SEMCR				0x164100#define RCC_R39CIDCFGR				0x168101#define RCC_R39SEMCR				0x16C102#define RCC_R40CIDCFGR				0x170103#define RCC_R40SEMCR				0x174104#define RCC_R41CIDCFGR				0x178105#define RCC_R41SEMCR				0x17C106#define RCC_R42CIDCFGR				0x180107#define RCC_R42SEMCR				0x184108#define RCC_R43CIDCFGR				0x188109#define RCC_R43SEMCR				0x18C110#define RCC_R44CIDCFGR				0x190111#define RCC_R44SEMCR				0x194112#define RCC_R45CIDCFGR				0x198113#define RCC_R45SEMCR				0x19C114#define RCC_R46CIDCFGR				0x1A0115#define RCC_R46SEMCR				0x1A4116#define RCC_R47CIDCFGR				0x1A8117#define RCC_R47SEMCR				0x1AC118#define RCC_R48CIDCFGR				0x1B0119#define RCC_R48SEMCR				0x1B4120#define RCC_R49CIDCFGR				0x1B8121#define RCC_R49SEMCR				0x1BC122#define RCC_R50CIDCFGR				0x1C0123#define RCC_R50SEMCR				0x1C4124#define RCC_R51CIDCFGR				0x1C8125#define RCC_R51SEMCR				0x1CC126#define RCC_R52CIDCFGR				0x1D0127#define RCC_R52SEMCR				0x1D4128#define RCC_R53CIDCFGR				0x1D8129#define RCC_R53SEMCR				0x1DC130#define RCC_R54CIDCFGR				0x1E0131#define RCC_R54SEMCR				0x1E4132#define RCC_R55CIDCFGR				0x1E8133#define RCC_R55SEMCR				0x1EC134#define RCC_R56CIDCFGR				0x1F0135#define RCC_R56SEMCR				0x1F4136#define RCC_R57CIDCFGR				0x1F8137#define RCC_R57SEMCR				0x1FC138#define RCC_R58CIDCFGR				0x200139#define RCC_R58SEMCR				0x204140#define RCC_R59CIDCFGR				0x208141#define RCC_R59SEMCR				0x20C142#define RCC_R60CIDCFGR				0x210143#define RCC_R60SEMCR				0x214144#define RCC_R61CIDCFGR				0x218145#define RCC_R61SEMCR				0x21C146#define RCC_R62CIDCFGR				0x220147#define RCC_R62SEMCR				0x224148#define RCC_R63CIDCFGR				0x228149#define RCC_R63SEMCR				0x22C150#define RCC_R64CIDCFGR				0x230151#define RCC_R64SEMCR				0x234152#define RCC_R65CIDCFGR				0x238153#define RCC_R65SEMCR				0x23C154#define RCC_R66CIDCFGR				0x240155#define RCC_R66SEMCR				0x244156#define RCC_R67CIDCFGR				0x248157#define RCC_R67SEMCR				0x24C158#define RCC_R68CIDCFGR				0x250159#define RCC_R68SEMCR				0x254160#define RCC_R69CIDCFGR				0x258161#define RCC_R69SEMCR				0x25C162#define RCC_R70CIDCFGR				0x260163#define RCC_R70SEMCR				0x264164#define RCC_R71CIDCFGR				0x268165#define RCC_R71SEMCR				0x26C166#define RCC_R72CIDCFGR				0x270167#define RCC_R72SEMCR				0x274168#define RCC_R73CIDCFGR				0x278169#define RCC_R73SEMCR				0x27C170#define RCC_R74CIDCFGR				0x280171#define RCC_R74SEMCR				0x284172#define RCC_R75CIDCFGR				0x288173#define RCC_R75SEMCR				0x28C174#define RCC_R76CIDCFGR				0x290175#define RCC_R76SEMCR				0x294176#define RCC_R77CIDCFGR				0x298177#define RCC_R77SEMCR				0x29C178#define RCC_R78CIDCFGR				0x2A0179#define RCC_R78SEMCR				0x2A4180#define RCC_R79CIDCFGR				0x2A8181#define RCC_R79SEMCR				0x2AC182#define RCC_R80CIDCFGR				0x2B0183#define RCC_R80SEMCR				0x2B4184#define RCC_R81CIDCFGR				0x2B8185#define RCC_R81SEMCR				0x2BC186#define RCC_R82CIDCFGR				0x2C0187#define RCC_R82SEMCR				0x2C4188#define RCC_R83CIDCFGR				0x2C8189#define RCC_R83SEMCR				0x2CC190#define RCC_R84CIDCFGR				0x2D0191#define RCC_R84SEMCR				0x2D4192#define RCC_R85CIDCFGR				0x2D8193#define RCC_R85SEMCR				0x2DC194#define RCC_R86CIDCFGR				0x2E0195#define RCC_R86SEMCR				0x2E4196#define RCC_R87CIDCFGR				0x2E8197#define RCC_R87SEMCR				0x2EC198#define RCC_R88CIDCFGR				0x2F0199#define RCC_R88SEMCR				0x2F4200#define RCC_R89CIDCFGR				0x2F8201#define RCC_R89SEMCR				0x2FC202#define RCC_R90CIDCFGR				0x300203#define RCC_R90SEMCR				0x304204#define RCC_R91CIDCFGR				0x308205#define RCC_R91SEMCR				0x30C206#define RCC_R92CIDCFGR				0x310207#define RCC_R92SEMCR				0x314208#define RCC_R93CIDCFGR				0x318209#define RCC_R93SEMCR				0x31C210#define RCC_R94CIDCFGR				0x320211#define RCC_R94SEMCR				0x324212#define RCC_R95CIDCFGR				0x328213#define RCC_R95SEMCR				0x32C214#define RCC_R96CIDCFGR				0x330215#define RCC_R96SEMCR				0x334216#define RCC_R97CIDCFGR				0x338217#define RCC_R97SEMCR				0x33C218#define RCC_R98CIDCFGR				0x340219#define RCC_R98SEMCR				0x344220#define RCC_R99CIDCFGR				0x348221#define RCC_R99SEMCR				0x34C222#define RCC_R100CIDCFGR				0x350223#define RCC_R100SEMCR				0x354224#define RCC_R101CIDCFGR				0x358225#define RCC_R101SEMCR				0x35C226#define RCC_R102CIDCFGR				0x360227#define RCC_R102SEMCR				0x364228#define RCC_R103CIDCFGR				0x368229#define RCC_R103SEMCR				0x36C230#define RCC_R104CIDCFGR				0x370231#define RCC_R104SEMCR				0x374232#define RCC_R105CIDCFGR				0x378233#define RCC_R105SEMCR				0x37C234#define RCC_R106CIDCFGR				0x380235#define RCC_R106SEMCR				0x384236#define RCC_R107CIDCFGR				0x388237#define RCC_R107SEMCR				0x38C238#define RCC_R108CIDCFGR				0x390239#define RCC_R108SEMCR				0x394240#define RCC_R109CIDCFGR				0x398241#define RCC_R109SEMCR				0x39C242#define RCC_R110CIDCFGR				0x3A0243#define RCC_R110SEMCR				0x3A4244#define RCC_R111CIDCFGR				0x3A8245#define RCC_R111SEMCR				0x3AC246#define RCC_R112CIDCFGR				0x3B0247#define RCC_R112SEMCR				0x3B4248#define RCC_R113CIDCFGR				0x3B8249#define RCC_R113SEMCR				0x3BC250#define RCC_GRSTCSETR				0x400251#define RCC_C1RSTCSETR				0x404252#define RCC_C1P1RSTCSETR			0x408253#define RCC_C2RSTCSETR				0x40C254#define RCC_HWRSTSCLRR				0x410255#define RCC_C1HWRSTSCLRR			0x414256#define RCC_C2HWRSTSCLRR			0x418257#define RCC_C1BOOTRSTSSETR			0x41C258#define RCC_C1BOOTRSTSCLRR			0x420259#define RCC_C2BOOTRSTSSETR			0x424260#define RCC_C2BOOTRSTSCLRR			0x428261#define RCC_C1SREQSETR				0x42C262#define RCC_C1SREQCLRR				0x430263#define RCC_CPUBOOTCR				0x434264#define RCC_STBYBOOTCR				0x438265#define RCC_LEGBOOTCR				0x43C266#define RCC_BDCR				0x440267#define RCC_D3DCR				0x444268#define RCC_D3DSR				0x448269#define RCC_RDCR				0x44C270#define RCC_C1MSRDCR				0x450271#define RCC_PWRLPDLYCR				0x454272#define RCC_C1CIESETR				0x458273#define RCC_C1CIFCLRR				0x45C274#define RCC_C2CIESETR				0x460275#define RCC_C2CIFCLRR				0x464276#define RCC_IWDGC1FZSETR			0x468277#define RCC_IWDGC1FZCLRR			0x46C278#define RCC_IWDGC1CFGSETR			0x470279#define RCC_IWDGC1CFGCLRR			0x474280#define RCC_IWDGC2FZSETR			0x478281#define RCC_IWDGC2FZCLRR			0x47C282#define RCC_IWDGC2CFGSETR			0x480283#define RCC_IWDGC2CFGCLRR			0x484284#define RCC_IWDGC3CFGSETR			0x488285#define RCC_IWDGC3CFGCLRR			0x48C286#define RCC_C3CFGR				0x490287#define RCC_MCO1CFGR				0x494288#define RCC_MCO2CFGR				0x498289#define RCC_OCENSETR				0x49C290#define RCC_OCENCLRR				0x4A0291#define RCC_OCRDYR				0x4A4292#define RCC_HSICFGR				0x4A8293#define RCC_MSICFGR				0x4AC294#define RCC_RTCDIVR				0x4B0295#define RCC_APB1DIVR				0x4B4296#define RCC_APB2DIVR				0x4B8297#define RCC_APB3DIVR				0x4BC298#define RCC_APB4DIVR				0x4C0299#define RCC_APBDBGDIVR				0x4C4300#define RCC_TIMG1PRER				0x4C8301#define RCC_TIMG2PRER				0x4CC302#define RCC_LSMCUDIVR				0x4D0303#define RCC_DDRCPCFGR				0x4D4304#define RCC_DDRCAPBCFGR				0x4D8305#define RCC_DDRPHYCAPBCFGR			0x4DC306#define RCC_DDRPHYCCFGR				0x4E0307#define RCC_DDRCFGR				0x4E4308#define RCC_DDRITFCFGR				0x4E8309#define RCC_SYSRAMCFGR				0x4F0310#define RCC_VDERAMCFGR				0x4F4311#define RCC_SRAM1CFGR				0x4F8312#define RCC_SRAM2CFGR				0x4FC313#define RCC_RETRAMCFGR				0x500314#define RCC_BKPSRAMCFGR				0x504315#define RCC_LPSRAM1CFGR				0x508316#define RCC_LPSRAM2CFGR				0x50C317#define RCC_LPSRAM3CFGR				0x510318#define RCC_OSPI1CFGR				0x514319#define RCC_OSPI2CFGR				0x518320#define RCC_FMCCFGR				0x51C321#define RCC_DBGCFGR				0x520322#define RCC_STM500CFGR				0x524323#define RCC_ETRCFGR				0x528324#define RCC_GPIOACFGR				0x52C325#define RCC_GPIOBCFGR				0x530326#define RCC_GPIOCCFGR				0x534327#define RCC_GPIODCFGR				0x538328#define RCC_GPIOECFGR				0x53C329#define RCC_GPIOFCFGR				0x540330#define RCC_GPIOGCFGR				0x544331#define RCC_GPIOHCFGR				0x548332#define RCC_GPIOICFGR				0x54C333#define RCC_GPIOJCFGR				0x550334#define RCC_GPIOKCFGR				0x554335#define RCC_GPIOZCFGR				0x558336#define RCC_HPDMA1CFGR				0x55C337#define RCC_HPDMA2CFGR				0x560338#define RCC_HPDMA3CFGR				0x564339#define RCC_LPDMACFGR				0x568340#define RCC_HSEMCFGR				0x56C341#define RCC_IPCC1CFGR				0x570342#define RCC_IPCC2CFGR				0x574343#define RCC_RTCCFGR				0x578344#define RCC_SYSCPU1CFGR				0x580345#define RCC_BSECCFGR				0x584346#define RCC_IS2MCFGR				0x58C347#define RCC_PLL2CFGR1				0x590348#define RCC_PLL2CFGR2				0x594349#define RCC_PLL2CFGR3				0x598350#define RCC_PLL2CFGR4				0x59C351#define RCC_PLL2CFGR5				0x5A0352#define RCC_PLL2CFGR6				0x5A8353#define RCC_PLL2CFGR7				0x5AC354#define RCC_PLL3CFGR1				0x5B8355#define RCC_PLL3CFGR2				0x5BC356#define RCC_PLL3CFGR3				0x5C0357#define RCC_PLL3CFGR4				0x5C4358#define RCC_PLL3CFGR5				0x5C8359#define RCC_PLL3CFGR6				0x5D0360#define RCC_PLL3CFGR7				0x5D4361#define RCC_HSIFMONCR				0x5E0362#define RCC_HSIFVALR				0x5E4363#define RCC_TIM1CFGR				0x700364#define RCC_TIM2CFGR				0x704365#define RCC_TIM3CFGR				0x708366#define RCC_TIM4CFGR				0x70C367#define RCC_TIM5CFGR				0x710368#define RCC_TIM6CFGR				0x714369#define RCC_TIM7CFGR				0x718370#define RCC_TIM8CFGR				0x71C371#define RCC_TIM10CFGR				0x720372#define RCC_TIM11CFGR				0x724373#define RCC_TIM12CFGR				0x728374#define RCC_TIM13CFGR				0x72C375#define RCC_TIM14CFGR				0x730376#define RCC_TIM15CFGR				0x734377#define RCC_TIM16CFGR				0x738378#define RCC_TIM17CFGR				0x73C379#define RCC_TIM20CFGR				0x740380#define RCC_LPTIM1CFGR				0x744381#define RCC_LPTIM2CFGR				0x748382#define RCC_LPTIM3CFGR				0x74C383#define RCC_LPTIM4CFGR				0x750384#define RCC_LPTIM5CFGR				0x754385#define RCC_SPI1CFGR				0x758386#define RCC_SPI2CFGR				0x75C387#define RCC_SPI3CFGR				0x760388#define RCC_SPI4CFGR				0x764389#define RCC_SPI5CFGR				0x768390#define RCC_SPI6CFGR				0x76C391#define RCC_SPI7CFGR				0x770392#define RCC_SPI8CFGR				0x774393#define RCC_SPDIFRXCFGR				0x778394#define RCC_USART1CFGR				0x77C395#define RCC_USART2CFGR				0x780396#define RCC_USART3CFGR				0x784397#define RCC_UART4CFGR				0x788398#define RCC_UART5CFGR				0x78C399#define RCC_USART6CFGR				0x790400#define RCC_UART7CFGR				0x794401#define RCC_UART8CFGR				0x798402#define RCC_UART9CFGR				0x79C403#define RCC_LPUART1CFGR				0x7A0404#define RCC_I2C1CFGR				0x7A4405#define RCC_I2C2CFGR				0x7A8406#define RCC_I2C3CFGR				0x7AC407#define RCC_I2C4CFGR				0x7B0408#define RCC_I2C5CFGR				0x7B4409#define RCC_I2C6CFGR				0x7B8410#define RCC_I2C7CFGR				0x7BC411#define RCC_I2C8CFGR				0x7C0412#define RCC_SAI1CFGR				0x7C4413#define RCC_SAI2CFGR				0x7C8414#define RCC_SAI3CFGR				0x7CC415#define RCC_SAI4CFGR				0x7D0416#define RCC_MDF1CFGR				0x7D8417#define RCC_ADF1CFGR				0x7DC418#define RCC_FDCANCFGR				0x7E0419#define RCC_HDPCFGR				0x7E4420#define RCC_ADC12CFGR				0x7E8421#define RCC_ADC3CFGR				0x7EC422#define RCC_ETH1CFGR				0x7F0423#define RCC_ETH2CFGR				0x7F4424#define RCC_USBHCFGR				0x7FC425#define RCC_USB2PHY1CFGR			0x800426#define RCC_USB2PHY2CFGR			0x804427#define RCC_USB3DRCFGR				0x808428#define RCC_USB3PCIEPHYCFGR			0x80C429#define RCC_PCIECFGR				0x810430#define RCC_USBTCCFGR				0x814431#define RCC_ETHSWCFGR				0x818432#define RCC_ETHSWACMCFGR			0x81C433#define RCC_ETHSWACMMSGCFGR			0x820434#define RCC_STGENCFGR				0x824435#define RCC_SDMMC1CFGR				0x830436#define RCC_SDMMC2CFGR				0x834437#define RCC_SDMMC3CFGR				0x838438#define RCC_GPUCFGR				0x83C439#define RCC_LTDCCFGR				0x840440#define RCC_DSICFGR				0x844441#define RCC_LVDSCFGR				0x850442#define RCC_CSICFGR				0x858443#define RCC_DCMIPPCFGR				0x85C444#define RCC_CCICFGR				0x860445#define RCC_VDECCFGR				0x864446#define RCC_VENCCFGR				0x868447#define RCC_RNGCFGR				0x870448#define RCC_PKACFGR				0x874449#define RCC_SAESCFGR				0x878450#define RCC_HASHCFGR				0x87C451#define RCC_CRYP1CFGR				0x880452#define RCC_CRYP2CFGR				0x884453#define RCC_IWDG1CFGR				0x888454#define RCC_IWDG2CFGR				0x88C455#define RCC_IWDG3CFGR				0x890456#define RCC_IWDG4CFGR				0x894457#define RCC_IWDG5CFGR				0x898458#define RCC_WWDG1CFGR				0x89C459#define RCC_WWDG2CFGR				0x8A0460#define RCC_VREFCFGR				0x8A8461#define RCC_DTSCFGR				0x8AC462#define RCC_CRCCFGR				0x8B4463#define RCC_SERCCFGR				0x8B8464#define RCC_OSPIIOMCFGR				0x8BC465#define RCC_GICV2MCFGR				0x8C0466#define RCC_I3C1CFGR				0x8C8467#define RCC_I3C2CFGR				0x8CC468#define RCC_I3C3CFGR				0x8D0469#define RCC_I3C4CFGR				0x8D4470#define RCC_MUXSELCFGR				0x1000471#define RCC_XBAR0CFGR				0x1018472#define RCC_XBAR1CFGR				0x101C473#define RCC_XBAR2CFGR				0x1020474#define RCC_XBAR3CFGR				0x1024475#define RCC_XBAR4CFGR				0x1028476#define RCC_XBAR5CFGR				0x102C477#define RCC_XBAR6CFGR				0x1030478#define RCC_XBAR7CFGR				0x1034479#define RCC_XBAR8CFGR				0x1038480#define RCC_XBAR9CFGR				0x103C481#define RCC_XBAR10CFGR				0x1040482#define RCC_XBAR11CFGR				0x1044483#define RCC_XBAR12CFGR				0x1048484#define RCC_XBAR13CFGR				0x104C485#define RCC_XBAR14CFGR				0x1050486#define RCC_XBAR15CFGR				0x1054487#define RCC_XBAR16CFGR				0x1058488#define RCC_XBAR17CFGR				0x105C489#define RCC_XBAR18CFGR				0x1060490#define RCC_XBAR19CFGR				0x1064491#define RCC_XBAR20CFGR				0x1068492#define RCC_XBAR21CFGR				0x106C493#define RCC_XBAR22CFGR				0x1070494#define RCC_XBAR23CFGR				0x1074495#define RCC_XBAR24CFGR				0x1078496#define RCC_XBAR25CFGR				0x107C497#define RCC_XBAR26CFGR				0x1080498#define RCC_XBAR27CFGR				0x1084499#define RCC_XBAR28CFGR				0x1088500#define RCC_XBAR29CFGR				0x108C501#define RCC_XBAR30CFGR				0x1090502#define RCC_XBAR31CFGR				0x1094503#define RCC_XBAR32CFGR				0x1098504#define RCC_XBAR33CFGR				0x109C505#define RCC_XBAR34CFGR				0x10A0506#define RCC_XBAR35CFGR				0x10A4507#define RCC_XBAR36CFGR				0x10A8508#define RCC_XBAR37CFGR				0x10AC509#define RCC_XBAR38CFGR				0x10B0510#define RCC_XBAR39CFGR				0x10B4511#define RCC_XBAR40CFGR				0x10B8512#define RCC_XBAR41CFGR				0x10BC513#define RCC_XBAR42CFGR				0x10C0514#define RCC_XBAR43CFGR				0x10C4515#define RCC_XBAR44CFGR				0x10C8516#define RCC_XBAR45CFGR				0x10CC517#define RCC_XBAR46CFGR				0x10D0518#define RCC_XBAR47CFGR				0x10D4519#define RCC_XBAR48CFGR				0x10D8520#define RCC_XBAR49CFGR				0x10DC521#define RCC_XBAR50CFGR				0x10E0522#define RCC_XBAR51CFGR				0x10E4523#define RCC_XBAR52CFGR				0x10E8524#define RCC_XBAR53CFGR				0x10EC525#define RCC_XBAR54CFGR				0x10F0526#define RCC_XBAR55CFGR				0x10F4527#define RCC_XBAR56CFGR				0x10F8528#define RCC_XBAR57CFGR				0x10FC529#define RCC_XBAR58CFGR				0x1100530#define RCC_XBAR59CFGR				0x1104531#define RCC_XBAR60CFGR				0x1108532#define RCC_XBAR61CFGR				0x110C533#define RCC_XBAR62CFGR				0x1110534#define RCC_XBAR63CFGR				0x1114535#define RCC_PREDIV0CFGR				0x1118536#define RCC_PREDIV1CFGR				0x111C537#define RCC_PREDIV2CFGR				0x1120538#define RCC_PREDIV3CFGR				0x1124539#define RCC_PREDIV4CFGR				0x1128540#define RCC_PREDIV5CFGR				0x112C541#define RCC_PREDIV6CFGR				0x1130542#define RCC_PREDIV7CFGR				0x1134543#define RCC_PREDIV8CFGR				0x1138544#define RCC_PREDIV9CFGR				0x113C545#define RCC_PREDIV10CFGR			0x1140546#define RCC_PREDIV11CFGR			0x1144547#define RCC_PREDIV12CFGR			0x1148548#define RCC_PREDIV13CFGR			0x114C549#define RCC_PREDIV14CFGR			0x1150550#define RCC_PREDIV15CFGR			0x1154551#define RCC_PREDIV16CFGR			0x1158552#define RCC_PREDIV17CFGR			0x115C553#define RCC_PREDIV18CFGR			0x1160554#define RCC_PREDIV19CFGR			0x1164555#define RCC_PREDIV20CFGR			0x1168556#define RCC_PREDIV21CFGR			0x116C557#define RCC_PREDIV22CFGR			0x1170558#define RCC_PREDIV23CFGR			0x1174559#define RCC_PREDIV24CFGR			0x1178560#define RCC_PREDIV25CFGR			0x117C561#define RCC_PREDIV26CFGR			0x1180562#define RCC_PREDIV27CFGR			0x1184563#define RCC_PREDIV28CFGR			0x1188564#define RCC_PREDIV29CFGR			0x118C565#define RCC_PREDIV30CFGR			0x1190566#define RCC_PREDIV31CFGR			0x1194567#define RCC_PREDIV32CFGR			0x1198568#define RCC_PREDIV33CFGR			0x119C569#define RCC_PREDIV34CFGR			0x11A0570#define RCC_PREDIV35CFGR			0x11A4571#define RCC_PREDIV36CFGR			0x11A8572#define RCC_PREDIV37CFGR			0x11AC573#define RCC_PREDIV38CFGR			0x11B0574#define RCC_PREDIV39CFGR			0x11B4575#define RCC_PREDIV40CFGR			0x11B8576#define RCC_PREDIV41CFGR			0x11BC577#define RCC_PREDIV42CFGR			0x11C0578#define RCC_PREDIV43CFGR			0x11C4579#define RCC_PREDIV44CFGR			0x11C8580#define RCC_PREDIV45CFGR			0x11CC581#define RCC_PREDIV46CFGR			0x11D0582#define RCC_PREDIV47CFGR			0x11D4583#define RCC_PREDIV48CFGR			0x11D8584#define RCC_PREDIV49CFGR			0x11DC585#define RCC_PREDIV50CFGR			0x11E0586#define RCC_PREDIV51CFGR			0x11E4587#define RCC_PREDIV52CFGR			0x11E8588#define RCC_PREDIV53CFGR			0x11EC589#define RCC_PREDIV54CFGR			0x11F0590#define RCC_PREDIV55CFGR			0x11F4591#define RCC_PREDIV56CFGR			0x11F8592#define RCC_PREDIV57CFGR			0x11FC593#define RCC_PREDIV58CFGR			0x1200594#define RCC_PREDIV59CFGR			0x1204595#define RCC_PREDIV60CFGR			0x1208596#define RCC_PREDIV61CFGR			0x120C597#define RCC_PREDIV62CFGR			0x1210598#define RCC_PREDIV63CFGR			0x1214599#define RCC_PREDIVSR1				0x1218600#define RCC_PREDIVSR2				0x121C601#define RCC_FINDIV0CFGR				0x1224602#define RCC_FINDIV1CFGR				0x1228603#define RCC_FINDIV2CFGR				0x122C604#define RCC_FINDIV3CFGR				0x1230605#define RCC_FINDIV4CFGR				0x1234606#define RCC_FINDIV5CFGR				0x1238607#define RCC_FINDIV6CFGR				0x123C608#define RCC_FINDIV7CFGR				0x1240609#define RCC_FINDIV8CFGR				0x1244610#define RCC_FINDIV9CFGR				0x1248611#define RCC_FINDIV10CFGR			0x124C612#define RCC_FINDIV11CFGR			0x1250613#define RCC_FINDIV12CFGR			0x1254614#define RCC_FINDIV13CFGR			0x1258615#define RCC_FINDIV14CFGR			0x125C616#define RCC_FINDIV15CFGR			0x1260617#define RCC_FINDIV16CFGR			0x1264618#define RCC_FINDIV17CFGR			0x1268619#define RCC_FINDIV18CFGR			0x126C620#define RCC_FINDIV19CFGR			0x1270621#define RCC_FINDIV20CFGR			0x1274622#define RCC_FINDIV21CFGR			0x1278623#define RCC_FINDIV22CFGR			0x127C624#define RCC_FINDIV23CFGR			0x1280625#define RCC_FINDIV24CFGR			0x1284626#define RCC_FINDIV25CFGR			0x1288627#define RCC_FINDIV26CFGR			0x128C628#define RCC_FINDIV27CFGR			0x1290629#define RCC_FINDIV28CFGR			0x1294630#define RCC_FINDIV29CFGR			0x1298631#define RCC_FINDIV30CFGR			0x129C632#define RCC_FINDIV31CFGR			0x12A0633#define RCC_FINDIV32CFGR			0x12A4634#define RCC_FINDIV33CFGR			0x12A8635#define RCC_FINDIV34CFGR			0x12AC636#define RCC_FINDIV35CFGR			0x12B0637#define RCC_FINDIV36CFGR			0x12B4638#define RCC_FINDIV37CFGR			0x12B8639#define RCC_FINDIV38CFGR			0x12BC640#define RCC_FINDIV39CFGR			0x12C0641#define RCC_FINDIV40CFGR			0x12C4642#define RCC_FINDIV41CFGR			0x12C8643#define RCC_FINDIV42CFGR			0x12CC644#define RCC_FINDIV43CFGR			0x12D0645#define RCC_FINDIV44CFGR			0x12D4646#define RCC_FINDIV45CFGR			0x12D8647#define RCC_FINDIV46CFGR			0x12DC648#define RCC_FINDIV47CFGR			0x12E0649#define RCC_FINDIV48CFGR			0x12E4650#define RCC_FINDIV49CFGR			0x12E8651#define RCC_FINDIV50CFGR			0x12EC652#define RCC_FINDIV51CFGR			0x12F0653#define RCC_FINDIV52CFGR			0x12F4654#define RCC_FINDIV53CFGR			0x12F8655#define RCC_FINDIV54CFGR			0x12FC656#define RCC_FINDIV55CFGR			0x1300657#define RCC_FINDIV56CFGR			0x1304658#define RCC_FINDIV57CFGR			0x1308659#define RCC_FINDIV58CFGR			0x130C660#define RCC_FINDIV59CFGR			0x1310661#define RCC_FINDIV60CFGR			0x1314662#define RCC_FINDIV61CFGR			0x1318663#define RCC_FINDIV62CFGR			0x131C664#define RCC_FINDIV63CFGR			0x1320665#define RCC_FINDIVSR1				0x1324666#define RCC_FINDIVSR2				0x1328667#define RCC_FCALCOBS0CFGR			0x1340668#define RCC_FCALCOBS1CFGR			0x1344669#define RCC_FCALCREFCFGR			0x1348670#define RCC_FCALCCR1				0x134C671#define RCC_FCALCCR2				0x1354672#define RCC_FCALCSR				0x1358673#define RCC_PLL4CFGR1				0x1360674#define RCC_PLL4CFGR2				0x1364675#define RCC_PLL4CFGR3				0x1368676#define RCC_PLL4CFGR4				0x136C677#define RCC_PLL4CFGR5				0x1370678#define RCC_PLL4CFGR6				0x1378679#define RCC_PLL4CFGR7				0x137C680#define RCC_PLL5CFGR1				0x1388681#define RCC_PLL5CFGR2				0x138C682#define RCC_PLL5CFGR3				0x1390683#define RCC_PLL5CFGR4				0x1394684#define RCC_PLL5CFGR5				0x1398685#define RCC_PLL5CFGR6				0x13A0686#define RCC_PLL5CFGR7				0x13A4687#define RCC_PLL6CFGR1				0x13B0688#define RCC_PLL6CFGR2				0x13B4689#define RCC_PLL6CFGR3				0x13B8690#define RCC_PLL6CFGR4				0x13BC691#define RCC_PLL6CFGR5				0x13C0692#define RCC_PLL6CFGR6				0x13C8693#define RCC_PLL6CFGR7				0x13CC694#define RCC_PLL7CFGR1				0x13D8695#define RCC_PLL7CFGR2				0x13DC696#define RCC_PLL7CFGR3				0x13E0697#define RCC_PLL7CFGR4				0x13E4698#define RCC_PLL7CFGR5				0x13E8699#define RCC_PLL7CFGR6				0x13F0700#define RCC_PLL7CFGR7				0x13F4701#define RCC_PLL8CFGR1				0x1400702#define RCC_PLL8CFGR2				0x1404703#define RCC_PLL8CFGR3				0x1408704#define RCC_PLL8CFGR4				0x140C705#define RCC_PLL8CFGR5				0x1410706#define RCC_PLL8CFGR6				0x1418707#define RCC_PLL8CFGR7				0x141C708#define RCC_VERR				0xFFF4709#define RCC_IDR					0xFFF8710#define RCC_SIDR				0xFFFC711 712#endif /* STM32MP25_RCC_H */713