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1/* SPDX-License-Identifier: GPL-2.0-or-later */2/*3 * Copyright 2016 Chen-Yu Tsai4 *5 * Chen-Yu Tsai <wens@csie.org>6 */7 8#ifndef _CCU_SUN8I_A83T_H_9#define _CCU_SUN8I_A83T_H_10 11#include <dt-bindings/clock/sun8i-a83t-ccu.h>12#include <dt-bindings/reset/sun8i-a83t-ccu.h>13 14#define CLK_PLL_C0CPUX 015#define CLK_PLL_C1CPUX 116#define CLK_PLL_AUDIO 217#define CLK_PLL_VIDEO0 318#define CLK_PLL_VE 419#define CLK_PLL_DDR 520 21/* pll-periph is exported to the PRCM block */22 23#define CLK_PLL_GPU 724#define CLK_PLL_HSIC 825 26/* pll-de is exported for the display engine */27 28#define CLK_PLL_VIDEO1 1029 30/* The CPUX clocks are exported */31 32#define CLK_AXI0 1333#define CLK_AXI1 1434#define CLK_AHB1 1535#define CLK_AHB2 1636#define CLK_APB1 1737#define CLK_APB2 1838 39/* bus gates exported */40 41#define CLK_CCI400 5842 43/* module and usb clocks exported */44 45#define CLK_DRAM 8246 47/* dram gates and more module clocks exported */48 49#define CLK_MBUS 9550 51/* more module clocks exported */52 53#define CLK_NUMBER (CLK_GPU_HYD + 1)54 55#endif /* _CCU_SUN8I_A83T_H_ */56