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1// SPDX-License-Identifier: GPL-2.0-or-later2/*3 * Copyright (C) 2015 Jens Kuske <jenskuske@gmail.com>4 *5 * Based on clk-simple-gates.c, which is:6 * Copyright 2015 Maxime Ripard7 *8 * Maxime Ripard <maxime.ripard@free-electrons.com>9 */10 11#include <linux/clk-provider.h>12#include <linux/io.h>13#include <linux/of.h>14#include <linux/of_address.h>15#include <linux/slab.h>16#include <linux/spinlock.h>17 18static DEFINE_SPINLOCK(gates_lock);19 20static void __init sun8i_h3_bus_gates_init(struct device_node *node)21{22 static const char * const names[] = { "ahb1", "ahb2", "apb1", "apb2" };23 enum { AHB1, AHB2, APB1, APB2, PARENT_MAX } clk_parent;24 const char *parents[PARENT_MAX];25 struct clk_onecell_data *clk_data;26 const char *clk_name;27 struct resource res;28 void __iomem *clk_reg;29 void __iomem *reg;30 int number, i;31 u8 clk_bit;32 int index;33 34 reg = of_io_request_and_map(node, 0, of_node_full_name(node));35 if (IS_ERR(reg))36 return;37 38 for (i = 0; i < ARRAY_SIZE(names); i++) {39 int idx = of_property_match_string(node, "clock-names",40 names[i]);41 if (idx < 0)42 return;43 44 parents[i] = of_clk_get_parent_name(node, idx);45 }46 47 clk_data = kmalloc(sizeof(struct clk_onecell_data), GFP_KERNEL);48 if (!clk_data)49 goto err_unmap;50 51 number = of_property_count_u32_elems(node, "clock-indices");52 of_property_read_u32_index(node, "clock-indices", number - 1, &number);53 54 clk_data->clks = kcalloc(number + 1, sizeof(struct clk *), GFP_KERNEL);55 if (!clk_data->clks)56 goto err_free_data;57 58 i = 0;59 of_property_for_each_u32(node, "clock-indices", index) {60 of_property_read_string_index(node, "clock-output-names",61 i, &clk_name);62 63 if (index == 17 || (index >= 29 && index <= 31))64 clk_parent = AHB2;65 else if (index <= 63 || index >= 128)66 clk_parent = AHB1;67 else if (index >= 64 && index <= 95)68 clk_parent = APB1;69 else if (index >= 96 && index <= 127)70 clk_parent = APB2;71 else {72 WARN_ON(true);73 continue;74 }75 76 clk_reg = reg + 4 * (index / 32);77 clk_bit = index % 32;78 79 clk_data->clks[index] = clk_register_gate(NULL, clk_name,80 parents[clk_parent],81 0, clk_reg, clk_bit,82 0, &gates_lock);83 i++;84 85 if (IS_ERR(clk_data->clks[index])) {86 WARN_ON(true);87 continue;88 }89 }90 91 clk_data->clk_num = number + 1;92 of_clk_add_provider(node, of_clk_src_onecell_get, clk_data);93 94 return;95 96err_free_data:97 kfree(clk_data);98err_unmap:99 iounmap(reg);100 of_address_to_resource(node, 0, &res);101 release_mem_region(res.start, resource_size(&res));102}103 104CLK_OF_DECLARE(sun8i_h3_bus_gates, "allwinner,sun8i-h3-bus-gates-clk",105 sun8i_h3_bus_gates_init);106CLK_OF_DECLARE(sun8i_a83t_bus_gates, "allwinner,sun8i-a83t-bus-gates-clk",107 sun8i_h3_bus_gates_init);108