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1// SPDX-License-Identifier: GPL-2.0-only2/*3 * TI clock support4 *5 * Copyright (C) 2013 Texas Instruments, Inc.6 *7 * Tero Kristo <t-kristo@ti.com>8 */9 10#include <linux/cleanup.h>11#include <linux/clk.h>12#include <linux/clk-provider.h>13#include <linux/clkdev.h>14#include <linux/clk/ti.h>15#include <linux/io.h>16#include <linux/of.h>17#include <linux/of_address.h>18#include <linux/list.h>19#include <linux/minmax.h>20#include <linux/regmap.h>21#include <linux/string_helpers.h>22#include <linux/memblock.h>23#include <linux/device.h>24 25#include "clock.h"26 27#undef pr_fmt28#define pr_fmt(fmt) "%s: " fmt, __func__29 30static LIST_HEAD(clk_hw_omap_clocks);31struct ti_clk_ll_ops *ti_clk_ll_ops;32static struct device_node *clocks_node_ptr[CLK_MAX_MEMMAPS];33 34struct ti_clk_features ti_clk_features;35 36struct clk_iomap {37 struct regmap *regmap;38 void __iomem *mem;39};40 41static struct clk_iomap *clk_memmaps[CLK_MAX_MEMMAPS];42 43static void clk_memmap_writel(u32 val, const struct clk_omap_reg *reg)44{45 struct clk_iomap *io = clk_memmaps[reg->index];46 47 if (reg->ptr)48 writel_relaxed(val, reg->ptr);49 else if (io->regmap)50 regmap_write(io->regmap, reg->offset, val);51 else52 writel_relaxed(val, io->mem + reg->offset);53}54 55static void _clk_rmw(u32 val, u32 mask, void __iomem *ptr)56{57 u32 v;58 59 v = readl_relaxed(ptr);60 v &= ~mask;61 v |= val;62 writel_relaxed(v, ptr);63}64 65static void clk_memmap_rmw(u32 val, u32 mask, const struct clk_omap_reg *reg)66{67 struct clk_iomap *io = clk_memmaps[reg->index];68 69 if (reg->ptr) {70 _clk_rmw(val, mask, reg->ptr);71 } else if (io->regmap) {72 regmap_update_bits(io->regmap, reg->offset, mask, val);73 } else {74 _clk_rmw(val, mask, io->mem + reg->offset);75 }76}77 78static u32 clk_memmap_readl(const struct clk_omap_reg *reg)79{80 u32 val;81 struct clk_iomap *io = clk_memmaps[reg->index];82 83 if (reg->ptr)84 val = readl_relaxed(reg->ptr);85 else if (io->regmap)86 regmap_read(io->regmap, reg->offset, &val);87 else88 val = readl_relaxed(io->mem + reg->offset);89 90 return val;91}92 93/**94 * ti_clk_setup_ll_ops - setup low level clock operations95 * @ops: low level clock ops descriptor96 *97 * Sets up low level clock operations for TI clock driver. This is used98 * to provide various callbacks for the clock driver towards platform99 * specific code. Returns 0 on success, -EBUSY if ll_ops have been100 * registered already.101 */102int ti_clk_setup_ll_ops(struct ti_clk_ll_ops *ops)103{104 if (ti_clk_ll_ops) {105 pr_err("Attempt to register ll_ops multiple times.\n");106 return -EBUSY;107 }108 109 ti_clk_ll_ops = ops;110 ops->clk_readl = clk_memmap_readl;111 ops->clk_writel = clk_memmap_writel;112 ops->clk_rmw = clk_memmap_rmw;113 114 return 0;115}116 117/*118 * Eventually we could standardize to using '_' for clk-*.c files to follow the119 * TRM naming.120 */121static struct device_node *ti_find_clock_provider(struct device_node *from,122 const char *name)123{124 char *tmp __free(kfree) = NULL;125 struct device_node *np;126 bool found = false;127 const char *n;128 char *p;129 130 tmp = kstrdup_and_replace(name, '-', '_', GFP_KERNEL);131 if (!tmp)132 return NULL;133 134 /* Ignore a possible address for the node name */135 p = strchr(tmp, '@');136 if (p)137 *p = '\0';138 139 /* Node named "clock" with "clock-output-names" */140 for_each_of_allnodes_from(from, np) {141 if (of_property_read_string_index(np, "clock-output-names",142 0, &n))143 continue;144 145 if (!strncmp(n, tmp, strlen(tmp))) {146 of_node_get(np);147 found = true;148 break;149 }150 }151 152 if (found) {153 of_node_put(from);154 return np;155 }156 157 /* Fall back to using old node name base provider name */158 return of_find_node_by_name(from, tmp);159}160 161/**162 * ti_dt_clocks_register - register DT alias clocks during boot163 * @oclks: list of clocks to register164 *165 * Register alias or non-standard DT clock entries during boot. By166 * default, DT clocks are found based on their clock-output-names167 * property, or the clock node name for legacy cases. If any168 * additional con-id / dev-id -> clock mapping is required, use this169 * function to list these.170 */171void __init ti_dt_clocks_register(struct ti_dt_clk oclks[])172{173 struct ti_dt_clk *c;174 struct device_node *node, *parent, *child;175 struct clk *clk;176 struct of_phandle_args clkspec;177 char buf[64];178 char *ptr;179 char *tags[2];180 int i;181 int num_args;182 int ret;183 static bool clkctrl_nodes_missing;184 static bool has_clkctrl_data;185 static bool compat_mode;186 187 compat_mode = ti_clk_get_features()->flags & TI_CLK_CLKCTRL_COMPAT;188 189 for (c = oclks; c->node_name != NULL; c++) {190 strcpy(buf, c->node_name);191 ptr = buf;192 for (i = 0; i < 2; i++)193 tags[i] = NULL;194 num_args = 0;195 while (*ptr) {196 if (*ptr == ':') {197 if (num_args >= 2) {198 pr_warn("Bad number of tags on %s\n",199 c->node_name);200 return;201 }202 tags[num_args++] = ptr + 1;203 *ptr = 0;204 }205 ptr++;206 }207 208 if (num_args && clkctrl_nodes_missing)209 continue;210 211 node = ti_find_clock_provider(NULL, buf);212 if (num_args && compat_mode) {213 parent = node;214 child = of_get_child_by_name(parent, "clock");215 if (!child)216 child = of_get_child_by_name(parent, "clk");217 if (child) {218 of_node_put(parent);219 node = child;220 }221 }222 223 clkspec.np = node;224 clkspec.args_count = num_args;225 for (i = 0; i < num_args; i++) {226 ret = kstrtoint(tags[i], i ? 10 : 16, clkspec.args + i);227 if (ret) {228 pr_warn("Bad tag in %s at %d: %s\n",229 c->node_name, i, tags[i]);230 of_node_put(node);231 return;232 }233 }234 clk = of_clk_get_from_provider(&clkspec);235 of_node_put(node);236 if (!IS_ERR(clk)) {237 c->lk.clk = clk;238 clkdev_add(&c->lk);239 } else {240 if (num_args && !has_clkctrl_data) {241 struct device_node *np;242 243 np = of_find_compatible_node(NULL, NULL,244 "ti,clkctrl");245 if (np) {246 has_clkctrl_data = true;247 of_node_put(np);248 } else {249 clkctrl_nodes_missing = true;250 251 pr_warn("missing clkctrl nodes, please update your dts.\n");252 continue;253 }254 }255 256 pr_warn("failed to lookup clock node %s, ret=%ld\n",257 c->node_name, PTR_ERR(clk));258 }259 }260}261 262struct clk_init_item {263 struct device_node *node;264 void *user;265 ti_of_clk_init_cb_t func;266 struct list_head link;267};268 269static LIST_HEAD(retry_list);270 271/**272 * ti_clk_retry_init - retries a failed clock init at later phase273 * @node: device node for the clock274 * @user: user data pointer275 * @func: init function to be called for the clock276 *277 * Adds a failed clock init to the retry list. The retry list is parsed278 * once all the other clocks have been initialized.279 */280int __init ti_clk_retry_init(struct device_node *node, void *user,281 ti_of_clk_init_cb_t func)282{283 struct clk_init_item *retry;284 285 pr_debug("%pOFn: adding to retry list...\n", node);286 retry = kzalloc(sizeof(*retry), GFP_KERNEL);287 if (!retry)288 return -ENOMEM;289 290 retry->node = node;291 retry->func = func;292 retry->user = user;293 list_add(&retry->link, &retry_list);294 295 return 0;296}297 298/**299 * ti_clk_get_reg_addr - get register address for a clock register300 * @node: device node for the clock301 * @index: register index from the clock node302 * @reg: pointer to target register struct303 *304 * Builds clock register address from device tree information, and returns305 * the data via the provided output pointer @reg. Returns 0 on success,306 * negative error value on failure.307 */308int ti_clk_get_reg_addr(struct device_node *node, int index,309 struct clk_omap_reg *reg)310{311 u32 clksel_addr, val;312 bool is_clksel = false;313 int i, err;314 315 for (i = 0; i < CLK_MAX_MEMMAPS; i++) {316 if (clocks_node_ptr[i] == node->parent)317 break;318 if (clocks_node_ptr[i] == node->parent->parent)319 break;320 }321 322 if (i == CLK_MAX_MEMMAPS) {323 pr_err("clk-provider not found for %pOFn!\n", node);324 return -ENOENT;325 }326 327 reg->index = i;328 329 if (of_device_is_compatible(node->parent, "ti,clksel")) {330 err = of_property_read_u32_index(node->parent, "reg", index, &clksel_addr);331 if (err) {332 pr_err("%pOFn parent clksel must have reg[%d]!\n", node, index);333 return -EINVAL;334 }335 is_clksel = true;336 }337 338 err = of_property_read_u32_index(node, "reg", index, &val);339 if (err && is_clksel) {340 /* Legacy clksel with no reg and a possible ti,bit-shift property */341 reg->offset = clksel_addr;342 reg->bit = ti_clk_get_legacy_bit_shift(node);343 reg->ptr = NULL;344 345 return 0;346 }347 348 /* Updated clksel clock with a proper reg property */349 if (is_clksel) {350 reg->offset = clksel_addr;351 reg->bit = val;352 reg->ptr = NULL;353 return 0;354 }355 356 /* Other clocks that may or may not have ti,bit-shift property */357 reg->offset = val;358 reg->bit = ti_clk_get_legacy_bit_shift(node);359 reg->ptr = NULL;360 361 return 0;362}363 364/**365 * ti_clk_get_legacy_bit_shift - get bit shift for a clock register366 * @node: device node for the clock367 *368 * Gets the clock register bit shift using the legacy ti,bit-shift369 * property. Only needed for legacy clock, and can be eventually370 * dropped once all the composite clocks use a clksel node with a371 * proper reg property.372 */373int ti_clk_get_legacy_bit_shift(struct device_node *node)374{375 int err;376 u32 val;377 378 err = of_property_read_u32(node, "ti,bit-shift", &val);379 if (!err && in_range(val, 0, 32))380 return val;381 382 return 0;383}384 385void ti_clk_latch(struct clk_omap_reg *reg, s8 shift)386{387 u32 latch;388 389 if (shift < 0)390 return;391 392 latch = 1 << shift;393 394 ti_clk_ll_ops->clk_rmw(latch, latch, reg);395 ti_clk_ll_ops->clk_rmw(0, latch, reg);396 ti_clk_ll_ops->clk_readl(reg); /* OCP barrier */397}398 399/**400 * omap2_clk_provider_init - init master clock provider401 * @parent: master node402 * @index: internal index for clk_reg_ops403 * @syscon: syscon regmap pointer for accessing clock registers404 * @mem: iomem pointer for the clock provider memory area, only used if405 * syscon is not provided406 *407 * Initializes a master clock IP block. This basically sets up the408 * mapping from clocks node to the memory map index. All the clocks409 * are then initialized through the common of_clk_init call, and the410 * clocks will access their memory maps based on the node layout.411 * Returns 0 in success.412 */413int __init omap2_clk_provider_init(struct device_node *parent, int index,414 struct regmap *syscon, void __iomem *mem)415{416 struct device_node *clocks;417 struct clk_iomap *io;418 419 /* get clocks for this parent */420 clocks = of_get_child_by_name(parent, "clocks");421 if (!clocks) {422 pr_err("%pOFn missing 'clocks' child node.\n", parent);423 return -EINVAL;424 }425 426 /* add clocks node info */427 clocks_node_ptr[index] = clocks;428 429 io = kzalloc(sizeof(*io), GFP_KERNEL);430 if (!io)431 return -ENOMEM;432 433 io->regmap = syscon;434 io->mem = mem;435 436 clk_memmaps[index] = io;437 438 return 0;439}440 441/**442 * omap2_clk_legacy_provider_init - initialize a legacy clock provider443 * @index: index for the clock provider444 * @mem: iomem pointer for the clock provider memory area445 *446 * Initializes a legacy clock provider memory mapping.447 */448void __init omap2_clk_legacy_provider_init(int index, void __iomem *mem)449{450 struct clk_iomap *io;451 452 io = memblock_alloc(sizeof(*io), SMP_CACHE_BYTES);453 if (!io)454 panic("%s: Failed to allocate %zu bytes\n", __func__,455 sizeof(*io));456 457 io->mem = mem;458 459 clk_memmaps[index] = io;460}461 462/**463 * ti_dt_clk_init_retry_clks - init clocks from the retry list464 *465 * Initializes any clocks that have failed to initialize before,466 * reasons being missing parent node(s) during earlier init. This467 * typically happens only for DPLLs which need to have both of their468 * parent clocks ready during init.469 */470void ti_dt_clk_init_retry_clks(void)471{472 struct clk_init_item *retry;473 struct clk_init_item *tmp;474 int retries = 5;475 476 while (!list_empty(&retry_list) && retries) {477 list_for_each_entry_safe(retry, tmp, &retry_list, link) {478 pr_debug("retry-init: %pOFn\n", retry->node);479 retry->func(retry->user, retry->node);480 list_del(&retry->link);481 kfree(retry);482 }483 retries--;484 }485}486 487static const struct of_device_id simple_clk_match_table[] __initconst = {488 { .compatible = "fixed-clock" },489 { .compatible = "fixed-factor-clock" },490 { }491};492 493/**494 * ti_dt_clk_name - init clock name from first output name or node name495 * @np: device node496 *497 * Use the first clock-output-name for the clock name if found. Fall back498 * to legacy naming based on node name.499 */500const char *ti_dt_clk_name(struct device_node *np)501{502 const char *name;503 504 if (!of_property_read_string_index(np, "clock-output-names", 0,505 &name))506 return name;507 508 return np->name;509}510 511/**512 * ti_clk_add_aliases - setup clock aliases513 *514 * Sets up any missing clock aliases. No return value.515 */516void __init ti_clk_add_aliases(void)517{518 struct device_node *np;519 struct clk *clk;520 521 for_each_matching_node(np, simple_clk_match_table) {522 struct of_phandle_args clkspec;523 524 clkspec.np = np;525 clk = of_clk_get_from_provider(&clkspec);526 527 ti_clk_add_alias(clk, ti_dt_clk_name(np));528 }529}530 531/**532 * ti_clk_setup_features - setup clock features flags533 * @features: features definition to use534 *535 * Initializes the clock driver features flags based on platform536 * provided data. No return value.537 */538void __init ti_clk_setup_features(struct ti_clk_features *features)539{540 memcpy(&ti_clk_features, features, sizeof(*features));541}542 543/**544 * ti_clk_get_features - get clock driver features flags545 *546 * Get TI clock driver features description. Returns a pointer547 * to the current feature setup.548 */549const struct ti_clk_features *ti_clk_get_features(void)550{551 return &ti_clk_features;552}553 554/**555 * omap2_clk_enable_init_clocks - prepare & enable a list of clocks556 * @clk_names: ptr to an array of strings of clock names to enable557 * @num_clocks: number of clock names in @clk_names558 *559 * Prepare and enable a list of clocks, named by @clk_names. No560 * return value. XXX Deprecated; only needed until these clocks are561 * properly claimed and enabled by the drivers or core code that uses562 * them. XXX What code disables & calls clk_put on these clocks?563 */564void omap2_clk_enable_init_clocks(const char **clk_names, u8 num_clocks)565{566 struct clk *init_clk;567 int i;568 569 for (i = 0; i < num_clocks; i++) {570 init_clk = clk_get(NULL, clk_names[i]);571 if (WARN(IS_ERR(init_clk), "could not find init clock %s\n",572 clk_names[i]))573 continue;574 clk_prepare_enable(init_clk);575 }576}577 578/**579 * ti_clk_add_alias - add a clock alias for a TI clock580 * @clk: clock handle to create alias for581 * @con: connection ID for this clock582 *583 * Creates a clock alias for a TI clock. Allocates the clock lookup entry584 * and assigns the data to it. Returns 0 if successful, negative error585 * value otherwise.586 */587int ti_clk_add_alias(struct clk *clk, const char *con)588{589 struct clk_lookup *cl;590 591 if (!clk)592 return 0;593 594 if (IS_ERR(clk))595 return PTR_ERR(clk);596 597 cl = kzalloc(sizeof(*cl), GFP_KERNEL);598 if (!cl)599 return -ENOMEM;600 601 cl->con_id = con;602 cl->clk = clk;603 604 clkdev_add(cl);605 606 return 0;607}608 609/**610 * of_ti_clk_register - register a TI clock to the common clock framework611 * @node: device node for this clock612 * @hw: hardware clock handle613 * @con: connection ID for this clock614 *615 * Registers a TI clock to the common clock framework, and adds a clock616 * alias for it. Returns a handle to the registered clock if successful,617 * ERR_PTR value in failure.618 */619struct clk *of_ti_clk_register(struct device_node *node, struct clk_hw *hw,620 const char *con)621{622 struct clk *clk;623 int ret;624 625 ret = of_clk_hw_register(node, hw);626 if (ret)627 return ERR_PTR(ret);628 629 clk = hw->clk;630 ret = ti_clk_add_alias(clk, con);631 if (ret) {632 clk_unregister(clk);633 return ERR_PTR(ret);634 }635 636 return clk;637}638 639/**640 * of_ti_clk_register_omap_hw - register a clk_hw_omap to the clock framework641 * @node: device node for this clock642 * @hw: hardware clock handle643 * @con: connection ID for this clock644 *645 * Registers a clk_hw_omap clock to the clock framewor, adds a clock alias646 * for it, and adds the list to the available clk_hw_omap type clocks.647 * Returns a handle to the registered clock if successful, ERR_PTR value648 * in failure.649 */650struct clk *of_ti_clk_register_omap_hw(struct device_node *node,651 struct clk_hw *hw, const char *con)652{653 struct clk *clk;654 struct clk_hw_omap *oclk;655 656 clk = of_ti_clk_register(node, hw, con);657 if (IS_ERR(clk))658 return clk;659 660 oclk = to_clk_hw_omap(hw);661 662 list_add(&oclk->node, &clk_hw_omap_clocks);663 664 return clk;665}666 667/**668 * omap2_clk_for_each - call function for each registered clk_hw_omap669 * @fn: pointer to a callback function670 *671 * Call @fn for each registered clk_hw_omap, passing @hw to each672 * function. @fn must return 0 for success or any other value for673 * failure. If @fn returns non-zero, the iteration across clocks674 * will stop and the non-zero return value will be passed to the675 * caller of omap2_clk_for_each().676 */677int omap2_clk_for_each(int (*fn)(struct clk_hw_omap *hw))678{679 int ret;680 struct clk_hw_omap *hw;681 682 list_for_each_entry(hw, &clk_hw_omap_clocks, node) {683 ret = (*fn)(hw);684 if (ret)685 break;686 }687 688 return ret;689}690 691/**692 * omap2_clk_is_hw_omap - check if the provided clk_hw is OMAP clock693 * @hw: clk_hw to check if it is an omap clock or not694 *695 * Checks if the provided clk_hw is OMAP clock or not. Returns true if696 * it is, false otherwise.697 */698bool omap2_clk_is_hw_omap(struct clk_hw *hw)699{700 struct clk_hw_omap *oclk;701 702 list_for_each_entry(oclk, &clk_hw_omap_clocks, node) {703 if (&oclk->hw == hw)704 return true;705 }706 707 return false;708}709