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1/* SPDX-License-Identifier: GPL-2.0-only */2/*3 * Toshiba Visconti clock controller4 *5 * Copyright (c) 2021 TOSHIBA CORPORATION6 * Copyright (c) 2021 Toshiba Electronic Devices & Storage Corporation7 *8 * Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>9 */10 11#ifndef _VISCONTI_CLKC_H_12#define _VISCONTI_CLKC_H_13 14#include <linux/mfd/syscon.h>15#include <linux/clk-provider.h>16#include <linux/of.h>17#include <linux/of_address.h>18#include <linux/delay.h>19#include <linux/regmap.h>20#include <linux/slab.h>21#include <linux/string.h>22#include <linux/io.h>23#include <linux/spinlock.h>24 25#include "reset.h"26 27struct visconti_clk_provider {28 struct device *dev;29 struct regmap *regmap;30 struct clk_hw_onecell_data clk_data;31};32 33struct visconti_clk_gate_table {34 unsigned int id;35 const char *name;36 const struct clk_parent_data *parent_data;37 u8 num_parents;38 u8 flags;39 u32 ckon_offset;40 u32 ckoff_offset;41 u8 ck_idx;42 unsigned int div;43 u8 rs_id;44};45 46struct visconti_fixed_clk {47 unsigned int id;48 const char *name;49 const char *parent;50 unsigned long flag;51 unsigned int mult;52 unsigned int div;53};54 55struct visconti_clk_gate {56 struct clk_hw hw;57 struct regmap *regmap;58 u32 ckon_offset;59 u32 ckoff_offset;60 u8 ck_idx;61 u8 flags;62 u32 rson_offset;63 u32 rsoff_offset;64 u8 rs_idx;65 spinlock_t *lock;66};67 68struct visconti_clk_provider *visconti_init_clk(struct device *dev,69 struct regmap *regmap,70 unsigned long nr_clks);71int visconti_clk_register_gates(struct visconti_clk_provider *data,72 const struct visconti_clk_gate_table *clks,73 int num_gate,74 const struct visconti_reset_data *reset,75 spinlock_t *lock);76 77#define NO_RESET 0xFF78 79#endif /* _VISCONTI_CLKC_H_ */80