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1# SPDX-License-Identifier: GPL-2.02 3config XILINX_VCU4 tristate "Xilinx VCU logicoreIP Init"5 depends on HAS_IOMEM6 select REGMAP_MMIO7 help8 Provides the driver to enable and disable the isolation between the9 processing system and programmable logic part by using the logicoreIP10 register set. This driver also configures the frequency based on the11 clock information from the logicoreIP register set.12 13 If you say yes here you get support for the logicoreIP.14 15 If unsure, say N.16 17 To compile this driver as a module, choose M here: the18 module will be called xlnx_vcu.19 20config COMMON_CLK_XLNX_CLKWZRD21 tristate "Xilinx Clocking Wizard"22 depends on OF23 depends on HAS_IOMEM24 help25 Support for the Xilinx Clocking Wizard IP core clock generator.26 Adds support for clocking wizard and compatible.27 This driver supports the Xilinx clocking wizard programmable clock28 synthesizer. The number of output is configurable in the design.29 30 If unsure, say N.31 32