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1// SPDX-License-Identifier: GPL-2.0-only2/*3 * Copyright (C) 2002 - 2005 Benjamin Herrenschmidt <benh@kernel.crashing.org>4 * Copyright (C) 2004 John Steele Scott <toojays@toojays.net>5 *6 * TODO: Need a big cleanup here. Basically, we need to have different7 * cpufreq_driver structures for the different type of HW instead of the8 * current mess. We also need to better deal with the detection of the9 * type of machine.10 */11 12#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt13 14#include <linux/module.h>15#include <linux/types.h>16#include <linux/errno.h>17#include <linux/kernel.h>18#include <linux/delay.h>19#include <linux/sched.h>20#include <linux/adb.h>21#include <linux/pmu.h>22#include <linux/cpufreq.h>23#include <linux/init.h>24#include <linux/device.h>25#include <linux/hardirq.h>26#include <linux/of.h>27#include <linux/of_address.h>28 29#include <asm/machdep.h>30#include <asm/irq.h>31#include <asm/pmac_feature.h>32#include <asm/mmu_context.h>33#include <asm/sections.h>34#include <asm/cputable.h>35#include <asm/time.h>36#include <asm/mpic.h>37#include <asm/keylargo.h>38#include <asm/switch_to.h>39 40/* WARNING !!! This will cause calibrate_delay() to be called,41 * but this is an __init function ! So you MUST go edit42 * init/main.c to make it non-init before enabling DEBUG_FREQ43 */44#undef DEBUG_FREQ45 46extern void low_choose_7447a_dfs(int dfs);47extern void low_choose_750fx_pll(int pll);48extern void low_sleep_handler(void);49 50/*51 * Currently, PowerMac cpufreq supports only high & low frequencies52 * that are set by the firmware53 */54static unsigned int low_freq;55static unsigned int hi_freq;56static unsigned int cur_freq;57static unsigned int sleep_freq;58static unsigned long transition_latency;59 60/*61 * Different models uses different mechanisms to switch the frequency62 */63static int (*set_speed_proc)(int low_speed);64static unsigned int (*get_speed_proc)(void);65 66/*67 * Some definitions used by the various speedprocs68 */69static u32 voltage_gpio;70static u32 frequency_gpio;71static u32 slew_done_gpio;72static int no_schedule;73static int has_cpu_l2lve;74static int is_pmu_based;75 76/* There are only two frequency states for each processor. Values77 * are in kHz for the time being.78 */79#define CPUFREQ_HIGH 080#define CPUFREQ_LOW 181 82static struct cpufreq_frequency_table pmac_cpu_freqs[] = {83 {0, CPUFREQ_HIGH, 0},84 {0, CPUFREQ_LOW, 0},85 {0, 0, CPUFREQ_TABLE_END},86};87 88static inline void local_delay(unsigned long ms)89{90 if (no_schedule)91 mdelay(ms);92 else93 msleep(ms);94}95 96#ifdef DEBUG_FREQ97static inline void debug_calc_bogomips(void)98{99 /* This will cause a recalc of bogomips and display the100 * result. We backup/restore the value to avoid affecting the101 * core cpufreq framework's own calculation.102 */103 unsigned long save_lpj = loops_per_jiffy;104 calibrate_delay();105 loops_per_jiffy = save_lpj;106}107#endif /* DEBUG_FREQ */108 109/* Switch CPU speed under 750FX CPU control110 */111static int cpu_750fx_cpu_speed(int low_speed)112{113 u32 hid2;114 115 if (low_speed == 0) {116 /* ramping up, set voltage first */117 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x05);118 /* Make sure we sleep for at least 1ms */119 local_delay(10);120 121 /* tweak L2 for high voltage */122 if (has_cpu_l2lve) {123 hid2 = mfspr(SPRN_HID2_750FX);124 hid2 &= ~0x2000;125 mtspr(SPRN_HID2_750FX, hid2);126 }127 }128#ifdef CONFIG_PPC_BOOK3S_32129 low_choose_750fx_pll(low_speed);130#endif131 if (low_speed == 1) {132 /* tweak L2 for low voltage */133 if (has_cpu_l2lve) {134 hid2 = mfspr(SPRN_HID2_750FX);135 hid2 |= 0x2000;136 mtspr(SPRN_HID2_750FX, hid2);137 }138 139 /* ramping down, set voltage last */140 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x04);141 local_delay(10);142 }143 144 return 0;145}146 147static unsigned int cpu_750fx_get_cpu_speed(void)148{149 if (mfspr(SPRN_HID1) & HID1_PS)150 return low_freq;151 else152 return hi_freq;153}154 155/* Switch CPU speed using DFS */156static int dfs_set_cpu_speed(int low_speed)157{158 if (low_speed == 0) {159 /* ramping up, set voltage first */160 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x05);161 /* Make sure we sleep for at least 1ms */162 local_delay(1);163 }164 165 /* set frequency */166#ifdef CONFIG_PPC_BOOK3S_32167 low_choose_7447a_dfs(low_speed);168#endif169 udelay(100);170 171 if (low_speed == 1) {172 /* ramping down, set voltage last */173 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x04);174 local_delay(1);175 }176 177 return 0;178}179 180static unsigned int dfs_get_cpu_speed(void)181{182 if (mfspr(SPRN_HID1) & HID1_DFS)183 return low_freq;184 else185 return hi_freq;186}187 188 189/* Switch CPU speed using slewing GPIOs190 */191static int gpios_set_cpu_speed(int low_speed)192{193 int gpio, timeout = 0;194 195 /* If ramping up, set voltage first */196 if (low_speed == 0) {197 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x05);198 /* Delay is way too big but it's ok, we schedule */199 local_delay(10);200 }201 202 /* Set frequency */203 gpio = pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, frequency_gpio, 0);204 if (low_speed == ((gpio & 0x01) == 0))205 goto skip;206 207 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, frequency_gpio,208 low_speed ? 0x04 : 0x05);209 udelay(200);210 do {211 if (++timeout > 100)212 break;213 local_delay(1);214 gpio = pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, slew_done_gpio, 0);215 } while((gpio & 0x02) == 0);216 skip:217 /* If ramping down, set voltage last */218 if (low_speed == 1) {219 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x04);220 /* Delay is way too big but it's ok, we schedule */221 local_delay(10);222 }223 224#ifdef DEBUG_FREQ225 debug_calc_bogomips();226#endif227 228 return 0;229}230 231/* Switch CPU speed under PMU control232 */233static int pmu_set_cpu_speed(int low_speed)234{235 struct adb_request req;236 unsigned long save_l2cr;237 unsigned long save_l3cr;238 unsigned int pic_prio;239 unsigned long flags;240 241 preempt_disable();242 243#ifdef DEBUG_FREQ244 printk(KERN_DEBUG "HID1, before: %x\n", mfspr(SPRN_HID1));245#endif246 pmu_suspend();247 248 /* Disable all interrupt sources on openpic */249 pic_prio = mpic_cpu_get_priority();250 mpic_cpu_set_priority(0xf);251 252 /* Make sure the decrementer won't interrupt us */253 asm volatile("mtdec %0" : : "r" (0x7fffffff));254 /* Make sure any pending DEC interrupt occurring while we did255 * the above didn't re-enable the DEC */256 mb();257 asm volatile("mtdec %0" : : "r" (0x7fffffff));258 259 /* We can now disable MSR_EE */260 local_irq_save(flags);261 262 /* Giveup the FPU & vec */263 enable_kernel_fp();264 265#ifdef CONFIG_ALTIVEC266 if (cpu_has_feature(CPU_FTR_ALTIVEC))267 enable_kernel_altivec();268#endif /* CONFIG_ALTIVEC */269 270 /* Save & disable L2 and L3 caches */271 save_l3cr = _get_L3CR(); /* (returns -1 if not available) */272 save_l2cr = _get_L2CR(); /* (returns -1 if not available) */273 274 /* Send the new speed command. My assumption is that this command275 * will cause PLL_CFG[0..3] to be changed next time CPU goes to sleep276 */277 pmu_request(&req, NULL, 6, PMU_CPU_SPEED, 'W', 'O', 'O', 'F', low_speed);278 while (!req.complete)279 pmu_poll();280 281 /* Prepare the northbridge for the speed transition */282 pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,1,1);283 284 /* Call low level code to backup CPU state and recover from285 * hardware reset286 */287 low_sleep_handler();288 289 /* Restore the northbridge */290 pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,1,0);291 292 /* Restore L2 cache */293 if (save_l2cr != 0xffffffff && (save_l2cr & L2CR_L2E) != 0)294 _set_L2CR(save_l2cr);295 /* Restore L3 cache */296 if (save_l3cr != 0xffffffff && (save_l3cr & L3CR_L3E) != 0)297 _set_L3CR(save_l3cr);298 299 /* Restore userland MMU context */300 switch_mmu_context(NULL, current->active_mm, NULL);301 302#ifdef DEBUG_FREQ303 printk(KERN_DEBUG "HID1, after: %x\n", mfspr(SPRN_HID1));304#endif305 306 /* Restore low level PMU operations */307 pmu_unlock();308 309 /*310 * Restore decrementer; we'll take a decrementer interrupt311 * as soon as interrupts are re-enabled and the generic312 * clockevents code will reprogram it with the right value.313 */314 set_dec(1);315 316 /* Restore interrupts */317 mpic_cpu_set_priority(pic_prio);318 319 /* Let interrupts flow again ... */320 local_irq_restore(flags);321 322#ifdef DEBUG_FREQ323 debug_calc_bogomips();324#endif325 326 pmu_resume();327 328 preempt_enable();329 330 return 0;331}332 333static int do_set_cpu_speed(struct cpufreq_policy *policy, int speed_mode)334{335 unsigned long l3cr;336 static unsigned long prev_l3cr;337 338 if (speed_mode == CPUFREQ_LOW &&339 cpu_has_feature(CPU_FTR_L3CR)) {340 l3cr = _get_L3CR();341 if (l3cr & L3CR_L3E) {342 prev_l3cr = l3cr;343 _set_L3CR(0);344 }345 }346 set_speed_proc(speed_mode == CPUFREQ_LOW);347 if (speed_mode == CPUFREQ_HIGH &&348 cpu_has_feature(CPU_FTR_L3CR)) {349 l3cr = _get_L3CR();350 if ((prev_l3cr & L3CR_L3E) && l3cr != prev_l3cr)351 _set_L3CR(prev_l3cr);352 }353 cur_freq = (speed_mode == CPUFREQ_HIGH) ? hi_freq : low_freq;354 355 return 0;356}357 358static unsigned int pmac_cpufreq_get_speed(unsigned int cpu)359{360 return cur_freq;361}362 363static int pmac_cpufreq_target( struct cpufreq_policy *policy,364 unsigned int index)365{366 int rc;367 368 rc = do_set_cpu_speed(policy, index);369 370 ppc_proc_freq = cur_freq * 1000ul;371 return rc;372}373 374static int pmac_cpufreq_cpu_init(struct cpufreq_policy *policy)375{376 cpufreq_generic_init(policy, pmac_cpu_freqs, transition_latency);377 return 0;378}379 380static u32 read_gpio(struct device_node *np)381{382 u64 offset;383 384 if (of_property_read_reg(np, 0, &offset, NULL) < 0)385 return 0;386 /* That works for all keylargos but shall be fixed properly387 * some day... The problem is that it seems we can't rely388 * on the "reg" property of the GPIO nodes, they are either389 * relative to the base of KeyLargo or to the base of the390 * GPIO space, and the device-tree doesn't help.391 */392 if (offset < KEYLARGO_GPIO_LEVELS0)393 offset += KEYLARGO_GPIO_LEVELS0;394 return offset;395}396 397static int pmac_cpufreq_suspend(struct cpufreq_policy *policy)398{399 /* Ok, this could be made a bit smarter, but let's be robust for now. We400 * always force a speed change to high speed before sleep, to make sure401 * we have appropriate voltage and/or bus speed for the wakeup process,402 * and to make sure our loops_per_jiffies are "good enough", that is will403 * not cause too short delays if we sleep in low speed and wake in high404 * speed..405 */406 no_schedule = 1;407 sleep_freq = cur_freq;408 if (cur_freq == low_freq && !is_pmu_based)409 do_set_cpu_speed(policy, CPUFREQ_HIGH);410 return 0;411}412 413static int pmac_cpufreq_resume(struct cpufreq_policy *policy)414{415 /* If we resume, first check if we have a get() function */416 if (get_speed_proc)417 cur_freq = get_speed_proc();418 else419 cur_freq = 0;420 421 /* We don't, hrm... we don't really know our speed here, best422 * is that we force a switch to whatever it was, which is423 * probably high speed due to our suspend() routine424 */425 do_set_cpu_speed(policy, sleep_freq == low_freq ?426 CPUFREQ_LOW : CPUFREQ_HIGH);427 428 ppc_proc_freq = cur_freq * 1000ul;429 430 no_schedule = 0;431 return 0;432}433 434static struct cpufreq_driver pmac_cpufreq_driver = {435 .verify = cpufreq_generic_frequency_table_verify,436 .target_index = pmac_cpufreq_target,437 .get = pmac_cpufreq_get_speed,438 .init = pmac_cpufreq_cpu_init,439 .suspend = pmac_cpufreq_suspend,440 .resume = pmac_cpufreq_resume,441 .flags = CPUFREQ_NO_AUTO_DYNAMIC_SWITCHING,442 .attr = cpufreq_generic_attr,443 .name = "powermac",444};445 446 447static int pmac_cpufreq_init_MacRISC3(struct device_node *cpunode)448{449 struct device_node *volt_gpio_np = of_find_node_by_name(NULL,450 "voltage-gpio");451 struct device_node *freq_gpio_np = of_find_node_by_name(NULL,452 "frequency-gpio");453 struct device_node *slew_done_gpio_np = of_find_node_by_name(NULL,454 "slewing-done");455 const u32 *value;456 457 /*458 * Check to see if it's GPIO driven or PMU only459 *460 * The way we extract the GPIO address is slightly hackish, but it461 * works well enough for now. We need to abstract the whole GPIO462 * stuff sooner or later anyway463 */464 465 if (volt_gpio_np)466 voltage_gpio = read_gpio(volt_gpio_np);467 if (freq_gpio_np)468 frequency_gpio = read_gpio(freq_gpio_np);469 if (slew_done_gpio_np)470 slew_done_gpio = read_gpio(slew_done_gpio_np);471 472 of_node_put(volt_gpio_np);473 of_node_put(freq_gpio_np);474 of_node_put(slew_done_gpio_np);475 476 /* If we use the frequency GPIOs, calculate the min/max speeds based477 * on the bus frequencies478 */479 if (frequency_gpio && slew_done_gpio) {480 int lenp, rc;481 const u32 *freqs, *ratio;482 483 freqs = of_get_property(cpunode, "bus-frequencies", &lenp);484 lenp /= sizeof(u32);485 if (freqs == NULL || lenp != 2) {486 pr_err("bus-frequencies incorrect or missing\n");487 return 1;488 }489 ratio = of_get_property(cpunode, "processor-to-bus-ratio*2",490 NULL);491 if (ratio == NULL) {492 pr_err("processor-to-bus-ratio*2 missing\n");493 return 1;494 }495 496 /* Get the min/max bus frequencies */497 low_freq = min(freqs[0], freqs[1]);498 hi_freq = max(freqs[0], freqs[1]);499 500 /* Grrrr.. It _seems_ that the device-tree is lying on the low bus501 * frequency, it claims it to be around 84Mhz on some models while502 * it appears to be approx. 101Mhz on all. Let's hack around here...503 * fortunately, we don't need to be too precise504 */505 if (low_freq < 98000000)506 low_freq = 101000000;507 508 /* Convert those to CPU core clocks */509 low_freq = (low_freq * (*ratio)) / 2000;510 hi_freq = (hi_freq * (*ratio)) / 2000;511 512 /* Now we get the frequencies, we read the GPIO to see what is out current513 * speed514 */515 rc = pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, frequency_gpio, 0);516 cur_freq = (rc & 0x01) ? hi_freq : low_freq;517 518 set_speed_proc = gpios_set_cpu_speed;519 return 1;520 }521 522 /* If we use the PMU, look for the min & max frequencies in the523 * device-tree524 */525 value = of_get_property(cpunode, "min-clock-frequency", NULL);526 if (!value)527 return 1;528 low_freq = (*value) / 1000;529 /* The PowerBook G4 12" (PowerBook6,1) has an error in the device-tree530 * here */531 if (low_freq < 100000)532 low_freq *= 10;533 534 value = of_get_property(cpunode, "max-clock-frequency", NULL);535 if (!value)536 return 1;537 hi_freq = (*value) / 1000;538 set_speed_proc = pmu_set_cpu_speed;539 is_pmu_based = 1;540 541 return 0;542}543 544static int pmac_cpufreq_init_7447A(struct device_node *cpunode)545{546 struct device_node *volt_gpio_np;547 548 if (!of_property_read_bool(cpunode, "dynamic-power-step"))549 return 1;550 551 volt_gpio_np = of_find_node_by_name(NULL, "cpu-vcore-select");552 if (volt_gpio_np)553 voltage_gpio = read_gpio(volt_gpio_np);554 of_node_put(volt_gpio_np);555 if (!voltage_gpio){556 pr_err("missing cpu-vcore-select gpio\n");557 return 1;558 }559 560 /* OF only reports the high frequency */561 hi_freq = cur_freq;562 low_freq = cur_freq/2;563 564 /* Read actual frequency from CPU */565 cur_freq = dfs_get_cpu_speed();566 set_speed_proc = dfs_set_cpu_speed;567 get_speed_proc = dfs_get_cpu_speed;568 569 return 0;570}571 572static int pmac_cpufreq_init_750FX(struct device_node *cpunode)573{574 struct device_node *volt_gpio_np;575 u32 pvr;576 const u32 *value;577 578 if (!of_property_read_bool(cpunode, "dynamic-power-step"))579 return 1;580 581 hi_freq = cur_freq;582 value = of_get_property(cpunode, "reduced-clock-frequency", NULL);583 if (!value)584 return 1;585 low_freq = (*value) / 1000;586 587 volt_gpio_np = of_find_node_by_name(NULL, "cpu-vcore-select");588 if (volt_gpio_np)589 voltage_gpio = read_gpio(volt_gpio_np);590 591 of_node_put(volt_gpio_np);592 pvr = mfspr(SPRN_PVR);593 has_cpu_l2lve = !((pvr & 0xf00) == 0x100);594 595 set_speed_proc = cpu_750fx_cpu_speed;596 get_speed_proc = cpu_750fx_get_cpu_speed;597 cur_freq = cpu_750fx_get_cpu_speed();598 599 return 0;600}601 602/* Currently, we support the following machines:603 *604 * - Titanium PowerBook 1Ghz (PMU based, 667Mhz & 1Ghz)605 * - Titanium PowerBook 800 (PMU based, 667Mhz & 800Mhz)606 * - Titanium PowerBook 400 (PMU based, 300Mhz & 400Mhz)607 * - Titanium PowerBook 500 (PMU based, 300Mhz & 500Mhz)608 * - iBook2 500/600 (PMU based, 400Mhz & 500/600Mhz)609 * - iBook2 700 (CPU based, 400Mhz & 700Mhz, support low voltage)610 * - Recent MacRISC3 laptops611 * - All new machines with 7447A CPUs612 */613static int __init pmac_cpufreq_setup(void)614{615 struct device_node *cpunode;616 const u32 *value;617 618 if (strstr(boot_command_line, "nocpufreq"))619 return 0;620 621 /* Get first CPU node */622 cpunode = of_cpu_device_node_get(0);623 if (!cpunode)624 goto out;625 626 /* Get current cpu clock freq */627 value = of_get_property(cpunode, "clock-frequency", NULL);628 if (!value)629 goto out;630 cur_freq = (*value) / 1000;631 632 /* Check for 7447A based MacRISC3 */633 if (of_machine_is_compatible("MacRISC3") &&634 of_property_read_bool(cpunode, "dynamic-power-step") &&635 PVR_VER(mfspr(SPRN_PVR)) == 0x8003) {636 pmac_cpufreq_init_7447A(cpunode);637 638 /* Allow dynamic switching */639 transition_latency = 8000000;640 pmac_cpufreq_driver.flags &= ~CPUFREQ_NO_AUTO_DYNAMIC_SWITCHING;641 /* Check for other MacRISC3 machines */642 } else if (of_machine_is_compatible("PowerBook3,4") ||643 of_machine_is_compatible("PowerBook3,5") ||644 of_machine_is_compatible("MacRISC3")) {645 pmac_cpufreq_init_MacRISC3(cpunode);646 /* Else check for iBook2 500/600 */647 } else if (of_machine_is_compatible("PowerBook4,1")) {648 hi_freq = cur_freq;649 low_freq = 400000;650 set_speed_proc = pmu_set_cpu_speed;651 is_pmu_based = 1;652 }653 /* Else check for TiPb 550 */654 else if (of_machine_is_compatible("PowerBook3,3") && cur_freq == 550000) {655 hi_freq = cur_freq;656 low_freq = 500000;657 set_speed_proc = pmu_set_cpu_speed;658 is_pmu_based = 1;659 }660 /* Else check for TiPb 400 & 500 */661 else if (of_machine_is_compatible("PowerBook3,2")) {662 /* We only know about the 400 MHz and the 500Mhz model663 * they both have 300 MHz as low frequency664 */665 if (cur_freq < 350000 || cur_freq > 550000)666 goto out;667 hi_freq = cur_freq;668 low_freq = 300000;669 set_speed_proc = pmu_set_cpu_speed;670 is_pmu_based = 1;671 }672 /* Else check for 750FX */673 else if (PVR_VER(mfspr(SPRN_PVR)) == 0x7000)674 pmac_cpufreq_init_750FX(cpunode);675out:676 of_node_put(cpunode);677 if (set_speed_proc == NULL)678 return -ENODEV;679 680 pmac_cpu_freqs[CPUFREQ_LOW].frequency = low_freq;681 pmac_cpu_freqs[CPUFREQ_HIGH].frequency = hi_freq;682 ppc_proc_freq = cur_freq * 1000ul;683 684 pr_info("Registering PowerMac CPU frequency driver\n");685 pr_info("Low: %d Mhz, High: %d Mhz, Boot: %d Mhz\n",686 low_freq/1000, hi_freq/1000, cur_freq/1000);687 688 return cpufreq_register_driver(&pmac_cpufreq_driver);689}690 691module_init(pmac_cpufreq_setup);692 693