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1# SPDX-License-Identifier: GPL-2.0-only2 3menuconfig CRYPTO_HW4 bool "Hardware crypto devices"5 default y6 help7 Say Y here to get to see options for hardware crypto devices and8 processors. This option alone does not add any kernel code.9 10 If you say N, all options in this submenu will be skipped and disabled.11 12if CRYPTO_HW13 14source "drivers/crypto/allwinner/Kconfig"15 16config CRYPTO_DEV_PADLOCK17 tristate "Support for VIA PadLock ACE"18 depends on X86 && !UML19 help20 Some VIA processors come with an integrated crypto engine21 (so called VIA PadLock ACE, Advanced Cryptography Engine)22 that provides instructions for very fast cryptographic23 operations with supported algorithms.24 25 The instructions are used only when the CPU supports them.26 Otherwise software encryption is used.27 28config CRYPTO_DEV_PADLOCK_AES29 tristate "PadLock driver for AES algorithm"30 depends on CRYPTO_DEV_PADLOCK31 select CRYPTO_SKCIPHER32 select CRYPTO_LIB_AES33 help34 Use VIA PadLock for AES algorithm.35 36 Available in VIA C3 and newer CPUs.37 38 If unsure say M. The compiled module will be39 called padlock-aes.40 41config CRYPTO_DEV_PADLOCK_SHA42 tristate "PadLock driver for SHA1 and SHA256 algorithms"43 depends on CRYPTO_DEV_PADLOCK44 select CRYPTO_HASH45 select CRYPTO_SHA146 select CRYPTO_SHA25647 help48 Use VIA PadLock for SHA1/SHA256 algorithms.49 50 Available in VIA C7 and newer processors.51 52 If unsure say M. The compiled module will be53 called padlock-sha.54 55config CRYPTO_DEV_GEODE56 tristate "Support for the Geode LX AES engine"57 depends on X86_32 && PCI58 select CRYPTO_ALGAPI59 select CRYPTO_SKCIPHER60 help61 Say 'Y' here to use the AMD Geode LX processor on-board AES62 engine for the CryptoAPI AES algorithm.63 64 To compile this driver as a module, choose M here: the module65 will be called geode-aes.66 67config ZCRYPT68 tristate "Support for s390 cryptographic adapters"69 depends on S39070 depends on AP71 select HW_RANDOM72 help73 Select this option if you want to enable support for74 s390 cryptographic adapters like Crypto Express 4 up75 to 8 in Coprocessor (CEXxC), EP11 Coprocessor (CEXxP)76 or Accelerator (CEXxA) mode.77 78config PKEY79 tristate "Kernel API for protected key handling"80 depends on S39081 help82 With this option enabled the pkey kernel modules provide an API83 for creation and handling of protected keys. Other parts of the84 kernel or userspace applications may use these functions.85 86 The protected key support is distributed into:87 - A pkey base and API kernel module (pkey.ko) which offers the88 infrastructure for the pkey handler kernel modules, the ioctl89 and the sysfs API and the in-kernel API to the crypto cipher90 implementations using protected key.91 - A pkey pckmo kernel module (pkey-pckmo.ko) which is automatically92 loaded when pckmo support (that is generation of protected keys93 from clear key values) is available.94 - A pkey CCA kernel module (pkey-cca.ko) which is automatically95 loaded when a CEX crypto card is available.96 - A pkey EP11 kernel module (pkey-ep11.ko) which is automatically97 loaded when a CEX crypto card is available.98 99 Select this option if you want to enable the kernel and userspace100 API for protected key handling.101 102config PKEY_CCA103 tristate "PKEY CCA support handler"104 depends on PKEY105 depends on ZCRYPT106 help107 This is the CCA support handler for deriving protected keys108 from CCA (secure) keys. Also this handler provides an alternate109 way to make protected keys from clear key values.110 111 The PKEY CCA support handler needs a Crypto Express card (CEX)112 in CCA mode.113 114 If you have selected the PKEY option then you should also enable115 this option unless you are sure you never need to derive protected116 keys from CCA key material.117 118config PKEY_EP11119 tristate "PKEY EP11 support handler"120 depends on PKEY121 depends on ZCRYPT122 help123 This is the EP11 support handler for deriving protected keys124 from EP11 (secure) keys. Also this handler provides an alternate125 way to make protected keys from clear key values.126 127 The PKEY EP11 support handler needs a Crypto Express card (CEX)128 in EP11 mode.129 130 If you have selected the PKEY option then you should also enable131 this option unless you are sure you never need to derive protected132 keys from EP11 key material.133 134config PKEY_PCKMO135 tristate "PKEY PCKMO support handler"136 depends on PKEY137 help138 This is the PCKMO support handler for deriving protected keys139 from clear key values via invoking the PCKMO instruction.140 141 The PCKMO instruction can be enabled and disabled in the crypto142 settings at the LPAR profile. This handler checks for availability143 during initialization and if build as a kernel module unloads144 itself if PCKMO is disabled.145 146 The PCKMO way of deriving protected keys from clear key material147 is especially used during self test of protected key ciphers like148 PAES but the CCA and EP11 handler provide alternate ways to149 generate protected keys from clear key values.150 151 If you have selected the PKEY option then you should also enable152 this option unless you are sure you never need to derive protected153 keys from clear key values directly via PCKMO.154 155config CRYPTO_PAES_S390156 tristate "PAES cipher algorithms"157 depends on S390158 depends on ZCRYPT159 depends on PKEY160 select CRYPTO_ALGAPI161 select CRYPTO_SKCIPHER162 help163 This is the s390 hardware accelerated implementation of the164 AES cipher algorithms for use with protected key.165 166 Select this option if you want to use the paes cipher167 for example to use protected key encrypted devices.168 169config S390_PRNG170 tristate "Pseudo random number generator device driver"171 depends on S390172 default "m"173 help174 Select this option if you want to use the s390 pseudo random number175 generator. The PRNG is part of the cryptographic processor functions176 and uses triple-DES to generate secure random numbers like the177 ANSI X9.17 standard. User-space programs access the178 pseudo-random-number device through the char device /dev/prandom.179 180 It is available as of z9.181 182config CRYPTO_DEV_NIAGARA2183 tristate "Niagara2 Stream Processing Unit driver"184 select CRYPTO_LIB_DES185 select CRYPTO_SKCIPHER186 select CRYPTO_HASH187 select CRYPTO_MD5188 select CRYPTO_SHA1189 select CRYPTO_SHA256190 depends on SPARC64191 help192 Each core of a Niagara2 processor contains a Stream193 Processing Unit, which itself contains several cryptographic194 sub-units. One set provides the Modular Arithmetic Unit,195 used for SSL offload. The other set provides the Cipher196 Group, which can perform encryption, decryption, hashing,197 checksumming, and raw copies.198 199config CRYPTO_DEV_SL3516200 tristate "Storlink SL3516 crypto offloader"201 depends on ARCH_GEMINI || COMPILE_TEST202 depends on HAS_IOMEM && PM203 select CRYPTO_SKCIPHER204 select CRYPTO_ENGINE205 select CRYPTO_ECB206 select CRYPTO_AES207 select HW_RANDOM208 help209 This option allows you to have support for SL3516 crypto offloader.210 211config CRYPTO_DEV_SL3516_DEBUG212 bool "Enable SL3516 stats"213 depends on CRYPTO_DEV_SL3516214 depends on DEBUG_FS215 help216 Say y to enable SL3516 debug stats.217 This will create /sys/kernel/debug/sl3516/stats for displaying218 the number of requests per algorithm and other internal stats.219 220config CRYPTO_DEV_HIFN_795X221 tristate "Driver HIFN 795x crypto accelerator chips"222 select CRYPTO_LIB_DES223 select CRYPTO_SKCIPHER224 select HW_RANDOM if CRYPTO_DEV_HIFN_795X_RNG225 depends on PCI226 depends on !ARCH_DMA_ADDR_T_64BIT227 help228 This option allows you to have support for HIFN 795x crypto adapters.229 230config CRYPTO_DEV_HIFN_795X_RNG231 bool "HIFN 795x random number generator"232 depends on CRYPTO_DEV_HIFN_795X233 help234 Select this option if you want to enable the random number generator235 on the HIFN 795x crypto adapters.236 237source "drivers/crypto/caam/Kconfig"238 239config CRYPTO_DEV_TALITOS240 tristate "Talitos Freescale Security Engine (SEC)"241 select CRYPTO_AEAD242 select CRYPTO_AUTHENC243 select CRYPTO_SKCIPHER244 select CRYPTO_HASH245 select CRYPTO_LIB_DES246 select HW_RANDOM247 depends on FSL_SOC248 help249 Say 'Y' here to use the Freescale Security Engine (SEC)250 to offload cryptographic algorithm computation.251 252 The Freescale SEC is present on PowerQUICC 'E' processors, such253 as the MPC8349E and MPC8548E.254 255 To compile this driver as a module, choose M here: the module256 will be called talitos.257 258config CRYPTO_DEV_TALITOS1259 bool "SEC1 (SEC 1.0 and SEC Lite 1.2)"260 depends on CRYPTO_DEV_TALITOS261 depends on PPC_8xx || PPC_82xx262 default y263 help264 Say 'Y' here to use the Freescale Security Engine (SEC) version 1.0265 found on MPC82xx or the Freescale Security Engine (SEC Lite)266 version 1.2 found on MPC8xx267 268config CRYPTO_DEV_TALITOS2269 bool "SEC2+ (SEC version 2.0 or upper)"270 depends on CRYPTO_DEV_TALITOS271 default y if !PPC_8xx272 help273 Say 'Y' here to use the Freescale Security Engine (SEC)274 version 2 and following as found on MPC83xx, MPC85xx, etc ...275 276config CRYPTO_DEV_PPC4XX277 tristate "Driver AMCC PPC4xx crypto accelerator"278 depends on PPC && 4xx279 select CRYPTO_HASH280 select CRYPTO_AEAD281 select CRYPTO_AES282 select CRYPTO_LIB_AES283 select CRYPTO_CCM284 select CRYPTO_CTR285 select CRYPTO_GCM286 select CRYPTO_SKCIPHER287 help288 This option allows you to have support for AMCC crypto acceleration.289 290config HW_RANDOM_PPC4XX291 bool "PowerPC 4xx generic true random number generator support"292 depends on CRYPTO_DEV_PPC4XX && HW_RANDOM=y293 default y294 help295 This option provides the kernel-side support for the TRNG hardware296 found in the security function of some PowerPC 4xx SoCs.297 298config CRYPTO_DEV_OMAP299 tristate "Support for OMAP crypto HW accelerators"300 depends on ARCH_OMAP2PLUS301 help302 OMAP processors have various crypto HW accelerators. Select this if303 you want to use the OMAP modules for any of the crypto algorithms.304 305if CRYPTO_DEV_OMAP306 307config CRYPTO_DEV_OMAP_SHAM308 tristate "Support for OMAP MD5/SHA1/SHA2 hw accelerator"309 depends on ARCH_OMAP2PLUS310 select CRYPTO_ENGINE311 select CRYPTO_SHA1312 select CRYPTO_MD5313 select CRYPTO_SHA256314 select CRYPTO_SHA512315 select CRYPTO_HMAC316 help317 OMAP processors have MD5/SHA1/SHA2 hw accelerator. Select this if you318 want to use the OMAP module for MD5/SHA1/SHA2 algorithms.319 320config CRYPTO_DEV_OMAP_AES321 tristate "Support for OMAP AES hw engine"322 depends on ARCH_OMAP2 || ARCH_OMAP3 || ARCH_OMAP2PLUS323 select CRYPTO_AES324 select CRYPTO_SKCIPHER325 select CRYPTO_ENGINE326 select CRYPTO_CBC327 select CRYPTO_ECB328 select CRYPTO_CTR329 select CRYPTO_AEAD330 help331 OMAP processors have AES module accelerator. Select this if you332 want to use the OMAP module for AES algorithms.333 334config CRYPTO_DEV_OMAP_DES335 tristate "Support for OMAP DES/3DES hw engine"336 depends on ARCH_OMAP2PLUS337 select CRYPTO_LIB_DES338 select CRYPTO_SKCIPHER339 select CRYPTO_ENGINE340 help341 OMAP processors have DES/3DES module accelerator. Select this if you342 want to use the OMAP module for DES and 3DES algorithms. Currently343 the ECB and CBC modes of operation are supported by the driver. Also344 accesses made on unaligned boundaries are supported.345 346endif # CRYPTO_DEV_OMAP347 348config CRYPTO_DEV_SAHARA349 tristate "Support for SAHARA crypto accelerator"350 depends on ARCH_MXC && OF351 select CRYPTO_SKCIPHER352 select CRYPTO_AES353 select CRYPTO_ECB354 select CRYPTO_ENGINE355 help356 This option enables support for the SAHARA HW crypto accelerator357 found in some Freescale i.MX chips.358 359config CRYPTO_DEV_EXYNOS_RNG360 tristate "Exynos HW pseudo random number generator support"361 depends on ARCH_EXYNOS || COMPILE_TEST362 depends on HAS_IOMEM363 select CRYPTO_RNG364 help365 This driver provides kernel-side support through the366 cryptographic API for the pseudo random number generator hardware367 found on Exynos SoCs.368 369 To compile this driver as a module, choose M here: the370 module will be called exynos-rng.371 372 If unsure, say Y.373 374config CRYPTO_DEV_S5P375 tristate "Support for Samsung S5PV210/Exynos crypto accelerator"376 depends on ARCH_S5PV210 || ARCH_EXYNOS || COMPILE_TEST377 depends on HAS_IOMEM378 select CRYPTO_AES379 select CRYPTO_SKCIPHER380 help381 This option allows you to have support for S5P crypto acceleration.382 Select this to offload Samsung S5PV210 or S5PC110, Exynos from AES383 algorithms execution.384 385config CRYPTO_DEV_EXYNOS_HASH386 bool "Support for Samsung Exynos HASH accelerator"387 depends on CRYPTO_DEV_S5P388 depends on !CRYPTO_DEV_EXYNOS_RNG && CRYPTO_DEV_EXYNOS_RNG!=m389 select CRYPTO_SHA1390 select CRYPTO_MD5391 select CRYPTO_SHA256392 help393 Select this to offload Exynos from HASH MD5/SHA1/SHA256.394 This will select software SHA1, MD5 and SHA256 as they are395 needed for small and zero-size messages.396 HASH algorithms will be disabled if EXYNOS_RNG397 is enabled due to hw conflict.398 399config CRYPTO_DEV_NX400 bool "Support for IBM PowerPC Nest (NX) cryptographic acceleration"401 depends on PPC64402 help403 This enables support for the NX hardware cryptographic accelerator404 coprocessor that is in IBM PowerPC P7+ or later processors. This405 does not actually enable any drivers, it only allows you to select406 which acceleration type (encryption and/or compression) to enable.407 408if CRYPTO_DEV_NX409 source "drivers/crypto/nx/Kconfig"410endif411 412config CRYPTO_DEV_ATMEL_AUTHENC413 bool "Support for Atmel IPSEC/SSL hw accelerator"414 depends on ARCH_AT91 || COMPILE_TEST415 depends on CRYPTO_DEV_ATMEL_AES416 help417 Some Atmel processors can combine the AES and SHA hw accelerators418 to enhance support of IPSEC/SSL.419 Select this if you want to use the Atmel modules for420 authenc(hmac(shaX),Y(cbc)) algorithms.421 422config CRYPTO_DEV_ATMEL_AES423 tristate "Support for Atmel AES hw accelerator"424 depends on ARCH_AT91 || COMPILE_TEST425 select CRYPTO_AES426 select CRYPTO_AEAD427 select CRYPTO_SKCIPHER428 select CRYPTO_AUTHENC if CRYPTO_DEV_ATMEL_AUTHENC429 select CRYPTO_DEV_ATMEL_SHA if CRYPTO_DEV_ATMEL_AUTHENC430 help431 Some Atmel processors have AES hw accelerator.432 Select this if you want to use the Atmel module for433 AES algorithms.434 435 To compile this driver as a module, choose M here: the module436 will be called atmel-aes.437 438config CRYPTO_DEV_ATMEL_TDES439 tristate "Support for Atmel DES/TDES hw accelerator"440 depends on ARCH_AT91 || COMPILE_TEST441 select CRYPTO_LIB_DES442 select CRYPTO_SKCIPHER443 help444 Some Atmel processors have DES/TDES hw accelerator.445 Select this if you want to use the Atmel module for446 DES/TDES algorithms.447 448 To compile this driver as a module, choose M here: the module449 will be called atmel-tdes.450 451config CRYPTO_DEV_ATMEL_SHA452 tristate "Support for Atmel SHA hw accelerator"453 depends on ARCH_AT91 || COMPILE_TEST454 select CRYPTO_HASH455 help456 Some Atmel processors have SHA1/SHA224/SHA256/SHA384/SHA512457 hw accelerator.458 Select this if you want to use the Atmel module for459 SHA1/SHA224/SHA256/SHA384/SHA512 algorithms.460 461 To compile this driver as a module, choose M here: the module462 will be called atmel-sha.463 464config CRYPTO_DEV_ATMEL_I2C465 tristate466 select BITREVERSE467 468config CRYPTO_DEV_ATMEL_ECC469 tristate "Support for Microchip / Atmel ECC hw accelerator"470 depends on I2C471 select CRYPTO_DEV_ATMEL_I2C472 select CRYPTO_ECDH473 select CRC16474 help475 Microhip / Atmel ECC hw accelerator.476 Select this if you want to use the Microchip / Atmel module for477 ECDH algorithm.478 479 To compile this driver as a module, choose M here: the module480 will be called atmel-ecc.481 482config CRYPTO_DEV_ATMEL_SHA204A483 tristate "Support for Microchip / Atmel SHA accelerator and RNG"484 depends on I2C485 select CRYPTO_DEV_ATMEL_I2C486 select HW_RANDOM487 select CRC16488 help489 Microhip / Atmel SHA accelerator and RNG.490 Select this if you want to use the Microchip / Atmel SHA204A491 module as a random number generator. (Other functions of the492 chip are currently not exposed by this driver)493 494 To compile this driver as a module, choose M here: the module495 will be called atmel-sha204a.496 497config CRYPTO_DEV_CCP498 bool "Support for AMD Secure Processor"499 depends on ((X86 && PCI) || (ARM64 && (OF_ADDRESS || ACPI))) && HAS_IOMEM500 help501 The AMD Secure Processor provides support for the Cryptographic Coprocessor502 (CCP) and the Platform Security Processor (PSP) devices.503 504if CRYPTO_DEV_CCP505 source "drivers/crypto/ccp/Kconfig"506endif507 508config CRYPTO_DEV_MXS_DCP509 tristate "Support for Freescale MXS DCP"510 depends on (ARCH_MXS || ARCH_MXC)511 select STMP_DEVICE512 select CRYPTO_CBC513 select CRYPTO_ECB514 select CRYPTO_AES515 select CRYPTO_SKCIPHER516 select CRYPTO_HASH517 help518 The Freescale i.MX23/i.MX28 has SHA1/SHA256 and AES128 CBC/ECB519 co-processor on the die.520 521 To compile this driver as a module, choose M here: the module522 will be called mxs-dcp.523 524source "drivers/crypto/cavium/cpt/Kconfig"525source "drivers/crypto/cavium/nitrox/Kconfig"526source "drivers/crypto/marvell/Kconfig"527source "drivers/crypto/intel/Kconfig"528 529config CRYPTO_DEV_CAVIUM_ZIP530 tristate "Cavium ZIP driver"531 depends on PCI && 64BIT && (ARM64 || COMPILE_TEST)532 help533 Select this option if you want to enable compression/decompression534 acceleration on Cavium's ARM based SoCs535 536config CRYPTO_DEV_QCE537 tristate "Qualcomm crypto engine accelerator"538 depends on ARCH_QCOM || COMPILE_TEST539 depends on HAS_IOMEM540 help541 This driver supports Qualcomm crypto engine accelerator542 hardware. To compile this driver as a module, choose M here. The543 module will be called qcrypto.544 545config CRYPTO_DEV_QCE_SKCIPHER546 bool547 depends on CRYPTO_DEV_QCE548 select CRYPTO_AES549 select CRYPTO_LIB_DES550 select CRYPTO_ECB551 select CRYPTO_CBC552 select CRYPTO_XTS553 select CRYPTO_CTR554 select CRYPTO_SKCIPHER555 556config CRYPTO_DEV_QCE_SHA557 bool558 depends on CRYPTO_DEV_QCE559 select CRYPTO_SHA1560 select CRYPTO_SHA256561 562config CRYPTO_DEV_QCE_AEAD563 bool564 depends on CRYPTO_DEV_QCE565 select CRYPTO_AUTHENC566 select CRYPTO_LIB_DES567 568choice569 prompt "Algorithms enabled for QCE acceleration"570 default CRYPTO_DEV_QCE_ENABLE_ALL571 depends on CRYPTO_DEV_QCE572 help573 This option allows to choose whether to build support for all algorithms574 (default), hashes-only, or skciphers-only.575 576 The QCE engine does not appear to scale as well as the CPU to handle577 multiple crypto requests. While the ipq40xx chips have 4-core CPUs, the578 QCE handles only 2 requests in parallel.579 580 Ipsec throughput seems to improve when disabling either family of581 algorithms, sharing the load with the CPU. Enabling skciphers-only582 appears to work best.583 584 config CRYPTO_DEV_QCE_ENABLE_ALL585 bool "All supported algorithms"586 select CRYPTO_DEV_QCE_SKCIPHER587 select CRYPTO_DEV_QCE_SHA588 select CRYPTO_DEV_QCE_AEAD589 help590 Enable all supported algorithms:591 - AES (CBC, CTR, ECB, XTS)592 - 3DES (CBC, ECB)593 - DES (CBC, ECB)594 - SHA1, HMAC-SHA1595 - SHA256, HMAC-SHA256596 597 config CRYPTO_DEV_QCE_ENABLE_SKCIPHER598 bool "Symmetric-key ciphers only"599 select CRYPTO_DEV_QCE_SKCIPHER600 help601 Enable symmetric-key ciphers only:602 - AES (CBC, CTR, ECB, XTS)603 - 3DES (ECB, CBC)604 - DES (ECB, CBC)605 606 config CRYPTO_DEV_QCE_ENABLE_SHA607 bool "Hash/HMAC only"608 select CRYPTO_DEV_QCE_SHA609 help610 Enable hashes/HMAC algorithms only:611 - SHA1, HMAC-SHA1612 - SHA256, HMAC-SHA256613 614 config CRYPTO_DEV_QCE_ENABLE_AEAD615 bool "AEAD algorithms only"616 select CRYPTO_DEV_QCE_AEAD617 help618 Enable AEAD algorithms only:619 - authenc()620 - ccm(aes)621 - rfc4309(ccm(aes))622endchoice623 624config CRYPTO_DEV_QCE_SW_MAX_LEN625 int "Default maximum request size to use software for AES"626 depends on CRYPTO_DEV_QCE && CRYPTO_DEV_QCE_SKCIPHER627 default 512628 help629 This sets the default maximum request size to perform AES requests630 using software instead of the crypto engine. It can be changed by631 setting the aes_sw_max_len parameter.632 633 Small blocks are processed faster in software than hardware.634 Considering the 256-bit ciphers, software is 2-3 times faster than635 qce at 256-bytes, 30% faster at 512, and about even at 768-bytes.636 With 128-bit keys, the break-even point would be around 1024-bytes.637 638 The default is set a little lower, to 512 bytes, to balance the639 cost in CPU usage. The minimum recommended setting is 16-bytes640 (1 AES block), since AES-GCM will fail if you set it lower.641 Setting this to zero will send all requests to the hardware.642 643 Note that 192-bit keys are not supported by the hardware and are644 always processed by the software fallback, and all DES requests645 are done by the hardware.646 647config CRYPTO_DEV_QCOM_RNG648 tristate "Qualcomm Random Number Generator Driver"649 depends on ARCH_QCOM || COMPILE_TEST650 depends on HW_RANDOM651 select CRYPTO_RNG652 help653 This driver provides support for the Random Number654 Generator hardware found on Qualcomm SoCs.655 656 To compile this driver as a module, choose M here. The657 module will be called qcom-rng. If unsure, say N.658 659#config CRYPTO_DEV_VMX660# bool "Support for VMX cryptographic acceleration instructions"661# depends on PPC64 && VSX662# help663# Support for VMX cryptographic acceleration instructions.664#665#source "drivers/crypto/vmx/Kconfig"666 667config CRYPTO_DEV_IMGTEC_HASH668 tristate "Imagination Technologies hardware hash accelerator"669 depends on MIPS || COMPILE_TEST670 select CRYPTO_MD5671 select CRYPTO_SHA1672 select CRYPTO_SHA256673 select CRYPTO_HASH674 help675 This driver interfaces with the Imagination Technologies676 hardware hash accelerator. Supporting MD5/SHA1/SHA224/SHA256677 hashing algorithms.678 679config CRYPTO_DEV_ROCKCHIP680 tristate "Rockchip's Cryptographic Engine driver"681 depends on OF && ARCH_ROCKCHIP682 depends on PM683 select CRYPTO_ECB684 select CRYPTO_CBC685 select CRYPTO_DES686 select CRYPTO_AES687 select CRYPTO_ENGINE688 select CRYPTO_LIB_DES689 select CRYPTO_MD5690 select CRYPTO_SHA1691 select CRYPTO_SHA256692 select CRYPTO_HASH693 select CRYPTO_SKCIPHER694 695 help696 This driver interfaces with the hardware crypto accelerator.697 Supporting cbc/ecb chainmode, and aes/des/des3_ede cipher mode.698 699config CRYPTO_DEV_ROCKCHIP_DEBUG700 bool "Enable Rockchip crypto stats"701 depends on CRYPTO_DEV_ROCKCHIP702 depends on DEBUG_FS703 help704 Say y to enable Rockchip crypto debug stats.705 This will create /sys/kernel/debug/rk3288_crypto/stats for displaying706 the number of requests per algorithm and other internal stats.707 708config CRYPTO_DEV_TEGRA709 tristate "Enable Tegra Security Engine"710 depends on TEGRA_HOST1X711 select CRYPTO_ENGINE712 713 help714 Select this to enable Tegra Security Engine which accelerates various715 AES encryption/decryption and HASH algorithms.716 717config CRYPTO_DEV_ZYNQMP_AES718 tristate "Support for Xilinx ZynqMP AES hw accelerator"719 depends on ZYNQMP_FIRMWARE || COMPILE_TEST720 select CRYPTO_AES721 select CRYPTO_ENGINE722 select CRYPTO_AEAD723 help724 Xilinx ZynqMP has AES-GCM engine used for symmetric key725 encryption and decryption. This driver interfaces with AES hw726 accelerator. Select this if you want to use the ZynqMP module727 for AES algorithms.728 729config CRYPTO_DEV_ZYNQMP_SHA3730 tristate "Support for Xilinx ZynqMP SHA3 hardware accelerator"731 depends on ZYNQMP_FIRMWARE || COMPILE_TEST732 select CRYPTO_SHA3733 help734 Xilinx ZynqMP has SHA3 engine used for secure hash calculation.735 This driver interfaces with SHA3 hardware engine.736 Select this if you want to use the ZynqMP module737 for SHA3 hash computation.738 739source "drivers/crypto/chelsio/Kconfig"740 741source "drivers/crypto/virtio/Kconfig"742 743config CRYPTO_DEV_BCM_SPU744 tristate "Broadcom symmetric crypto/hash acceleration support"745 depends on ARCH_BCM_IPROC746 depends on MAILBOX747 default m748 select CRYPTO_AUTHENC749 select CRYPTO_LIB_DES750 select CRYPTO_MD5751 select CRYPTO_SHA1752 select CRYPTO_SHA256753 select CRYPTO_SHA512754 help755 This driver provides support for Broadcom crypto acceleration using the756 Secure Processing Unit (SPU). The SPU driver registers skcipher,757 ahash, and aead algorithms with the kernel cryptographic API.758 759source "drivers/crypto/stm32/Kconfig"760 761config CRYPTO_DEV_SAFEXCEL762 tristate "Inside Secure's SafeXcel cryptographic engine driver"763 depends on (OF || PCI || COMPILE_TEST) && HAS_IOMEM764 select CRYPTO_LIB_AES765 select CRYPTO_AUTHENC766 select CRYPTO_SKCIPHER767 select CRYPTO_LIB_DES768 select CRYPTO_HASH769 select CRYPTO_HMAC770 select CRYPTO_MD5771 select CRYPTO_SHA1772 select CRYPTO_SHA256773 select CRYPTO_SHA512774 select CRYPTO_CHACHA20POLY1305775 select CRYPTO_SHA3776 help777 This driver interfaces with the SafeXcel EIP-97 and EIP-197 cryptographic778 engines designed by Inside Secure. It currently accelerates DES, 3DES and779 AES block ciphers in ECB and CBC mode, as well as SHA1, SHA224, SHA256,780 SHA384 and SHA512 hash algorithms for both basic hash and HMAC.781 Additionally, it accelerates combined AES-CBC/HMAC-SHA AEAD operations.782 783config CRYPTO_DEV_ARTPEC6784 tristate "Support for Axis ARTPEC-6/7 hardware crypto acceleration."785 depends on ARM && (ARCH_ARTPEC || COMPILE_TEST)786 depends on OF787 select CRYPTO_AEAD788 select CRYPTO_AES789 select CRYPTO_ALGAPI790 select CRYPTO_SKCIPHER791 select CRYPTO_CTR792 select CRYPTO_HASH793 select CRYPTO_SHA1794 select CRYPTO_SHA256795 select CRYPTO_SHA512796 help797 Enables the driver for the on-chip crypto accelerator798 of Axis ARTPEC SoCs.799 800 To compile this driver as a module, choose M here.801 802config CRYPTO_DEV_CCREE803 tristate "Support for ARM TrustZone CryptoCell family of security processors"804 depends on CRYPTO && CRYPTO_HW && OF && HAS_DMA805 depends on HAS_IOMEM806 select CRYPTO_HASH807 select CRYPTO_SKCIPHER808 select CRYPTO_LIB_DES809 select CRYPTO_AEAD810 select CRYPTO_AUTHENC811 select CRYPTO_SHA1812 select CRYPTO_MD5813 select CRYPTO_SHA256814 select CRYPTO_SHA512815 select CRYPTO_HMAC816 select CRYPTO_AES817 select CRYPTO_CBC818 select CRYPTO_ECB819 select CRYPTO_CTR820 select CRYPTO_XTS821 select CRYPTO_SM4_GENERIC822 select CRYPTO_SM3_GENERIC823 help824 Say 'Y' to enable a driver for the REE interface of the Arm825 TrustZone CryptoCell family of processors. Currently the826 CryptoCell 713, 703, 712, 710 and 630 are supported.827 Choose this if you wish to use hardware acceleration of828 cryptographic operations on the system REE.829 If unsure say Y.830 831source "drivers/crypto/hisilicon/Kconfig"832 833source "drivers/crypto/amlogic/Kconfig"834 835config CRYPTO_DEV_SA2UL836 tristate "Support for TI security accelerator"837 depends on ARCH_K3 || COMPILE_TEST838 select CRYPTO_AES839 select CRYPTO_ALGAPI840 select CRYPTO_AUTHENC841 select CRYPTO_DES842 select CRYPTO_SHA1843 select CRYPTO_SHA256844 select CRYPTO_SHA512845 select HW_RANDOM846 select SG_SPLIT847 help848 K3 devices include a security accelerator engine that may be849 used for crypto offload. Select this if you want to use hardware850 acceleration for cryptographic algorithms on these devices.851 852source "drivers/crypto/aspeed/Kconfig"853source "drivers/crypto/starfive/Kconfig"854 855endif # CRYPTO_HW856