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1# SPDX-License-Identifier: GPL-2.02config CRYPTO_DEV_FSL_CAAM_COMMON3 tristate4 5config CRYPTO_DEV_FSL_CAAM_CRYPTO_API_DESC6 tristate7 8config CRYPTO_DEV_FSL_CAAM_AHASH_API_DESC9 tristate10 11config CRYPTO_DEV_FSL_CAAM12 tristate "Freescale CAAM-Multicore platform driver backend"13 depends on FSL_SOC || ARCH_MXC || ARCH_LAYERSCAPE || COMPILE_TEST14 select SOC_BUS15 select CRYPTO_DEV_FSL_CAAM_COMMON16 imply FSL_MC_BUS17 help18 Enables the driver module for Freescale's Cryptographic Accelerator19 and Assurance Module (CAAM), also known as the SEC version 4 (SEC4).20 This module creates job ring devices, and configures h/w21 to operate as a DPAA component automatically, depending22 on h/w feature availability.23 24 To compile this driver as a module, choose M here: the module25 will be called caam.26 27if CRYPTO_DEV_FSL_CAAM28 29config CRYPTO_DEV_FSL_CAAM_DEBUG30 bool "Enable debug output in CAAM driver"31 help32 Selecting this will enable printing of various debug33 information in the CAAM driver.34 35menuconfig CRYPTO_DEV_FSL_CAAM_JR36 tristate "Freescale CAAM Job Ring driver backend"37 select CRYPTO_ENGINE38 default y39 help40 Enables the driver module for Job Rings which are part of41 Freescale's Cryptographic Accelerator42 and Assurance Module (CAAM). This module adds a job ring operation43 interface.44 45 To compile this driver as a module, choose M here: the module46 will be called caam_jr.47 48if CRYPTO_DEV_FSL_CAAM_JR49 50config CRYPTO_DEV_FSL_CAAM_RINGSIZE51 int "Job Ring size"52 range 2 953 default "9"54 help55 Select size of Job Rings as a power of 2, within the56 range 2-9 (ring size 4-512).57 Examples:58 2 => 459 3 => 860 4 => 1661 5 => 3262 6 => 6463 7 => 12864 8 => 25665 9 => 51266 67config CRYPTO_DEV_FSL_CAAM_INTC68 bool "Job Ring interrupt coalescing"69 help70 Enable the Job Ring's interrupt coalescing feature.71 72 Note: the driver already provides adequate73 interrupt coalescing in software.74 75config CRYPTO_DEV_FSL_CAAM_INTC_COUNT_THLD76 int "Job Ring interrupt coalescing count threshold"77 depends on CRYPTO_DEV_FSL_CAAM_INTC78 range 1 25579 default 25580 help81 Select number of descriptor completions to queue before82 raising an interrupt, in the range 1-255. Note that a selection83 of 1 functionally defeats the coalescing feature, and a selection84 equal or greater than the job ring size will force timeouts.85 86config CRYPTO_DEV_FSL_CAAM_INTC_TIME_THLD87 int "Job Ring interrupt coalescing timer threshold"88 depends on CRYPTO_DEV_FSL_CAAM_INTC89 range 1 6553590 default 204891 help92 Select number of bus clocks/64 to timeout in the case that one or93 more descriptor completions are queued without reaching the count94 threshold. Range is 1-65535.95 96config CRYPTO_DEV_FSL_CAAM_CRYPTO_API97 bool "Register algorithm implementations with the Crypto API"98 default y99 select CRYPTO_DEV_FSL_CAAM_CRYPTO_API_DESC100 select CRYPTO_AEAD101 select CRYPTO_AUTHENC102 select CRYPTO_SKCIPHER103 select CRYPTO_LIB_DES104 select CRYPTO_XTS105 help106 Selecting this will offload crypto for users of the107 scatterlist crypto API (such as the linux native IPSec108 stack) to the SEC4 via job ring.109 110config CRYPTO_DEV_FSL_CAAM_CRYPTO_API_QI111 bool "Queue Interface as Crypto API backend"112 depends on FSL_DPAA && NET113 default y114 select CRYPTO_DEV_FSL_CAAM_CRYPTO_API_DESC115 select CRYPTO_AUTHENC116 select CRYPTO_SKCIPHER117 select CRYPTO_DES118 select CRYPTO_XTS119 help120 Selecting this will use CAAM Queue Interface (QI) for sending121 & receiving crypto jobs to/from CAAM. This gives better performance122 than job ring interface when the number of cores are more than the123 number of job rings assigned to the kernel. The number of portals124 assigned to the kernel should also be more than the number of125 job rings.126 127config CRYPTO_DEV_FSL_CAAM_AHASH_API128 bool "Register hash algorithm implementations with Crypto API"129 default y130 select CRYPTO_DEV_FSL_CAAM_AHASH_API_DESC131 select CRYPTO_HASH132 help133 Selecting this will offload ahash for users of the134 scatterlist crypto API to the SEC4 via job ring.135 136config CRYPTO_DEV_FSL_CAAM_PKC_API137 bool "Register public key cryptography implementations with Crypto API"138 default y139 select CRYPTO_RSA140 help141 Selecting this will allow SEC Public key support for RSA.142 Supported cryptographic primitives: encryption, decryption,143 signature and verification.144 145config CRYPTO_DEV_FSL_CAAM_RNG_API146 bool "Register caam device for hwrng API"147 default y148 select CRYPTO_RNG149 select HW_RANDOM150 help151 Selecting this will register the SEC4 hardware rng to152 the hw_random API for supplying the kernel entropy pool.153 154config CRYPTO_DEV_FSL_CAAM_PRNG_API155 bool "Register Pseudo random number generation implementation with Crypto API"156 default y157 select CRYPTO_RNG158 help159 Selecting this will register the SEC hardware prng to160 the Crypto API.161 162config CRYPTO_DEV_FSL_CAAM_BLOB_GEN163 bool164 165config CRYPTO_DEV_FSL_CAAM_RNG_TEST166 bool "Test caam rng"167 select CRYPTO_DEV_FSL_CAAM_RNG_API168 help169 Selecting this will enable a self-test to run for the170 caam RNG.171 This test is several minutes long and executes172 just before the RNG is registered with the hw_random API.173 174endif # CRYPTO_DEV_FSL_CAAM_JR175 176endif # CRYPTO_DEV_FSL_CAAM177 178config CRYPTO_DEV_FSL_DPAA2_CAAM179 tristate "QorIQ DPAA2 CAAM (DPSECI) driver"180 depends on FSL_MC_DPIO181 depends on NETDEVICES182 select CRYPTO_DEV_FSL_CAAM_COMMON183 select CRYPTO_DEV_FSL_CAAM_CRYPTO_API_DESC184 select CRYPTO_DEV_FSL_CAAM_AHASH_API_DESC185 select CRYPTO_SKCIPHER186 select CRYPTO_AUTHENC187 select CRYPTO_AEAD188 select CRYPTO_HASH189 select CRYPTO_DES190 select CRYPTO_XTS191 help192 CAAM driver for QorIQ Data Path Acceleration Architecture 2.193 It handles DPSECI DPAA2 objects that sit on the Management Complex194 (MC) fsl-mc bus.195 196 To compile this as a module, choose M here: the module197 will be called dpaa2_caam.198