brintos

brintos / linux-shallow public Read only

0
0
Text · 5.7 KiB · a96e3d2 Raw
184 lines · c
1/* SPDX-License-Identifier: GPL-2.0 */2/*3 * Public definitions for the CAAM/QI (Queue Interface) backend.4 *5 * Copyright 2013-2016 Freescale Semiconductor, Inc.6 * Copyright 2016-2017, 2020 NXP7 */8 9#ifndef __QI_H__10#define __QI_H__11 12#include <crypto/algapi.h>13#include <linux/compiler_attributes.h>14#include <soc/fsl/qman.h>15#include "compat.h"16#include "desc.h"17#include "desc_constr.h"18 19/* Length of a single buffer in the QI driver memory cache */20#define CAAM_QI_MEMCACHE_SIZE	76821 22extern bool caam_congested __read_mostly;23 24/*25 * This is the request structure the driver application should fill while26 * submitting a job to driver.27 */28struct caam_drv_req;29 30/*31 * caam_qi_cbk - application's callback function invoked by the driver when the32 *               request has been successfully processed.33 * @drv_req: original request that was submitted34 * @status: completion status of request (0 - success, non-zero - error code)35 */36typedef void (*caam_qi_cbk)(struct caam_drv_req *drv_req, u32 status);37 38enum optype {39	ENCRYPT,40	DECRYPT,41	NUM_OP42};43 44/**45 * caam_drv_ctx - CAAM/QI backend driver context46 *47 * The jobs are processed by the driver against a driver context.48 * With every cryptographic context, a driver context is attached.49 * The driver context contains data for private use by driver.50 * For the applications, this is an opaque structure.51 *52 * @prehdr: preheader placed before shrd desc53 * @sh_desc: shared descriptor54 * @context_a: shared descriptor dma address55 * @req_fq: to-CAAM request frame queue56 * @rsp_fq: from-CAAM response frame queue57 * @refcnt: reference counter incremented for each frame enqueued in to-CAAM FQ58 * @cpu: cpu on which to receive CAAM response59 * @op_type: operation type60 * @qidev: device pointer for CAAM/QI backend61 */62struct caam_drv_ctx {63	struct {64		u32 prehdr[2];65		u32 sh_desc[MAX_SDLEN];66	} __aligned(CRYPTO_DMA_ALIGN);67	dma_addr_t context_a;68	struct qman_fq *req_fq;69	struct qman_fq *rsp_fq;70	refcount_t refcnt;71	int cpu;72	enum optype op_type;73	struct device *qidev;74};75 76/**77 * caam_drv_req - The request structure the driver application should fill while78 *                submitting a job to driver.79 * @fd_sgt: QMan S/G pointing to output (fd_sgt[0]) and input (fd_sgt[1])80 *          buffers.81 * @cbk: callback function to invoke when job is completed82 * @app_ctx: arbitrary context attached with request by the application83 *84 * The fields mentioned below should not be used by application.85 * These are for private use by driver.86 *87 * @hdr__: linked list header to maintain list of outstanding requests to CAAM88 * @hwaddr: DMA address for the S/G table.89 */90struct caam_drv_req {91	struct qm_sg_entry fd_sgt[2];92	struct caam_drv_ctx *drv_ctx;93	caam_qi_cbk cbk;94	void *app_ctx;95} __aligned(CRYPTO_DMA_ALIGN);96 97/**98 * caam_drv_ctx_init - Initialise a CAAM/QI driver context99 *100 * A CAAM/QI driver context must be attached with each cryptographic context.101 * This function allocates memory for CAAM/QI context and returns a handle to102 * the application. This handle must be submitted along with each enqueue103 * request to the driver by the application.104 *105 * @cpu: CPU where the application prefers to the driver to receive CAAM106 *       responses. The request completion callback would be issued from this107 *       CPU.108 * @sh_desc: shared descriptor pointer to be attached with CAAM/QI driver109 *           context.110 *111 * Returns a driver context on success or negative error code on failure.112 */113struct caam_drv_ctx *caam_drv_ctx_init(struct device *qidev, int *cpu,114				       u32 *sh_desc);115 116/**117 * caam_qi_enqueue - Submit a request to QI backend driver.118 *119 * The request structure must be properly filled as described above.120 *121 * @qidev: device pointer for QI backend122 * @req: CAAM QI request structure123 *124 * Returns 0 on success or negative error code on failure.125 */126int caam_qi_enqueue(struct device *qidev, struct caam_drv_req *req);127 128/**129 * caam_drv_ctx_busy - Check if there are too many jobs pending with CAAM130 *		       or too many CAAM responses are pending to be processed.131 * @drv_ctx: driver context for which job is to be submitted132 *133 * Returns caam congestion status 'true/false'134 */135bool caam_drv_ctx_busy(struct caam_drv_ctx *drv_ctx);136 137/**138 * caam_drv_ctx_update - Update QI driver context139 *140 * Invoked when shared descriptor is required to be change in driver context.141 *142 * @drv_ctx: driver context to be updated143 * @sh_desc: new shared descriptor pointer to be updated in QI driver context144 *145 * Returns 0 on success or negative error code on failure.146 */147int caam_drv_ctx_update(struct caam_drv_ctx *drv_ctx, u32 *sh_desc);148 149/**150 * caam_drv_ctx_rel - Release a QI driver context151 * @drv_ctx: context to be released152 */153void caam_drv_ctx_rel(struct caam_drv_ctx *drv_ctx);154 155int caam_qi_init(struct platform_device *pdev);156 157/**158 * qi_cache_alloc - Allocate buffers from CAAM-QI cache159 *160 * Invoked when a user of the CAAM-QI (i.e. caamalg-qi) needs data which has161 * to be allocated on the hotpath. Instead of using malloc, one can use the162 * services of the CAAM QI memory cache (backed by kmem_cache). The buffers163 * will have a size of 256B, which is sufficient for hosting 16 SG entries.164 *165 * @flags: flags that would be used for the equivalent malloc(..) call166 *167 * Returns a pointer to a retrieved buffer on success or NULL on failure.168 */169void *qi_cache_alloc(gfp_t flags);170 171/**172 * qi_cache_free - Frees buffers allocated from CAAM-QI cache173 *174 * Invoked when a user of the CAAM-QI (i.e. caamalg-qi) no longer needs175 * the buffer previously allocated by a qi_cache_alloc call.176 * No checking is being done, the call is a passthrough call to177 * kmem_cache_free(...)178 *179 * @obj: object previously allocated using qi_cache_alloc()180 */181void qi_cache_free(void *obj);182 183#endif /* __QI_H__ */184