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1/*2 * This file is part of the Chelsio T6 Crypto driver for Linux.3 *4 * Copyright (c) 2003-2016 Chelsio Communications, Inc. All rights reserved.5 *6 * This software is available to you under a choice of one of two7 * licenses. You may choose to be licensed under the terms of the GNU8 * General Public License (GPL) Version 2, available from the file9 * COPYING in the main directory of this source tree, or the10 * OpenIB.org BSD license below:11 *12 * Redistribution and use in source and binary forms, with or13 * without modification, are permitted provided that the following14 * conditions are met:15 *16 * - Redistributions of source code must retain the above17 * copyright notice, this list of conditions and the following18 * disclaimer.19 *20 * - Redistributions in binary form must reproduce the above21 * copyright notice, this list of conditions and the following22 * disclaimer in the documentation and/or other materials23 * provided with the distribution.24 *25 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,26 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF27 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND28 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS29 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN30 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN31 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE32 * SOFTWARE.33 *34 */35 36#ifndef __CHCR_CRYPTO_H__37#define __CHCR_CRYPTO_H__38 39#define GHASH_BLOCK_SIZE 1640#define GHASH_DIGEST_SIZE 1641 42#define CCM_B0_SIZE 1643#define CCM_AAD_FIELD_SIZE 244// 511 - 16(For IV)45#define T6_MAX_AAD_SIZE 49546 47 48/* Define following if h/w is not dropping the AAD and IV data before49 * giving the processed data50 */51 52#define CHCR_CRA_PRIORITY 50053#define CHCR_AEAD_PRIORITY 600054#define CHCR_AES_MAX_KEY_LEN (2 * (AES_MAX_KEY_SIZE)) /* consider xts */55#define CHCR_MAX_CRYPTO_IV_LEN 16 /* AES IV len */56 57#define CHCR_MAX_AUTHENC_AES_KEY_LEN 32 /* max aes key length*/58#define CHCR_MAX_AUTHENC_SHA_KEY_LEN 128 /* max sha key length*/59 60#define CHCR_GIVENCRYPT_OP 261/* CPL/SCMD parameters */62 63#define CHCR_ENCRYPT_OP 064#define CHCR_DECRYPT_OP 165 66#define CHCR_SCMD_SEQ_NO_CTRL_32BIT 167#define CHCR_SCMD_SEQ_NO_CTRL_48BIT 268#define CHCR_SCMD_SEQ_NO_CTRL_64BIT 369 70#define CHCR_SCMD_PROTO_VERSION_GENERIC 471 72#define CHCR_SCMD_AUTH_CTRL_AUTH_CIPHER 073#define CHCR_SCMD_AUTH_CTRL_CIPHER_AUTH 174 75#define CHCR_SCMD_CIPHER_MODE_NOP 076#define CHCR_SCMD_CIPHER_MODE_AES_CBC 177#define CHCR_SCMD_CIPHER_MODE_AES_GCM 278#define CHCR_SCMD_CIPHER_MODE_AES_CTR 379#define CHCR_SCMD_CIPHER_MODE_GENERIC_AES 480#define CHCR_SCMD_CIPHER_MODE_AES_XTS 681#define CHCR_SCMD_CIPHER_MODE_AES_CCM 782 83#define CHCR_SCMD_AUTH_MODE_NOP 084#define CHCR_SCMD_AUTH_MODE_SHA1 185#define CHCR_SCMD_AUTH_MODE_SHA224 286#define CHCR_SCMD_AUTH_MODE_SHA256 387#define CHCR_SCMD_AUTH_MODE_GHASH 488#define CHCR_SCMD_AUTH_MODE_SHA512_224 589#define CHCR_SCMD_AUTH_MODE_SHA512_256 690#define CHCR_SCMD_AUTH_MODE_SHA512_384 791#define CHCR_SCMD_AUTH_MODE_SHA512_512 892#define CHCR_SCMD_AUTH_MODE_CBCMAC 993#define CHCR_SCMD_AUTH_MODE_CMAC 1094 95#define CHCR_SCMD_HMAC_CTRL_NOP 096#define CHCR_SCMD_HMAC_CTRL_NO_TRUNC 197#define CHCR_SCMD_HMAC_CTRL_TRUNC_RFC4366 298#define CHCR_SCMD_HMAC_CTRL_IPSEC_96BIT 399#define CHCR_SCMD_HMAC_CTRL_PL1 4100#define CHCR_SCMD_HMAC_CTRL_PL2 5101#define CHCR_SCMD_HMAC_CTRL_PL3 6102#define CHCR_SCMD_HMAC_CTRL_DIV2 7103#define VERIFY_HW 0104#define VERIFY_SW 1105 106#define CHCR_SCMD_IVGEN_CTRL_HW 0107#define CHCR_SCMD_IVGEN_CTRL_SW 1108/* This are not really mac key size. They are intermediate values109 * of sha engine and its size110 */111#define CHCR_KEYCTX_MAC_KEY_SIZE_128 0112#define CHCR_KEYCTX_MAC_KEY_SIZE_160 1113#define CHCR_KEYCTX_MAC_KEY_SIZE_192 2114#define CHCR_KEYCTX_MAC_KEY_SIZE_256 3115#define CHCR_KEYCTX_MAC_KEY_SIZE_512 4116#define CHCR_KEYCTX_CIPHER_KEY_SIZE_128 0117#define CHCR_KEYCTX_CIPHER_KEY_SIZE_192 1118#define CHCR_KEYCTX_CIPHER_KEY_SIZE_256 2119#define CHCR_KEYCTX_NO_KEY 15120 121#define CHCR_CPL_FW4_PLD_IV_OFFSET (5 * 64) /* bytes. flt #5 and #6 */122#define CHCR_CPL_FW4_PLD_HASH_RESULT_OFFSET (7 * 64) /* bytes. flt #7 */123#define CHCR_CPL_FW4_PLD_DATA_SIZE (4 * 64) /* bytes. flt #4 to #7 */124 125#define KEY_CONTEXT_HDR_SALT_AND_PAD 16126#define flits_to_bytes(x) (x * 8)127 128#define IV_NOP 0129#define IV_IMMEDIATE 1130#define IV_DSGL 2131 132#define AEAD_H_SIZE 16133 134#define CRYPTO_ALG_SUB_TYPE_MASK 0x0f000000135#define CRYPTO_ALG_SUB_TYPE_HASH_HMAC 0x01000000136#define CRYPTO_ALG_SUB_TYPE_AEAD_RFC4106 0x02000000137#define CRYPTO_ALG_SUB_TYPE_AEAD_GCM 0x03000000138#define CRYPTO_ALG_SUB_TYPE_CBC_SHA 0x04000000139#define CRYPTO_ALG_SUB_TYPE_AEAD_CCM 0x05000000140#define CRYPTO_ALG_SUB_TYPE_AEAD_RFC4309 0x06000000141#define CRYPTO_ALG_SUB_TYPE_CBC_NULL 0x07000000142#define CRYPTO_ALG_SUB_TYPE_CTR 0x08000000143#define CRYPTO_ALG_SUB_TYPE_CTR_RFC3686 0x09000000144#define CRYPTO_ALG_SUB_TYPE_XTS 0x0a000000145#define CRYPTO_ALG_SUB_TYPE_CBC 0x0b000000146#define CRYPTO_ALG_SUB_TYPE_CTR_SHA 0x0c000000147#define CRYPTO_ALG_SUB_TYPE_CTR_NULL 0x0d000000148#define CRYPTO_ALG_TYPE_HMAC (CRYPTO_ALG_TYPE_AHASH |\149 CRYPTO_ALG_SUB_TYPE_HASH_HMAC)150 151#define MAX_SCRATCH_PAD_SIZE 32152 153#define CHCR_HASH_MAX_BLOCK_SIZE_64 64154#define CHCR_HASH_MAX_BLOCK_SIZE_128 128155#define CHCR_SRC_SG_SIZE (0x10000 - sizeof(int))156#define CHCR_DST_SG_SIZE 2048157 158static inline struct chcr_context *a_ctx(struct crypto_aead *tfm)159{160 return crypto_aead_ctx(tfm);161}162 163static inline struct chcr_context *c_ctx(struct crypto_skcipher *tfm)164{165 return crypto_skcipher_ctx(tfm);166}167 168static inline struct chcr_context *h_ctx(struct crypto_ahash *tfm)169{170 return crypto_tfm_ctx(crypto_ahash_tfm(tfm));171}172 173struct ablk_ctx {174 struct crypto_skcipher *sw_cipher;175 __be32 key_ctx_hdr;176 unsigned int enckey_len;177 unsigned char ciph_mode;178 u8 key[CHCR_AES_MAX_KEY_LEN];179 u8 nonce[4];180 u8 rrkey[AES_MAX_KEY_SIZE];181};182struct chcr_aead_reqctx {183 struct sk_buff *skb;184 dma_addr_t iv_dma;185 dma_addr_t b0_dma;186 unsigned int b0_len;187 unsigned int op;188 u16 imm;189 u16 verify;190 u16 txqidx;191 u16 rxqidx;192 u8 iv[CHCR_MAX_CRYPTO_IV_LEN + MAX_SCRATCH_PAD_SIZE];193 u8 *scratch_pad;194};195 196struct ulptx_walk {197 struct ulptx_sgl *sgl;198 unsigned int nents;199 unsigned int pair_idx;200 unsigned int last_sg_len;201 struct scatterlist *last_sg;202 struct ulptx_sge_pair *pair;203 204};205 206struct dsgl_walk {207 unsigned int nents;208 unsigned int last_sg_len;209 struct scatterlist *last_sg;210 struct cpl_rx_phys_dsgl *dsgl;211 struct phys_sge_pairs *to;212};213 214struct chcr_gcm_ctx {215 u8 ghash_h[AEAD_H_SIZE];216};217 218struct chcr_authenc_ctx {219 u8 dec_rrkey[AES_MAX_KEY_SIZE];220 u8 h_iopad[2 * CHCR_HASH_MAX_DIGEST_SIZE];221 unsigned char auth_mode;222};223 224struct __aead_ctx {225 union {226 DECLARE_FLEX_ARRAY(struct chcr_gcm_ctx, gcm);227 DECLARE_FLEX_ARRAY(struct chcr_authenc_ctx, authenc);228 };229};230 231struct chcr_aead_ctx {232 __be32 key_ctx_hdr;233 unsigned int enckey_len;234 struct crypto_aead *sw_cipher;235 u8 salt[MAX_SALT];236 u8 key[CHCR_AES_MAX_KEY_LEN];237 u8 nonce[4];238 u16 hmac_ctrl;239 u16 mayverify;240 struct __aead_ctx ctx[];241};242 243struct hmac_ctx {244 struct crypto_shash *base_hash;245 u8 ipad[CHCR_HASH_MAX_BLOCK_SIZE_128];246 u8 opad[CHCR_HASH_MAX_BLOCK_SIZE_128];247};248 249struct __crypto_ctx {250 union {251 struct hmac_ctx hmacctx;252 struct ablk_ctx ablkctx;253 struct chcr_aead_ctx aeadctx;254 };255};256 257struct chcr_context {258 struct chcr_dev *dev;259 unsigned char rxq_perchan;260 unsigned char txq_perchan;261 unsigned int ntxq;262 unsigned int nrxq;263 struct completion cbc_aes_aio_done;264 struct __crypto_ctx crypto_ctx[];265};266 267struct chcr_hctx_per_wr {268 struct scatterlist *srcsg;269 struct sk_buff *skb;270 dma_addr_t dma_addr;271 u32 dma_len;272 unsigned int src_ofst;273 unsigned int processed;274 u32 result;275 u8 is_sg_map;276 u8 imm;277 /*Final callback called. Driver cannot rely on nbytes to decide278 * final call279 */280 u8 isfinal;281};282 283struct chcr_ahash_req_ctx {284 struct chcr_hctx_per_wr hctx_wr;285 u8 *reqbfr;286 u8 *skbfr;287 /* SKB which is being sent to the hardware for processing */288 u64 data_len; /* Data len till time */289 u16 txqidx;290 u16 rxqidx;291 u8 reqlen;292 u8 partial_hash[CHCR_HASH_MAX_DIGEST_SIZE];293 u8 bfr1[CHCR_HASH_MAX_BLOCK_SIZE_128];294 u8 bfr2[CHCR_HASH_MAX_BLOCK_SIZE_128];295};296 297struct chcr_skcipher_req_ctx {298 struct sk_buff *skb;299 struct scatterlist *dstsg;300 unsigned int processed;301 unsigned int last_req_len;302 unsigned int partial_req;303 struct scatterlist *srcsg;304 unsigned int src_ofst;305 unsigned int dst_ofst;306 unsigned int op;307 u16 imm;308 u8 iv[CHCR_MAX_CRYPTO_IV_LEN];309 u8 init_iv[CHCR_MAX_CRYPTO_IV_LEN];310 u16 txqidx;311 u16 rxqidx;312 struct skcipher_request fallback_req; // keep at the end313};314 315struct chcr_alg_template {316 u32 type;317 u32 is_registered;318 union {319 struct skcipher_alg skcipher;320 struct ahash_alg hash;321 struct aead_alg aead;322 } alg;323};324 325typedef struct sk_buff *(*create_wr_t)(struct aead_request *req,326 unsigned short qid,327 int size);328 329void chcr_verify_tag(struct aead_request *req, u8 *input, int *err);330int chcr_aead_dma_map(struct device *dev, struct aead_request *req,331 unsigned short op_type);332void chcr_aead_dma_unmap(struct device *dev, struct aead_request *req,333 unsigned short op_type);334void chcr_add_aead_dst_ent(struct aead_request *req,335 struct cpl_rx_phys_dsgl *phys_cpl,336 unsigned short qid);337void chcr_add_aead_src_ent(struct aead_request *req, struct ulptx_sgl *ulptx);338void chcr_add_cipher_src_ent(struct skcipher_request *req,339 void *ulptx,340 struct cipher_wr_param *wrparam);341int chcr_cipher_dma_map(struct device *dev, struct skcipher_request *req);342void chcr_cipher_dma_unmap(struct device *dev, struct skcipher_request *req);343void chcr_add_cipher_dst_ent(struct skcipher_request *req,344 struct cpl_rx_phys_dsgl *phys_cpl,345 struct cipher_wr_param *wrparam,346 unsigned short qid);347void chcr_add_hash_src_ent(struct ahash_request *req, struct ulptx_sgl *ulptx,348 struct hash_wr_param *param);349int chcr_hash_dma_map(struct device *dev, struct ahash_request *req);350void chcr_hash_dma_unmap(struct device *dev, struct ahash_request *req);351void chcr_aead_common_exit(struct aead_request *req);352#endif /* __CHCR_CRYPTO_H__ */353