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1# SPDX-License-Identifier: GPL-2.0-only2#3# DMA engine configuration4#5 6menuconfig DMADEVICES7 bool "DMA Engine support"8 depends on HAS_DMA9 help10 DMA engines can do asynchronous data transfers without11 involving the host CPU. Currently, this framework can be12 used to offload memory copies in the network stack and13 RAID operations in the MD driver. This menu only presents14 DMA Device drivers supported by the configured arch, it may15 be empty in some cases.16 17config DMADEVICES_DEBUG18 bool "DMA Engine debugging"19 depends on DMADEVICES != n20 help21 This is an option for use by developers; most people should22 say N here. This enables DMA engine core and driver debugging.23 24config DMADEVICES_VDEBUG25 bool "DMA Engine verbose debugging"26 depends on DMADEVICES_DEBUG != n27 help28 This is an option for use by developers; most people should29 say N here. This enables deeper (more verbose) debugging of30 the DMA engine core and drivers.31 32 33if DMADEVICES34 35comment "DMA Devices"36 37#core38config ASYNC_TX_ENABLE_CHANNEL_SWITCH39 bool40 41config ARCH_HAS_ASYNC_TX_FIND_CHANNEL42 bool43 44config DMA_ENGINE45 bool46 47config DMA_VIRTUAL_CHANNELS48 tristate49 50config DMA_ACPI51 def_bool y52 depends on ACPI53 54config DMA_OF55 def_bool y56 depends on OF57 select DMA_ENGINE58 59#devices60config ALTERA_MSGDMA61 tristate "Altera / Intel mSGDMA Engine"62 depends on HAS_IOMEM63 select DMA_ENGINE64 help65 Enable support for Altera / Intel mSGDMA controller.66 67config AMBA_PL08X68 bool "ARM PrimeCell PL080 or PL081 support"69 depends on ARM_AMBA70 select DMA_ENGINE71 select DMA_VIRTUAL_CHANNELS72 help73 Say yes if your platform has a PL08x DMAC device which can74 provide DMA engine support. This includes the original ARM75 PL080 and PL081, Samsungs PL080 derivative and Faraday76 Technology's FTDMAC020 PL080 derivative.77 78config AMCC_PPC440SPE_ADMA79 tristate "AMCC PPC440SPe ADMA support"80 depends on 440SPe || 440SP81 select DMA_ENGINE82 select DMA_ENGINE_RAID83 select ARCH_HAS_ASYNC_TX_FIND_CHANNEL84 select ASYNC_TX_ENABLE_CHANNEL_SWITCH85 help86 Enable support for the AMCC PPC440SPe RAID engines.87 88config APPLE_ADMAC89 tristate "Apple ADMAC support"90 depends on ARCH_APPLE || COMPILE_TEST91 select DMA_ENGINE92 default ARCH_APPLE93 help94 Enable support for Audio DMA Controller found on Apple Silicon SoCs.95 96config AT_HDMAC97 tristate "Atmel AHB DMA support"98 depends on ARCH_AT9199 select DMA_ENGINE100 select DMA_VIRTUAL_CHANNELS101 help102 Support the Atmel AHB DMA controller.103 104config AT_XDMAC105 tristate "Atmel XDMA support"106 depends on ARCH_AT91107 select DMA_ENGINE108 help109 Support the Atmel XDMA controller.110 111config AXI_DMAC112 tristate "Analog Devices AXI-DMAC DMA support"113 depends on MICROBLAZE || NIOS2 || ARCH_ZYNQ || ARCH_ZYNQMP || ARCH_INTEL_SOCFPGA || COMPILE_TEST114 select DMA_ENGINE115 select DMA_VIRTUAL_CHANNELS116 select REGMAP_MMIO117 help118 Enable support for the Analog Devices AXI-DMAC peripheral. This DMA119 controller is often used in Analog Devices' reference designs for FPGA120 platforms.121 122config BCM_SBA_RAID123 tristate "Broadcom SBA RAID engine support"124 depends on ARM64 || COMPILE_TEST125 depends on MAILBOX && RAID6_PQ126 select DMA_ENGINE127 select DMA_ENGINE_RAID128 select ASYNC_TX_DISABLE_XOR_VAL_DMA129 select ASYNC_TX_DISABLE_PQ_VAL_DMA130 default m if ARCH_BCM_IPROC131 help132 Enable support for Broadcom SBA RAID Engine. The SBA RAID133 engine is available on most of the Broadcom iProc SoCs. It134 has the capability to offload memcpy, xor and pq computation135 for raid5/6.136 137config DMA_BCM2835138 tristate "BCM2835 DMA engine support"139 depends on ARCH_BCM2835140 select DMA_ENGINE141 select DMA_VIRTUAL_CHANNELS142 143config DMA_JZ4780144 tristate "JZ4780 DMA support"145 depends on MIPS || COMPILE_TEST146 select DMA_ENGINE147 select DMA_VIRTUAL_CHANNELS148 help149 This selects support for the DMA controller in Ingenic JZ4780 SoCs.150 If you have a board based on such a SoC and wish to use DMA for151 devices which can use the DMA controller, say Y or M here.152 153config DMA_SA11X0154 tristate "SA-11x0 DMA support"155 depends on ARCH_SA1100 || COMPILE_TEST156 select DMA_ENGINE157 select DMA_VIRTUAL_CHANNELS158 help159 Support the DMA engine found on Intel StrongARM SA-1100 and160 SA-1110 SoCs. This DMA engine can only be used with on-chip161 devices.162 163config DMA_SUN4I164 tristate "Allwinner A10 DMA SoCs support"165 depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I166 default (MACH_SUN4I || MACH_SUN5I || MACH_SUN7I)167 select DMA_ENGINE168 select DMA_VIRTUAL_CHANNELS169 help170 Enable support for the DMA controller present in the sun4i,171 sun5i and sun7i Allwinner ARM SoCs.172 173config DMA_SUN6I174 tristate "Allwinner A31 SoCs DMA support"175 depends on ARCH_SUNXI || COMPILE_TEST176 depends on RESET_CONTROLLER177 select DMA_ENGINE178 select DMA_VIRTUAL_CHANNELS179 help180 Support for the DMA engine first found in Allwinner A31 SoCs.181 182config DW_AXI_DMAC183 tristate "Synopsys DesignWare AXI DMA support"184 depends on OF185 depends on HAS_IOMEM186 select DMA_ENGINE187 select DMA_VIRTUAL_CHANNELS188 help189 Enable support for Synopsys DesignWare AXI DMA controller.190 NOTE: This driver wasn't tested on 64 bit platform because191 of lack 64 bit platform with Synopsys DW AXI DMAC.192 193config EP93XX_DMA194 bool "Cirrus Logic EP93xx DMA support"195 depends on ARCH_EP93XX || COMPILE_TEST196 select DMA_ENGINE197 help198 Enable support for the Cirrus Logic EP93xx M2P/M2M DMA controller.199 200config FSL_DMA201 tristate "Freescale Elo series DMA support"202 depends on FSL_SOC203 select DMA_ENGINE204 select ASYNC_TX_ENABLE_CHANNEL_SWITCH205 help206 Enable support for the Freescale Elo series DMA controllers.207 The Elo is the DMA controller on some mpc82xx and mpc83xx parts, the208 EloPlus is on mpc85xx and mpc86xx and Pxxx parts, and the Elo3 is on209 some Txxx and Bxxx parts.210 211config FSL_EDMA212 tristate "Freescale eDMA engine support"213 depends on OF214 depends on HAS_IOMEM215 select DMA_ENGINE216 select DMA_VIRTUAL_CHANNELS217 help218 Support the Freescale eDMA engine with programmable channel219 multiplexing capability for DMA request sources(slot).220 This module can be found on Freescale Vybrid and LS-1 SoCs.221 222config FSL_QDMA223 tristate "NXP Layerscape qDMA engine support"224 depends on ARM || ARM64225 select DMA_ENGINE226 select DMA_VIRTUAL_CHANNELS227 select DMA_ENGINE_RAID228 select ASYNC_TX_ENABLE_CHANNEL_SWITCH229 help230 Support the NXP Layerscape qDMA engine with command queue and legacy mode.231 Channel virtualization is supported through enqueuing of DMA jobs to,232 or dequeuing DMA jobs from, different work queues.233 This module can be found on NXP Layerscape SoCs.234 The qdma driver only work on SoCs with a DPAA hardware block.235 236config FSL_RAID237 tristate "Freescale RAID engine Support"238 depends on FSL_SOC && !ASYNC_TX_ENABLE_CHANNEL_SWITCH239 select DMA_ENGINE240 select DMA_ENGINE_RAID241 help242 Enable support for Freescale RAID Engine. RAID Engine is243 available on some QorIQ SoCs (like P5020/P5040). It has244 the capability to offload memcpy, xor and pq computation245 for raid5/6.246 247config HISI_DMA248 tristate "HiSilicon DMA Engine support"249 depends on ARCH_HISI || COMPILE_TEST250 depends on PCI_MSI251 select DMA_ENGINE252 select DMA_VIRTUAL_CHANNELS253 help254 Support HiSilicon Kunpeng DMA engine.255 256config IMG_MDC_DMA257 tristate "IMG MDC support"258 depends on MIPS || COMPILE_TEST259 depends on MFD_SYSCON260 select DMA_ENGINE261 select DMA_VIRTUAL_CHANNELS262 help263 Enable support for the IMG multi-threaded DMA controller (MDC).264 265config IMX_DMA266 tristate "i.MX DMA support"267 depends on ARCH_MXC268 select DMA_ENGINE269 help270 Support the i.MX DMA engine. This engine is integrated into271 Freescale i.MX1/21/27 chips.272 273config IMX_SDMA274 tristate "i.MX SDMA support"275 depends on ARCH_MXC276 select DMA_ENGINE277 select DMA_VIRTUAL_CHANNELS278 help279 Support the i.MX SDMA engine. This engine is integrated into280 Freescale i.MX25/31/35/51/53/6 chips.281 282config INTEL_IDMA64283 tristate "Intel integrated DMA 64-bit support"284 depends on HAS_IOMEM285 select DMA_ENGINE286 select DMA_VIRTUAL_CHANNELS287 help288 Enable DMA support for Intel Low Power Subsystem such as found on289 Intel Skylake PCH.290 291config INTEL_IDXD_BUS292 tristate293 default INTEL_IDXD294 295config INTEL_IDXD296 tristate "Intel Data Accelerators support"297 depends on PCI && X86_64 && !UML298 depends on PCI_MSI299 depends on PCI_PASID300 depends on SBITMAP301 select DMA_ENGINE302 help303 Enable support for the Intel(R) data accelerators present304 in Intel Xeon CPU.305 306 Say Y if you have such a platform.307 308 If unsure, say N.309 310config INTEL_IDXD_COMPAT311 bool "Legacy behavior for idxd driver"312 depends on PCI && X86_64313 select INTEL_IDXD_BUS314 help315 Compatible driver to support old /sys/bus/dsa/drivers/dsa behavior.316 The old behavior performed driver bind/unbind for device and wq317 devices all under the dsa driver. The compat driver will emulate318 the legacy behavior in order to allow existing support apps (i.e.319 accel-config) to continue function. It is expected that accel-config320 v3.2 and earlier will need the compat mode. A distro with later321 accel-config version can disable this compat config.322 323 Say Y if you have old applications that require such behavior.324 325 If unsure, say N.326 327# Config symbol that collects all the dependencies that's necessary to328# support shared virtual memory for the devices supported by idxd.329config INTEL_IDXD_SVM330 bool "Accelerator Shared Virtual Memory Support"331 depends on INTEL_IDXD332 depends on INTEL_IOMMU_SVM333 depends on PCI_PRI334 depends on PCI_PASID335 depends on PCI_IOV336 337config INTEL_IDXD_PERFMON338 bool "Intel Data Accelerators performance monitor support"339 depends on INTEL_IDXD340 help341 Enable performance monitor (pmu) support for the Intel(R)342 data accelerators present in Intel Xeon CPU. With this343 enabled, perf can be used to monitor the DSA (Intel Data344 Streaming Accelerator) events described in the Intel DSA345 spec.346 347 If unsure, say N.348 349config INTEL_IOATDMA350 tristate "Intel I/OAT DMA support"351 depends on PCI && X86_64 && !UML352 select DMA_ENGINE353 select DMA_ENGINE_RAID354 select DCA355 help356 Enable support for the Intel(R) I/OAT DMA engine present357 in recent Intel Xeon chipsets.358 359 Say Y here if you have such a chipset.360 361 If unsure, say N.362 363config K3_DMA364 tristate "Hisilicon K3 DMA support"365 depends on ARCH_HISI || COMPILE_TEST366 select DMA_ENGINE367 select DMA_VIRTUAL_CHANNELS368 help369 Support the DMA engine for Hisilicon K3 platform370 devices.371 372config LOONGSON1_APB_DMA373 tristate "Loongson1 APB DMA support"374 depends on MACH_LOONGSON32 || COMPILE_TEST375 select DMA_ENGINE376 select DMA_VIRTUAL_CHANNELS377 help378 This selects support for the APB DMA controller in Loongson1 SoCs,379 which is required by Loongson1 NAND and audio support.380 381config LPC18XX_DMAMUX382 bool "NXP LPC18xx/43xx DMA MUX for PL080"383 depends on ARCH_LPC18XX || COMPILE_TEST384 depends on OF && AMBA_PL08X385 select MFD_SYSCON386 help387 Enable support for DMA on NXP LPC18xx/43xx platforms388 with PL080 and multiplexed DMA request lines.389 390config LPC32XX_DMAMUX391 bool "NXP LPC32xx DMA MUX for PL080"392 depends on ARCH_LPC32XX || COMPILE_TEST393 depends on OF && AMBA_PL08X394 select MFD_SYSCON395 help396 Support for PL080 multiplexed DMA request lines on397 LPC32XX platrofm.398 399config LS2X_APB_DMA400 tristate "Loongson LS2X APB DMA support"401 depends on LOONGARCH || COMPILE_TEST402 select DMA_ENGINE403 select DMA_VIRTUAL_CHANNELS404 help405 Support for the Loongson LS2X APB DMA controller driver. The406 DMA controller is having single DMA channel which can be407 configured for different peripherals like audio, nand, sdio408 etc which is in APB bus.409 410 This DMA controller transfers data from memory to peripheral fifo.411 It does not support memory to memory data transfer.412 413config MCF_EDMA414 tristate "Freescale eDMA engine support, ColdFire mcf5441x SoCs"415 depends on M5441x || (COMPILE_TEST && FSL_EDMA=n)416 select DMA_ENGINE417 select DMA_VIRTUAL_CHANNELS418 help419 Support the Freescale ColdFire eDMA engine, 64-channel420 implementation that performs complex data transfers with421 minimal intervention from a host processor.422 This module can be found on Freescale ColdFire mcf5441x SoCs.423 424config MILBEAUT_HDMAC425 tristate "Milbeaut AHB DMA support"426 depends on ARCH_MILBEAUT || COMPILE_TEST427 depends on OF428 select DMA_ENGINE429 select DMA_VIRTUAL_CHANNELS430 help431 Say yes here to support the Socionext Milbeaut432 HDMAC device.433 434config MILBEAUT_XDMAC435 tristate "Milbeaut AXI DMA support"436 depends on ARCH_MILBEAUT || COMPILE_TEST437 depends on OF438 select DMA_ENGINE439 select DMA_VIRTUAL_CHANNELS440 help441 Say yes here to support the Socionext Milbeaut442 XDMAC device.443 444config MMP_PDMA445 tristate "MMP PDMA support"446 depends on ARCH_MMP || ARCH_PXA || COMPILE_TEST447 select DMA_ENGINE448 help449 Support the MMP PDMA engine for PXA and MMP platform.450 451config MMP_TDMA452 tristate "MMP Two-Channel DMA support"453 depends on ARCH_MMP || COMPILE_TEST454 select DMA_ENGINE455 select GENERIC_ALLOCATOR456 help457 Support the MMP Two-Channel DMA engine.458 This engine used for MMP Audio DMA and pxa910 SQU.459 460config MOXART_DMA461 tristate "MOXART DMA support"462 depends on ARCH_MOXART463 select DMA_ENGINE464 select DMA_VIRTUAL_CHANNELS465 help466 Enable support for the MOXA ART SoC DMA controller.467 468 Say Y here if you enabled MMP ADMA, otherwise say N.469 470config MPC512X_DMA471 tristate "Freescale MPC512x built-in DMA engine support"472 depends on PPC_MPC512x || PPC_MPC831x473 select DMA_ENGINE474 help475 Enable support for the Freescale MPC512x built-in DMA engine.476 477config MV_XOR478 bool "Marvell XOR engine support"479 depends on PLAT_ORION || ARCH_MVEBU || COMPILE_TEST480 select DMA_ENGINE481 select DMA_ENGINE_RAID482 select ASYNC_TX_ENABLE_CHANNEL_SWITCH483 help484 Enable support for the Marvell XOR engine.485 486config MV_XOR_V2487 bool "Marvell XOR engine version 2 support "488 depends on ARM64489 select DMA_ENGINE490 select DMA_ENGINE_RAID491 select ASYNC_TX_ENABLE_CHANNEL_SWITCH492 select GENERIC_MSI_IRQ493 help494 Enable support for the Marvell version 2 XOR engine.495 496 This engine provides acceleration for copy, XOR and RAID6497 operations, and is available on Marvell Armada 7K and 8K498 platforms.499 500config MXS_DMA501 bool "MXS DMA support"502 depends on ARCH_MXS || ARCH_MXC || COMPILE_TEST503 select STMP_DEVICE504 select DMA_ENGINE505 help506 Support the MXS DMA engine. This engine including APBH-DMA507 and APBX-DMA is integrated into some Freescale chips.508 509config NBPFAXI_DMA510 tristate "Renesas Type-AXI NBPF DMA support"511 select DMA_ENGINE512 depends on ARM || COMPILE_TEST513 help514 Support for "Type-AXI" NBPF DMA IPs from Renesas515 516config OWL_DMA517 tristate "Actions Semi Owl SoCs DMA support"518 depends on ARCH_ACTIONS519 select DMA_ENGINE520 select DMA_VIRTUAL_CHANNELS521 help522 Enable support for the Actions Semi Owl SoCs DMA controller.523 524config PCH_DMA525 tristate "Intel EG20T PCH / LAPIS Semicon IOH(ML7213/ML7223/ML7831) DMA"526 depends on PCI && (X86_32 || COMPILE_TEST)527 select DMA_ENGINE528 help529 Enable support for Intel EG20T PCH DMA engine.530 531 This driver also can be used for LAPIS Semiconductor IOH(Input/532 Output Hub), ML7213, ML7223 and ML7831.533 ML7213 IOH is for IVI(In-Vehicle Infotainment) use, ML7223 IOH is534 for MP(Media Phone) use and ML7831 IOH is for general purpose use.535 ML7213/ML7223/ML7831 is companion chip for Intel Atom E6xx series.536 ML7213/ML7223/ML7831 is completely compatible for Intel EG20T PCH.537 538config PL330_DMA539 tristate "DMA API Driver for PL330"540 select DMA_ENGINE541 depends on ARM_AMBA542 help543 Select if your platform has one or more PL330 DMACs.544 You need to provide platform specific settings via545 platform_data for a dma-pl330 device.546 547config PXA_DMA548 bool "PXA DMA support"549 depends on (ARCH_MMP || ARCH_PXA)550 select DMA_ENGINE551 select DMA_VIRTUAL_CHANNELS552 help553 Support the DMA engine for PXA. It is also compatible with MMP PDMA554 platform. The internal DMA IP of all PXA variants is supported, with555 16 to 32 channels for peripheral to memory or memory to memory556 transfers.557 558config PLX_DMA559 tristate "PLX ExpressLane PEX Switch DMA Engine Support"560 depends on PCI561 select DMA_ENGINE562 help563 Some PLX ExpressLane PCI Switches support additional DMA engines.564 These are exposed via extra functions on the switch's565 upstream port. Each function exposes one DMA channel.566 567config STE_DMA40568 bool "ST-Ericsson DMA40 support"569 depends on ARCH_U8500570 select DMA_ENGINE571 select SRAM572 help573 Support for ST-Ericsson DMA40 controller574 575config ST_FDMA576 tristate "ST FDMA dmaengine support"577 depends on ARCH_STI578 depends on REMOTEPROC579 select ST_SLIM_REMOTEPROC580 select DMA_ENGINE581 select DMA_VIRTUAL_CHANNELS582 help583 Enable support for ST FDMA controller.584 It supports 16 independent DMA channels, accepts up to 32 DMA requests585 586 Say Y here if you have such a chipset.587 If unsure, say N.588 589config SPRD_DMA590 tristate "Spreadtrum DMA support"591 depends on ARCH_SPRD || COMPILE_TEST592 select DMA_ENGINE593 select DMA_VIRTUAL_CHANNELS594 help595 Enable support for the on-chip DMA controller on Spreadtrum platform.596 597config TXX9_DMAC598 tristate "Toshiba TXx9 SoC DMA support"599 depends on MACH_TX49XX600 select DMA_ENGINE601 help602 Support the TXx9 SoC internal DMA controller. This can be603 integrated in chips such as the Toshiba TX4927/38/39.604 605config TEGRA186_GPC_DMA606 tristate "NVIDIA Tegra GPC DMA support"607 depends on (ARCH_TEGRA || COMPILE_TEST) && ARCH_DMA_ADDR_T_64BIT608 depends on IOMMU_API609 select DMA_ENGINE610 select DMA_VIRTUAL_CHANNELS611 help612 Support for the NVIDIA Tegra General Purpose Central DMA controller.613 The DMA controller has multiple DMA channels which can be configured614 for different peripherals like UART, SPI, etc which are on APB bus.615 This DMA controller transfers data from memory to peripheral FIFO616 or vice versa. It also supports memory to memory data transfer.617 618config TEGRA20_APB_DMA619 tristate "NVIDIA Tegra20 APB DMA support"620 depends on ARCH_TEGRA || COMPILE_TEST621 select DMA_ENGINE622 help623 Support for the NVIDIA Tegra20 APB DMA controller driver. The624 DMA controller is having multiple DMA channel which can be625 configured for different peripherals like audio, UART, SPI,626 I2C etc which is in APB bus.627 This DMA controller transfers data from memory to peripheral fifo628 or vice versa. It does not support memory to memory data transfer.629 630config TEGRA210_ADMA631 tristate "NVIDIA Tegra210 ADMA support"632 depends on (ARCH_TEGRA || COMPILE_TEST)633 select DMA_ENGINE634 select DMA_VIRTUAL_CHANNELS635 help636 Support for the NVIDIA Tegra210/Tegra186/Tegra194/Tegra234 ADMA637 controller driver. The DMA controller has multiple DMA channels638 and is used to service various audio clients in the Tegra210639 audio processing engine (APE). This DMA controller transfers640 data from memory to peripheral and vice versa. It does not641 support memory to memory data transfer.642 643config TIMB_DMA644 tristate "Timberdale FPGA DMA support"645 depends on MFD_TIMBERDALE || COMPILE_TEST646 select DMA_ENGINE647 help648 Enable support for the Timberdale FPGA DMA engine.649 650config UNIPHIER_MDMAC651 tristate "UniPhier MIO DMAC"652 depends on ARCH_UNIPHIER || COMPILE_TEST653 depends on OF654 select DMA_ENGINE655 select DMA_VIRTUAL_CHANNELS656 help657 Enable support for the MIO DMAC (Media I/O DMA controller) on the658 UniPhier platform. This DMA controller is used as the external659 DMA engine of the SD/eMMC controllers of the LD4, Pro4, sLD8 SoCs.660 661config UNIPHIER_XDMAC662 tristate "UniPhier XDMAC support"663 depends on ARCH_UNIPHIER || COMPILE_TEST664 depends on OF665 select DMA_ENGINE666 select DMA_VIRTUAL_CHANNELS667 help668 Enable support for the XDMAC (external DMA controller) on the669 UniPhier platform. This DMA controller can transfer data from670 memory to memory, memory to peripheral and peripheral to memory.671 672config XGENE_DMA673 tristate "APM X-Gene DMA support"674 depends on ARCH_XGENE || COMPILE_TEST675 select DMA_ENGINE676 select DMA_ENGINE_RAID677 select ASYNC_TX_ENABLE_CHANNEL_SWITCH678 help679 Enable support for the APM X-Gene SoC DMA engine.680 681config XILINX_DMA682 tristate "Xilinx AXI DMAS Engine"683 depends on HAS_IOMEM684 select DMA_ENGINE685 help686 Enable support for Xilinx AXI VDMA Soft IP.687 688 AXI VDMA engine provides high-bandwidth direct memory access689 between memory and AXI4-Stream video type target690 peripherals including peripherals which support AXI4-691 Stream Video Protocol. It has two stream interfaces/692 channels, Memory Mapped to Stream (MM2S) and Stream to693 Memory Mapped (S2MM) for the data transfers.694 AXI CDMA engine provides high-bandwidth direct memory access695 between a memory-mapped source address and a memory-mapped696 destination address.697 AXI DMA engine provides high-bandwidth one dimensional direct698 memory access between memory and AXI4-Stream target peripherals.699 AXI MCDMA engine provides high-bandwidth direct memory access700 between memory and AXI4-Stream target peripherals. It provides701 the scatter gather interface with multiple channels independent702 configuration support.703 704config XILINX_XDMA705 tristate "Xilinx DMA/Bridge Subsystem DMA Engine"706 depends on HAS_IOMEM707 select DMA_ENGINE708 select DMA_VIRTUAL_CHANNELS709 select REGMAP_MMIO710 help711 Enable support for Xilinx DMA/Bridge Subsystem DMA engine. The DMA712 provides high performance block data movement between Host memory713 and the DMA subsystem. These direct memory transfers can be both in714 the Host to Card (H2C) and Card to Host (C2H) transfers.715 The core also provides up to 16 user interrupt wires that generate716 interrupts to the host.717 718config XILINX_ZYNQMP_DMA719 tristate "Xilinx ZynqMP DMA Engine"720 depends on ARCH_ZYNQ || MICROBLAZE || ARM64 || COMPILE_TEST721 select DMA_ENGINE722 help723 Enable support for Xilinx ZynqMP DMA controller.724 725config XILINX_ZYNQMP_DPDMA726 tristate "Xilinx DPDMA Engine"727 depends on HAS_IOMEM && OF728 select DMA_ENGINE729 select DMA_VIRTUAL_CHANNELS730 help731 Enable support for Xilinx ZynqMP DisplayPort DMA. Choose this option732 if you have a Xilinx ZynqMP SoC with a DisplayPort subsystem. The733 driver provides the dmaengine required by the DisplayPort subsystem734 display driver.735 736# driver files737source "drivers/dma/amd/Kconfig"738 739source "drivers/dma/bestcomm/Kconfig"740 741source "drivers/dma/mediatek/Kconfig"742 743source "drivers/dma/ptdma/Kconfig"744 745source "drivers/dma/qcom/Kconfig"746 747source "drivers/dma/dw/Kconfig"748 749source "drivers/dma/dw-edma/Kconfig"750 751source "drivers/dma/hsu/Kconfig"752 753source "drivers/dma/sf-pdma/Kconfig"754 755source "drivers/dma/sh/Kconfig"756 757source "drivers/dma/ti/Kconfig"758 759source "drivers/dma/fsl-dpaa2-qdma/Kconfig"760 761source "drivers/dma/lgm/Kconfig"762 763source "drivers/dma/stm32/Kconfig"764 765# clients766comment "DMA Clients"767 depends on DMA_ENGINE768 769config ASYNC_TX_DMA770 bool "Async_tx: Offload support for the async_tx api"771 depends on DMA_ENGINE772 help773 This allows the async_tx api to take advantage of offload engines for774 memcpy, memset, xor, and raid6 p+q operations. If your platform has775 a dma engine that can perform raid operations and you have enabled776 MD_RAID456 say Y.777 778 If unsure, say N.779 780config DMATEST781 tristate "DMA Test client"782 depends on DMA_ENGINE783 select DMA_ENGINE_RAID784 help785 Simple DMA test client. Say N unless you're debugging a786 DMA Device driver.787 788config DMA_ENGINE_RAID789 bool790 791endif792