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1// SPDX-License-Identifier: GPL-2.0-only2/*3 * Bestcomm GenBD RX task microcode4 *5 * Copyright (C) 2006 AppSpec Computer Technologies Corp.6 * Jeff Gibbons <jeff.gibbons@appspec.com>7 * Copyright (c) 2004 Freescale Semiconductor, Inc.8 *9 * Based on BestCommAPI-2.2/code_dma/image_rtos1/dma_image.hex10 * on Tue Mar 4 10:14:12 2006 GMT11 */12 13#include <asm/types.h>14 15/*16 * The header consists of the following fields:17 * u32 magic;18 * u8 desc_size;19 * u8 var_size;20 * u8 inc_size;21 * u8 first_var;22 * u8 reserved[8];23 *24 * The size fields contain the number of 32-bit words.25 */26 27u32 bcom_gen_bd_rx_task[] = {28 /* header */29 0x4243544b,30 0x0d020409,31 0x00000000,32 0x00000000,33 34 /* Task descriptors */35 0x808220da, /* LCD: idx0 = var1, idx1 = var4; idx1 <= var3; idx0 += inc3, idx1 += inc2 */36 0x13e01010, /* DRD1A: var4 = var2; FN=0 MORE init=31 WS=0 RS=0 */37 0xb880025b, /* LCD: idx2 = *idx1, idx3 = var0; idx2 < var9; idx2 += inc3, idx3 += inc3 */38 0x10001308, /* DRD1A: var4 = idx1; FN=0 MORE init=0 WS=0 RS=0 */39 0x60140002, /* DRD2A: EU0=0 EU1=0 EU2=0 EU3=2 EXT init=0 WS=2 RS=2 */40 0x0cccfcca, /* DRD2B1: *idx3 = EU3(); EU3(*idx3,var10) */41 0xd9190240, /* LCDEXT: idx2 = idx2; idx2 > var9; idx2 += inc0 */42 0xb8c5e009, /* LCD: idx3 = *(idx1 + var00000015); ; idx3 += inc1 */43 0x07fecf80, /* DRD1A: *idx3 = *idx0; FN=0 INT init=31 WS=3 RS=3 */44 0x99190024, /* LCD: idx2 = idx2; idx2 once var0; idx2 += inc4 */45 0x60000005, /* DRD2A: EU0=0 EU1=0 EU2=0 EU3=5 EXT init=0 WS=0 RS=0 */46 0x0c4cf889, /* DRD2B1: *idx1 = EU3(); EU3(idx2,var9) */47 0x000001f8, /* NOP */48 49 /* VAR[9]-VAR[10] */50 0x40000000,51 0x7fff7fff,52 53 /* INC[0]-INC[3] */54 0x40000000,55 0xe0000000,56 0xa0000008,57 0x20000000,58};59 60