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1// SPDX-License-Identifier: GPL-2.02/*3 * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com4 */5 6#include <linux/kernel.h>7 8#include "k3-psil-priv.h"9 10#define PSIL_PDMA_XY_TR(x) \11 { \12 .thread_id = x, \13 .ep_config = { \14 .ep_type = PSIL_EP_PDMA_XY, \15 .mapped_channel_id = -1, \16 .default_flow_id = -1, \17 }, \18 }19 20#define PSIL_PDMA_XY_PKT(x) \21 { \22 .thread_id = x, \23 .ep_config = { \24 .ep_type = PSIL_EP_PDMA_XY, \25 .mapped_channel_id = -1, \26 .default_flow_id = -1, \27 .pkt_mode = 1, \28 }, \29 }30 31#define PSIL_ETHERNET(x, ch, flow_base, flow_cnt) \32 { \33 .thread_id = x, \34 .ep_config = { \35 .ep_type = PSIL_EP_NATIVE, \36 .pkt_mode = 1, \37 .needs_epib = 1, \38 .psd_size = 16, \39 .mapped_channel_id = ch, \40 .flow_start = flow_base, \41 .flow_num = flow_cnt, \42 .default_flow_id = flow_base, \43 }, \44 }45 46#define PSIL_SAUL(x, ch, flow_base, flow_cnt, default_flow, tx) \47 { \48 .thread_id = x, \49 .ep_config = { \50 .ep_type = PSIL_EP_NATIVE, \51 .pkt_mode = 1, \52 .needs_epib = 1, \53 .psd_size = 64, \54 .mapped_channel_id = ch, \55 .flow_start = flow_base, \56 .flow_num = flow_cnt, \57 .default_flow_id = default_flow, \58 .notdpkt = tx, \59 }, \60 }61 62#define PSIL_PDMA_MCASP(x) \63 { \64 .thread_id = x, \65 .ep_config = { \66 .ep_type = PSIL_EP_PDMA_XY, \67 .pdma_acc32 = 1, \68 .pdma_burst = 1, \69 }, \70 }71 72#define PSIL_CSI2RX(x) \73 { \74 .thread_id = x, \75 .ep_config = { \76 .ep_type = PSIL_EP_NATIVE, \77 }, \78 }79 80/* PSI-L source thread IDs, used for RX (DMA_DEV_TO_MEM) */81static struct psil_ep am62a_src_ep_map[] = {82 /* SAUL */83 PSIL_SAUL(0x7504, 20, 35, 8, 35, 0),84 PSIL_SAUL(0x7505, 21, 35, 8, 36, 0),85 PSIL_SAUL(0x7506, 22, 43, 8, 43, 0),86 PSIL_SAUL(0x7507, 23, 43, 8, 44, 0),87 /* PDMA_MAIN0 - SPI0-2 */88 PSIL_PDMA_XY_PKT(0x4300),89 PSIL_PDMA_XY_PKT(0x4301),90 PSIL_PDMA_XY_PKT(0x4302),91 PSIL_PDMA_XY_PKT(0x4303),92 PSIL_PDMA_XY_PKT(0x4304),93 PSIL_PDMA_XY_PKT(0x4305),94 PSIL_PDMA_XY_PKT(0x4306),95 PSIL_PDMA_XY_PKT(0x4307),96 PSIL_PDMA_XY_PKT(0x4308),97 PSIL_PDMA_XY_PKT(0x4309),98 PSIL_PDMA_XY_PKT(0x430a),99 PSIL_PDMA_XY_PKT(0x430b),100 /* PDMA_MAIN1 - UART0-6 */101 PSIL_PDMA_XY_PKT(0x4400),102 PSIL_PDMA_XY_PKT(0x4401),103 PSIL_PDMA_XY_PKT(0x4402),104 PSIL_PDMA_XY_PKT(0x4403),105 PSIL_PDMA_XY_PKT(0x4404),106 PSIL_PDMA_XY_PKT(0x4405),107 PSIL_PDMA_XY_PKT(0x4406),108 /* PDMA_MAIN2 - MCASP0-2 */109 PSIL_PDMA_MCASP(0x4500),110 PSIL_PDMA_MCASP(0x4501),111 PSIL_PDMA_MCASP(0x4502),112 /* CPSW3G */113 PSIL_ETHERNET(0x4600, 19, 19, 16),114 /* CSI2RX */115 PSIL_CSI2RX(0x5000),116 PSIL_CSI2RX(0x5001),117 PSIL_CSI2RX(0x5002),118 PSIL_CSI2RX(0x5003),119 PSIL_CSI2RX(0x5004),120 PSIL_CSI2RX(0x5005),121 PSIL_CSI2RX(0x5006),122 PSIL_CSI2RX(0x5007),123 PSIL_CSI2RX(0x5008),124 PSIL_CSI2RX(0x5009),125 PSIL_CSI2RX(0x500a),126 PSIL_CSI2RX(0x500b),127 PSIL_CSI2RX(0x500c),128 PSIL_CSI2RX(0x500d),129 PSIL_CSI2RX(0x500e),130 PSIL_CSI2RX(0x500f),131 PSIL_CSI2RX(0x5010),132 PSIL_CSI2RX(0x5011),133 PSIL_CSI2RX(0x5012),134 PSIL_CSI2RX(0x5013),135 PSIL_CSI2RX(0x5014),136 PSIL_CSI2RX(0x5015),137 PSIL_CSI2RX(0x5016),138 PSIL_CSI2RX(0x5017),139 PSIL_CSI2RX(0x5018),140 PSIL_CSI2RX(0x5019),141 PSIL_CSI2RX(0x501a),142 PSIL_CSI2RX(0x501b),143 PSIL_CSI2RX(0x501c),144 PSIL_CSI2RX(0x501d),145 PSIL_CSI2RX(0x501e),146 PSIL_CSI2RX(0x501f),147};148 149/* PSI-L destination thread IDs, used for TX (DMA_MEM_TO_DEV) */150static struct psil_ep am62a_dst_ep_map[] = {151 /* SAUL */152 PSIL_SAUL(0xf500, 27, 83, 8, 83, 1),153 PSIL_SAUL(0xf501, 28, 91, 8, 91, 1),154 /* PDMA_MAIN0 - SPI0-2 */155 PSIL_PDMA_XY_PKT(0xc300),156 PSIL_PDMA_XY_PKT(0xc301),157 PSIL_PDMA_XY_PKT(0xc302),158 PSIL_PDMA_XY_PKT(0xc303),159 PSIL_PDMA_XY_PKT(0xc304),160 PSIL_PDMA_XY_PKT(0xc305),161 PSIL_PDMA_XY_PKT(0xc306),162 PSIL_PDMA_XY_PKT(0xc307),163 PSIL_PDMA_XY_PKT(0xc308),164 PSIL_PDMA_XY_PKT(0xc309),165 PSIL_PDMA_XY_PKT(0xc30a),166 PSIL_PDMA_XY_PKT(0xc30b),167 /* PDMA_MAIN1 - UART0-6 */168 PSIL_PDMA_XY_PKT(0xc400),169 PSIL_PDMA_XY_PKT(0xc401),170 PSIL_PDMA_XY_PKT(0xc402),171 PSIL_PDMA_XY_PKT(0xc403),172 PSIL_PDMA_XY_PKT(0xc404),173 PSIL_PDMA_XY_PKT(0xc405),174 PSIL_PDMA_XY_PKT(0xc406),175 /* PDMA_MAIN2 - MCASP0-2 */176 PSIL_PDMA_MCASP(0xc500),177 PSIL_PDMA_MCASP(0xc501),178 PSIL_PDMA_MCASP(0xc502),179 /* CPSW3G */180 PSIL_ETHERNET(0xc600, 19, 19, 8),181 PSIL_ETHERNET(0xc601, 20, 27, 8),182 PSIL_ETHERNET(0xc602, 21, 35, 8),183 PSIL_ETHERNET(0xc603, 22, 43, 8),184 PSIL_ETHERNET(0xc604, 23, 51, 8),185 PSIL_ETHERNET(0xc605, 24, 59, 8),186 PSIL_ETHERNET(0xc606, 25, 67, 8),187 PSIL_ETHERNET(0xc607, 26, 75, 8),188};189 190struct psil_ep_map am62a_ep_map = {191 .name = "am62a",192 .src = am62a_src_ep_map,193 .src_count = ARRAY_SIZE(am62a_src_ep_map),194 .dst = am62a_dst_ep_map,195 .dst_count = ARRAY_SIZE(am62a_dst_ep_map),196};197