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1/*2 * Copyright 2021 Advanced Micro Devices, Inc.3 *4 * Permission is hereby granted, free of charge, to any person obtaining a5 * copy of this software and associated documentation files (the "Software"),6 * to deal in the Software without restriction, including without limitation7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,8 * and/or sell copies of the Software, and to permit persons to whom the9 * Software is furnished to do so, subject to the following conditions:10 *11 * The above copyright notice and this permission notice shall be included in12 * all copies or substantial portions of the Software.13 *14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR20 * OTHER DEALINGS IN THE SOFTWARE.21 *22 */23 24#ifndef __AMDGPU_IMU_H__25#define __AMDGPU_IMU_H__26 27enum imu_work_mode {28 DEBUG_MODE,29 MISSION_MODE30};31 32struct amdgpu_imu_funcs {33 int (*init_microcode)(struct amdgpu_device *adev);34 int (*load_microcode)(struct amdgpu_device *adev);35 void (*setup_imu)(struct amdgpu_device *adev);36 int (*start_imu)(struct amdgpu_device *adev);37 void (*program_rlc_ram)(struct amdgpu_device *adev);38 int (*wait_for_reset_status)(struct amdgpu_device *adev);39};40 41struct imu_rlc_ram_golden {42 u32 hwip;43 u32 instance;44 u32 segment;45 u32 reg;46 u32 data;47 u32 addr_mask;48};49 50#define IMU_RLC_RAM_GOLDEN_VALUE(ip, inst, reg, data, addr_mask) \51 { ip##_HWIP, inst, reg##_BASE_IDX, reg, data, addr_mask }52 53struct amdgpu_imu {54 const struct amdgpu_imu_funcs *funcs;55 enum imu_work_mode mode;56};57 58#endif59