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1/* SPDX-License-Identifier: MIT */2/*3 * Copyright (C) 2024 Advanced Micro Devices, Inc. All rights reserved.4 * All Rights Reserved.5 *6 * Permission is hereby granted, free of charge, to any person obtaining a7 * copy of this software and associated documentation files (the8 * "Software"), to deal in the Software without restriction, including9 * without limitation the rights to use, copy, modify, merge, publish,10 * distribute, sub license, and/or sell copies of the Software, and to11 * permit persons to whom the Software is furnished to do so, subject to12 * the following conditions:13 *14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,16 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL17 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,18 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR19 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE20 * USE OR OTHER DEALINGS IN THE SOFTWARE.21 *22 * The above copyright notice and this permission notice (including the23 * next paragraph) shall be included in all copies or substantial portions24 * of the Software.25 *26 */27 28#include <linux/firmware.h>29#include <linux/mfd/core.h>30 31#include "amdgpu.h"32#include "amdgpu_isp.h"33#include "isp_v4_1_0.h"34#include "isp_v4_1_1.h"35 36static int isp_sw_init(void *handle)37{38	return 0;39}40 41static int isp_sw_fini(void *handle)42{43	return 0;44}45 46/**47 * isp_hw_init - start and test isp block48 *49 * @handle: handle for amdgpu_device pointer50 *51 */52static int isp_hw_init(void *handle)53{54	struct amdgpu_device *adev = (struct amdgpu_device *)handle;55	struct amdgpu_isp *isp = &adev->isp;56 57	const struct amdgpu_ip_block *ip_block =58		amdgpu_device_ip_get_ip_block(adev, AMD_IP_BLOCK_TYPE_ISP);59 60	if (!ip_block)61		return -EINVAL;62 63	if (isp->funcs->hw_init != NULL)64		return isp->funcs->hw_init(isp);65 66	return -ENODEV;67}68 69/**70 * isp_hw_fini - stop the hardware block71 *72 * @handle: handle for amdgpu_device pointer73 *74 */75static int isp_hw_fini(void *handle)76{77	struct amdgpu_device *adev = (struct amdgpu_device *)handle;78	struct amdgpu_isp *isp = &adev->isp;79 80	if (isp->funcs->hw_fini != NULL)81		return isp->funcs->hw_fini(isp);82 83	return -ENODEV;84}85 86static int isp_suspend(void *handle)87{88	return 0;89}90 91static int isp_resume(void *handle)92{93	return 0;94}95 96static int isp_load_fw_by_psp(struct amdgpu_device *adev)97{98	const struct common_firmware_header *hdr;99	char ucode_prefix[10];100	int r = 0;101 102	/* get isp fw binary name and path */103	amdgpu_ucode_ip_version_decode(adev, ISP_HWIP, ucode_prefix,104				       sizeof(ucode_prefix));105 106	/* read isp fw */107	r = amdgpu_ucode_request(adev, &adev->isp.fw, "amdgpu/%s.bin", ucode_prefix);108	if (r) {109		amdgpu_ucode_release(&adev->isp.fw);110		return r;111	}112 113	hdr = (const struct common_firmware_header *)adev->isp.fw->data;114 115	adev->firmware.ucode[AMDGPU_UCODE_ID_ISP].ucode_id =116		AMDGPU_UCODE_ID_ISP;117	adev->firmware.ucode[AMDGPU_UCODE_ID_ISP].fw = adev->isp.fw;118 119	adev->firmware.fw_size +=120		ALIGN(le32_to_cpu(hdr->ucode_size_bytes), PAGE_SIZE);121 122	return r;123}124 125static int isp_early_init(void *handle)126{127	struct amdgpu_device *adev = (struct amdgpu_device *)handle;128	struct amdgpu_isp *isp = &adev->isp;129 130	switch (amdgpu_ip_version(adev, ISP_HWIP, 0)) {131	case IP_VERSION(4, 1, 0):132		isp_v4_1_0_set_isp_funcs(isp);133		break;134	case IP_VERSION(4, 1, 1):135		isp_v4_1_1_set_isp_funcs(isp);136		break;137	default:138		return -EINVAL;139	}140 141	isp->adev = adev;142	isp->parent = adev->dev;143 144	if (isp_load_fw_by_psp(adev)) {145		DRM_DEBUG_DRIVER("%s: isp fw load failed\n", __func__);146		return -ENOENT;147	}148 149	return 0;150}151 152static bool isp_is_idle(void *handle)153{154	return true;155}156 157static int isp_wait_for_idle(void *handle)158{159	return 0;160}161 162static int isp_soft_reset(void *handle)163{164	return 0;165}166 167static int isp_set_clockgating_state(void *handle,168				     enum amd_clockgating_state state)169{170	return 0;171}172 173static int isp_set_powergating_state(void *handle,174				     enum amd_powergating_state state)175{176	return 0;177}178 179static const struct amd_ip_funcs isp_ip_funcs = {180	.name = "isp_ip",181	.early_init = isp_early_init,182	.late_init = NULL,183	.sw_init = isp_sw_init,184	.sw_fini = isp_sw_fini,185	.hw_init = isp_hw_init,186	.hw_fini = isp_hw_fini,187	.suspend = isp_suspend,188	.resume = isp_resume,189	.is_idle = isp_is_idle,190	.wait_for_idle = isp_wait_for_idle,191	.soft_reset = isp_soft_reset,192	.set_clockgating_state = isp_set_clockgating_state,193	.set_powergating_state = isp_set_powergating_state,194};195 196const struct amdgpu_ip_block_version isp_v4_1_0_ip_block = {197	.type = AMD_IP_BLOCK_TYPE_ISP,198	.major = 4,199	.minor = 1,200	.rev = 0,201	.funcs = &isp_ip_funcs,202};203 204const struct amdgpu_ip_block_version isp_v4_1_1_ip_block = {205	.type = AMD_IP_BLOCK_TYPE_ISP,206	.major = 4,207	.minor = 1,208	.rev = 1,209	.funcs = &isp_ip_funcs,210};211