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1/*2 * Copyright 2021 Advanced Micro Devices, Inc.3 *4 * Permission is hereby granted, free of charge, to any person obtaining a5 * copy of this software and associated documentation files (the "Software"),6 * to deal in the Software without restriction, including without limitation7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,8 * and/or sell copies of the Software, and to permit persons to whom the9 * Software is furnished to do so, subject to the following conditions:10 *11 * The above copyright notice and this permission notice shall be included in12 * all copies or substantial portions of the Software.13 *14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR20 * OTHER DEALINGS IN THE SOFTWARE.21 *22 */23 24#include "amdgpu.h"25#include "athub_v3_0.h"26#include "athub/athub_3_0_0_offset.h"27#include "athub/athub_3_0_0_sh_mask.h"28#include "navi10_enum.h"29#include "soc15_common.h"30 31#define regATHUB_MISC_CNTL_V3_0_1 0x00d732#define regATHUB_MISC_CNTL_V3_0_1_BASE_IDX 033#define regATHUB_MISC_CNTL_V3_3_0 0x00d834#define regATHUB_MISC_CNTL_V3_3_0_BASE_IDX 035 36 37static uint32_t athub_v3_0_get_cg_cntl(struct amdgpu_device *adev)38{39 uint32_t data;40 41 switch (amdgpu_ip_version(adev, ATHUB_HWIP, 0)) {42 case IP_VERSION(3, 0, 1):43 data = RREG32_SOC15(ATHUB, 0, regATHUB_MISC_CNTL_V3_0_1);44 break;45 case IP_VERSION(3, 3, 0):46 data = RREG32_SOC15(ATHUB, 0, regATHUB_MISC_CNTL_V3_3_0);47 break;48 default:49 data = RREG32_SOC15(ATHUB, 0, regATHUB_MISC_CNTL);50 break;51 }52 return data;53}54 55static void athub_v3_0_set_cg_cntl(struct amdgpu_device *adev, uint32_t data)56{57 switch (amdgpu_ip_version(adev, ATHUB_HWIP, 0)) {58 case IP_VERSION(3, 0, 1):59 WREG32_SOC15(ATHUB, 0, regATHUB_MISC_CNTL_V3_0_1, data);60 break;61 case IP_VERSION(3, 3, 0):62 WREG32_SOC15(ATHUB, 0, regATHUB_MISC_CNTL_V3_3_0, data);63 break;64 default:65 WREG32_SOC15(ATHUB, 0, regATHUB_MISC_CNTL, data);66 break;67 }68}69 70static void71athub_v3_0_update_medium_grain_clock_gating(struct amdgpu_device *adev,72 bool enable)73{74 uint32_t def, data;75 76 def = data = athub_v3_0_get_cg_cntl(adev);77 78 if (enable && (adev->cg_flags & AMD_CG_SUPPORT_ATHUB_MGCG))79 data |= ATHUB_MISC_CNTL__CG_ENABLE_MASK;80 else81 data &= ~ATHUB_MISC_CNTL__CG_ENABLE_MASK;82 83 if (def != data)84 athub_v3_0_set_cg_cntl(adev, data);85}86 87static void88athub_v3_0_update_medium_grain_light_sleep(struct amdgpu_device *adev,89 bool enable)90{91 uint32_t def, data;92 93 def = data = athub_v3_0_get_cg_cntl(adev);94 95 if (enable && (adev->cg_flags & AMD_CG_SUPPORT_ATHUB_LS))96 data |= ATHUB_MISC_CNTL__CG_MEM_LS_ENABLE_MASK;97 else98 data &= ~ATHUB_MISC_CNTL__CG_MEM_LS_ENABLE_MASK;99 100 if (def != data)101 athub_v3_0_set_cg_cntl(adev, data);102}103 104int athub_v3_0_set_clockgating(struct amdgpu_device *adev,105 enum amd_clockgating_state state)106{107 if (amdgpu_sriov_vf(adev))108 return 0;109 110 switch (amdgpu_ip_version(adev, ATHUB_HWIP, 0)) {111 case IP_VERSION(3, 0, 0):112 case IP_VERSION(3, 0, 1):113 case IP_VERSION(3, 0, 2):114 case IP_VERSION(3, 3, 0):115 athub_v3_0_update_medium_grain_clock_gating(adev,116 state == AMD_CG_STATE_GATE);117 athub_v3_0_update_medium_grain_light_sleep(adev,118 state == AMD_CG_STATE_GATE);119 break;120 default:121 break;122 }123 124 return 0;125}126 127void athub_v3_0_get_clockgating(struct amdgpu_device *adev, u64 *flags)128{129 int data;130 131 /* AMD_CG_SUPPORT_ATHUB_MGCG */132 data = athub_v3_0_get_cg_cntl(adev);133 if (data & ATHUB_MISC_CNTL__CG_ENABLE_MASK)134 *flags |= AMD_CG_SUPPORT_ATHUB_MGCG;135 136 /* AMD_CG_SUPPORT_ATHUB_LS */137 if (data & ATHUB_MISC_CNTL__CG_MEM_LS_ENABLE_MASK)138 *flags |= AMD_CG_SUPPORT_ATHUB_LS;139}140