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1/*2 * Copyright 2022 Advanced Micro Devices, Inc.3 *4 * Permission is hereby granted, free of charge, to any person obtaining a5 * copy of this software and associated documentation files (the "Software"),6 * to deal in the Software without restriction, including without limitation7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,8 * and/or sell copies of the Software, and to permit persons to whom the9 * Software is furnished to do so, subject to the following conditions:10 *11 * The above copyright notice and this permission notice shall be included in12 * all copies or substantial portions of the Software.13 *14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR20 * OTHER DEALINGS IN THE SOFTWARE.21 *22 */23 24#ifndef __VCN_SW_RING_H__25#define __VCN_SW_RING_H__26 27#define VCN_SW_RING_EMIT_FRAME_SIZE \28 (4 + /* vcn_dec_sw_ring_emit_vm_flush */ \29 5 + 5 + /* vcn_dec_sw_ring_emit_fence x2 vm fence */ \30 1) /* vcn_dec_sw_ring_insert_end */31 32void vcn_dec_sw_ring_emit_fence(struct amdgpu_ring *ring, u64 addr,33 u64 seq, uint32_t flags);34void vcn_dec_sw_ring_insert_end(struct amdgpu_ring *ring);35void vcn_dec_sw_ring_emit_ib(struct amdgpu_ring *ring, struct amdgpu_job *job,36 struct amdgpu_ib *ib, uint32_t flags);37void vcn_dec_sw_ring_emit_reg_wait(struct amdgpu_ring *ring, uint32_t reg,38 uint32_t val, uint32_t mask);39void vcn_dec_sw_ring_emit_vm_flush(struct amdgpu_ring *ring,40 uint32_t vmid, uint64_t pd_addr);41void vcn_dec_sw_ring_emit_wreg(struct amdgpu_ring *ring, uint32_t reg,42 uint32_t val);43 44#endif /* __VCN_SW_RING_H__ */45