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1/* SPDX-License-Identifier: MIT */2/*3 * Copyright 2022 Advanced Micro Devices, Inc.4 *5 * Permission is hereby granted, free of charge, to any person obtaining a6 * copy of this software and associated documentation files (the "Software"),7 * to deal in the Software without restriction, including without limitation8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,9 * and/or sell copies of the Software, and to permit persons to whom the10 * Software is furnished to do so, subject to the following conditions:11 *12 * The above copyright notice and this permission notice shall be included in13 * all copies or substantial portions of the Software.14 *15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR21 * OTHER DEALINGS IN THE SOFTWARE.22 *23 * Authors: AMD24 *25 */26#ifndef DALSMC_H27#define DALSMC_H28 29#define DALSMC_VERSION 0x130 31// SMU Response Codes:32#define DALSMC_Result_OK 0x133#define DALSMC_Result_Failed 0xFF34#define DALSMC_Result_UnknownCmd 0xFE35#define DALSMC_Result_CmdRejectedPrereq 0xFD36#define DALSMC_Result_CmdRejectedBusy 0xFC37 38// Message Definitions:39#define DALSMC_MSG_TestMessage 0x140#define DALSMC_MSG_GetSmuVersion 0x241#define DALSMC_MSG_GetDriverIfVersion 0x342#define DALSMC_MSG_GetMsgHeaderVersion 0x443#define DALSMC_MSG_SetDalDramAddrHigh 0x544#define DALSMC_MSG_SetDalDramAddrLow 0x645#define DALSMC_MSG_TransferTableSmu2Dram 0x746#define DALSMC_MSG_TransferTableDram2Smu 0x847#define DALSMC_MSG_SetHardMinByFreq 0x948#define DALSMC_MSG_SetHardMaxByFreq 0xA49#define DALSMC_MSG_GetDpmFreqByIndex 0xB50#define DALSMC_MSG_GetDcModeMaxDpmFreq 0xC51#define DALSMC_MSG_SetMinDeepSleepDcfclk 0xD52#define DALSMC_MSG_NumOfDisplays 0xE53#define DALSMC_MSG_SetExternalClientDfCstateAllow 0xF54#define DALSMC_MSG_BacoAudioD3PME 0x1055#define DALSMC_MSG_SetFclkSwitchAllow 0x1156#define DALSMC_MSG_SetCabForUclkPstate 0x1257#define DALSMC_MSG_SetWorstCaseUclkLatency 0x1358#define DALSMC_MSG_SetAlwaysWaitDmcubResp 0x1459#define DALSMC_MSG_ReturnHardMinStatus 0x1560#define DALSMC_Message_Count 0x1661 62#define CHECK_HARD_MIN_CLK_DISPCLK 0x163#define CHECK_HARD_MIN_CLK_DPPCLK 0x264#define CHECK_HARD_MIN_CLK_DPREFCLK 0x465#define CHECK_HARD_MIN_CLK_DCFCLK 0x866#define CHECK_HARD_MIN_CLK_DTBCLK 0x1067#define CHECK_HARD_MIN_CLK_UCLK 0x2068 69typedef enum {70 FCLK_SWITCH_DISALLOW,71 FCLK_SWITCH_ALLOW,72} FclkSwitchAllow_e;73 74#endif75