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1// SPDX-License-Identifier: MIT2//3// Copyright 2024 Advanced Micro Devices, Inc.4 5#ifndef DALSMC_H6#define DALSMC_H7 8#define DALSMC_VERSION 0x19 10// SMU Response Codes:11#define DALSMC_Result_OK 0x112#define DALSMC_Result_Failed 0xFF13#define DALSMC_Result_UnknownCmd 0xFE14#define DALSMC_Result_CmdRejectedPrereq 0xFD15#define DALSMC_Result_CmdRejectedBusy 0xFC16 17 18 19// Message Definitions:20#define DALSMC_MSG_TestMessage 0x121#define DALSMC_MSG_GetSmuVersion 0x222#define DALSMC_MSG_GetDriverIfVersion 0x323#define DALSMC_MSG_GetMsgHeaderVersion 0x424#define DALSMC_MSG_SetDalDramAddrHigh 0x525#define DALSMC_MSG_SetDalDramAddrLow 0x626#define DALSMC_MSG_TransferTableSmu2Dram 0x727#define DALSMC_MSG_TransferTableDram2Smu 0x828#define DALSMC_MSG_SetHardMinByFreq 0x929#define DALSMC_MSG_SetHardMaxByFreq 0xA30#define DALSMC_MSG_GetDpmFreqByIndex 0xB31#define DALSMC_MSG_GetDcModeMaxDpmFreq 0xC32#define DALSMC_MSG_SetMinDeepSleepDcfclk 0xD33#define DALSMC_MSG_NumOfDisplays 0xE34#define DALSMC_MSG_SetExternalClientDfCstateAllow 0xF35#define DALSMC_MSG_BacoAudioD3PME 0x1036#define DALSMC_MSG_SetFclkSwitchAllow 0x1137#define DALSMC_MSG_SetCabForUclkPstate 0x1238#define DALSMC_MSG_SetWorstCaseUclkLatency 0x1339#define DALSMC_MSG_DcnExitReset 0x1440#define DALSMC_MSG_ReturnHardMinStatus 0x1541#define DALSMC_MSG_SetAlwaysWaitDmcubResp 0x1642#define DALSMC_MSG_IndicateDrrStatus 0x17 // PMFW 1581143#define DALSMC_MSG_ActiveUclkFclk 0x1844#define DALSMC_MSG_IdleUclkFclk 0x1945#define DALSMC_MSG_SetUclkPstateAllow 0x1A46#define DALSMC_Message_Count 0x1B47 48typedef enum {49 FCLK_SWITCH_DISALLOW,50 FCLK_SWITCH_ALLOW,51} FclkSwitchAllow_e;52 53#endif54