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1/*2 * Copyright 2018 Advanced Micro Devices, Inc.3 *4 * Permission is hereby granted, free of charge, to any person obtaining a5 * copy of this software and associated documentation files (the "Software"),6 * to deal in the Software without restriction, including without limitation7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,8 * and/or sell copies of the Software, and to permit persons to whom the9 * Software is furnished to do so, subject to the following conditions:10 *11 * The above copyright notice and this permission notice shall be included in12 * all copies or substantial portions of the Software.13 *14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR20 * OTHER DEALINGS IN THE SOFTWARE.21 *22 * Authors: AMD23 *24 */25 26#ifndef _DMUB_DC_SRV_H_27#define _DMUB_DC_SRV_H_28 29#include "dm_services_types.h"30#include "dmub/dmub_srv.h"31 32struct dmub_srv;33struct dc;34struct pipe_ctx;35struct dc_crtc_timing_adjust;36struct dc_crtc_timing;37struct dc_state;38struct dc_surface_update;39 40struct dc_reg_helper_state {41 bool gather_in_progress;42 uint32_t same_addr_count;43 bool should_burst_write;44 union dmub_rb_cmd cmd_data;45 unsigned int reg_seq_count;46};47 48struct dc_dmub_srv {49 struct dmub_srv *dmub;50 struct dc_reg_helper_state reg_helper_offload;51 52 struct dc_context *ctx;53 void *dm;54 55 int32_t idle_exit_counter;56 union dmub_shared_state_ips_driver_signals driver_signals;57 bool idle_allowed;58 bool needs_idle_wake;59};60 61void dc_dmub_srv_wait_idle(struct dc_dmub_srv *dc_dmub_srv);62 63bool dc_dmub_srv_optimized_init_done(struct dc_dmub_srv *dc_dmub_srv);64 65bool dc_dmub_srv_cmd_list_queue_execute(struct dc_dmub_srv *dc_dmub_srv,66 unsigned int count,67 union dmub_rb_cmd *cmd_list);68 69bool dc_dmub_srv_wait_for_idle(struct dc_dmub_srv *dc_dmub_srv,70 enum dm_dmub_wait_type wait_type,71 union dmub_rb_cmd *cmd_list);72 73bool dc_dmub_srv_cmd_run(struct dc_dmub_srv *dc_dmub_srv, union dmub_rb_cmd *cmd, enum dm_dmub_wait_type wait_type);74 75bool dc_dmub_srv_cmd_run_list(struct dc_dmub_srv *dc_dmub_srv, unsigned int count, union dmub_rb_cmd *cmd_list, enum dm_dmub_wait_type wait_type);76 77bool dc_dmub_srv_notify_stream_mask(struct dc_dmub_srv *dc_dmub_srv,78 unsigned int stream_mask);79 80bool dc_dmub_srv_is_restore_required(struct dc_dmub_srv *dc_dmub_srv);81 82bool dc_dmub_srv_get_dmub_outbox0_msg(const struct dc *dc, struct dmcub_trace_buf_entry *entry);83 84void dc_dmub_trace_event_control(struct dc *dc, bool enable);85 86void dc_dmub_srv_drr_update_cmd(struct dc *dc, uint32_t tg_inst, uint32_t vtotal_min, uint32_t vtotal_max);87 88void dc_dmub_srv_set_drr_manual_trigger_cmd(struct dc *dc, uint32_t tg_inst);89bool dc_dmub_srv_p_state_delegate(struct dc *dc, bool enable_pstate, struct dc_state *context);90 91void dc_dmub_srv_query_caps_cmd(struct dc_dmub_srv *dc_dmub_srv);92void dc_dmub_srv_get_visual_confirm_color_cmd(struct dc *dc, struct pipe_ctx *pipe_ctx);93void dc_dmub_srv_clear_inbox0_ack(struct dc_dmub_srv *dmub_srv);94void dc_dmub_srv_wait_for_inbox0_ack(struct dc_dmub_srv *dmub_srv);95void dc_dmub_srv_send_inbox0_cmd(struct dc_dmub_srv *dmub_srv, union dmub_inbox0_data_register data);96 97bool dc_dmub_srv_get_diagnostic_data(struct dc_dmub_srv *dc_dmub_srv, struct dmub_diagnostic_data *dmub_oca);98 99void dc_dmub_setup_subvp_dmub_command(struct dc *dc, struct dc_state *context, bool enable);100void dc_dmub_srv_log_diagnostic_data(struct dc_dmub_srv *dc_dmub_srv);101 102void dc_send_update_cursor_info_to_dmu(struct pipe_ctx *pCtx, uint8_t pipe_idx);103bool dc_dmub_check_min_version(struct dmub_srv *srv);104 105void dc_dmub_srv_enable_dpia_trace(const struct dc *dc);106void dc_dmub_srv_subvp_save_surf_addr(const struct dc_dmub_srv *dc_dmub_srv, const struct dc_plane_address *addr, uint8_t subvp_index);107 108bool dc_dmub_srv_is_hw_pwr_up(struct dc_dmub_srv *dc_dmub_srv, bool wait);109 110void dc_dmub_srv_apply_idle_power_optimizations(const struct dc *dc, bool allow_idle);111 112/**113 * dc_dmub_srv_set_power_state() - Sets the power state for DMUB service.114 *115 * Controls whether messaging the DMCUB or interfacing with it via HW register116 * interaction is permittable.117 *118 * @dc_dmub_srv - The DC DMUB service pointer119 * @power_state - the DC power state120 */121void dc_dmub_srv_set_power_state(struct dc_dmub_srv *dc_dmub_srv, enum dc_acpi_cm_power_state power_state);122 123/**124 * dc_dmub_srv_notify_fw_dc_power_state() - Notifies firmware of the DC power state.125 *126 * Differs from dc_dmub_srv_set_power_state in that it needs to access HW in order127 * to message DMCUB of the state transition. Should come after the D0 exit and128 * before D3 set power state.129 *130 * @dc_dmub_srv - The DC DMUB service pointer131 * @power_state - the DC power state132 */133void dc_dmub_srv_notify_fw_dc_power_state(struct dc_dmub_srv *dc_dmub_srv,134 enum dc_acpi_cm_power_state power_state);135 136/**137 * @dc_dmub_srv_should_detect() - Checks if link detection is required.138 *139 * While in idle power states we may need driver to manually redetect in140 * the case of a missing hotplug. Should be called from a polling timer.141 *142 * Return: true if redetection is required.143 */144bool dc_dmub_srv_should_detect(struct dc_dmub_srv *dc_dmub_srv);145 146/**147 * dc_wake_and_execute_dmub_cmd() - Wrapper for DMUB command execution.148 *149 * Refer to dc_wake_and_execute_dmub_cmd_list() for usage and limitations,150 * This function is a convenience wrapper for a single command execution.151 *152 * @ctx: DC context153 * @cmd: The command to send/receive154 * @wait_type: The wait behavior for the execution155 *156 * Return: true on command submission success, false otherwise157 */158bool dc_wake_and_execute_dmub_cmd(const struct dc_context *ctx, union dmub_rb_cmd *cmd,159 enum dm_dmub_wait_type wait_type);160 161/**162 * dc_wake_and_execute_dmub_cmd_list() - Wrapper for DMUB command list execution.163 *164 * If the DMCUB hardware was asleep then it wakes the DMUB before165 * executing the command and attempts to re-enter if the command166 * submission was successful.167 *168 * This should be the preferred command submission interface provided169 * the DC lock is acquired.170 *171 * Entry/exit out of idle power optimizations would need to be172 * manually performed otherwise through dc_allow_idle_optimizations().173 *174 * @ctx: DC context175 * @count: Number of commands to send/receive176 * @cmd: Array of commands to send177 * @wait_type: The wait behavior for the execution178 *179 * Return: true on command submission success, false otherwise180 */181bool dc_wake_and_execute_dmub_cmd_list(const struct dc_context *ctx, unsigned int count,182 union dmub_rb_cmd *cmd, enum dm_dmub_wait_type wait_type);183 184/**185 * dc_wake_and_execute_gpint()186 *187 * @ctx: DC context188 * @command_code: The command ID to send to DMCUB189 * @param: The parameter to message DMCUB190 * @response: Optional response out value - may be NULL.191 * @wait_type: The wait behavior for the execution192 */193bool dc_wake_and_execute_gpint(const struct dc_context *ctx, enum dmub_gpint_command command_code,194 uint16_t param, uint32_t *response, enum dm_dmub_wait_type wait_type);195 196void dc_dmub_srv_fams2_update_config(struct dc *dc,197 struct dc_state *context,198 bool enable);199void dc_dmub_srv_fams2_drr_update(struct dc *dc,200 uint32_t tg_inst,201 uint32_t vtotal_min,202 uint32_t vtotal_max,203 uint32_t vtotal_mid,204 uint32_t vtotal_mid_frame_num,205 bool program_manual_trigger);206void dc_dmub_srv_fams2_passthrough_flip(207 struct dc *dc,208 struct dc_state *state,209 struct dc_stream_state *stream,210 struct dc_surface_update *srf_updates,211 int surface_count);212#endif /* _DMUB_DC_SRV_H_ */213