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brintos / linux-shallow public Read only

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1/*2 * Copyright 2020 Advanced Micro Devices, Inc.3 *4 * Permission is hereby granted, free of charge, to any person obtaining a5 * copy of this software and associated documentation files (the "Software"),6 * to deal in the Software without restriction, including without limitation7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,8 * and/or sell copies of the Software, and to permit persons to whom the9 * Software is furnished to do so, subject to the following conditions:10 *11 * The above copyright notice and this permission notice shall be included in12 * all copies or substantial portions of the Software.13 *14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR20 * OTHER DEALINGS IN THE SOFTWARE.21 *22 * Authors: AMD23 *24 */25 26#ifndef __DAL_DCN31_AGP_H__27#define __DAL_DCN31_AGP_H__28 29 30#define DCN31_APG_FROM_APG(apg)\31	container_of(apg, struct dcn31_apg, base)32 33#define APG_DCN31_REG_LIST(id) \34	SRI(APG_CONTROL, APG, id), \35	SRI(APG_CONTROL2, APG, id),\36	SRI(APG_MEM_PWR, APG, id),\37	SRI(APG_DBG_GEN_CONTROL, APG, id)38 39struct dcn31_apg_registers {40	uint32_t APG_CONTROL;41	uint32_t APG_CONTROL2;42	uint32_t APG_MEM_PWR;43	uint32_t APG_DBG_GEN_CONTROL;44};45 46 47#define DCN31_APG_MASK_SH_LIST(mask_sh)\48	SE_SF(APG0_APG_CONTROL, APG_RESET, mask_sh),\49	SE_SF(APG0_APG_CONTROL, APG_RESET_DONE, mask_sh),\50	SE_SF(APG0_APG_CONTROL2, APG_ENABLE, mask_sh),\51	SE_SF(APG0_APG_CONTROL2, APG_DP_AUDIO_STREAM_ID, mask_sh),\52	SE_SF(APG0_APG_DBG_GEN_CONTROL, APG_DBG_AUDIO_CHANNEL_ENABLE, mask_sh),\53	SE_SF(APG0_APG_MEM_PWR, APG_MEM_PWR_FORCE, mask_sh)54 55#define APG_DCN31_REG_FIELD_LIST(type) \56		type APG_RESET;\57		type APG_RESET_DONE;\58		type APG_ENABLE;\59		type APG_DP_AUDIO_STREAM_ID;\60		type APG_DBG_AUDIO_CHANNEL_ENABLE;\61		type APG_MEM_PWR_FORCE62 63struct dcn31_apg_shift {64	APG_DCN31_REG_FIELD_LIST(uint8_t);65};66 67struct dcn31_apg_mask {68	APG_DCN31_REG_FIELD_LIST(uint32_t);69};70 71struct apg {72	const struct apg_funcs *funcs;73	struct dc_context *ctx;74	int inst;75};76 77struct apg_funcs {78 79	void (*setup_hdmi_audio)(80		struct apg *apg);81 82	void (*se_audio_setup)(83		struct apg *apg,84		unsigned int az_inst,85		struct audio_info *audio_info);86 87	void (*enable_apg)(88		struct apg *apg);89 90	void (*disable_apg)(91		struct apg *apg);92};93 94 95 96struct dcn31_apg {97	struct apg base;98	const struct dcn31_apg_registers *regs;99	const struct dcn31_apg_shift *apg_shift;100	const struct dcn31_apg_mask *apg_mask;101};102 103void apg31_construct(struct dcn31_apg *apg3,104	struct dc_context *ctx,105	uint32_t inst,106	const struct dcn31_apg_registers *apg_regs,107	const struct dcn31_apg_shift *apg_shift,108	const struct dcn31_apg_mask *apg_mask);109 110 111#endif112