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1/*2 * Copyright 2021 Advanced Micro Devices, Inc.3 *4 * Permission is hereby granted, free of charge, to any person obtaining a5 * copy of this software and associated documentation files (the "Software"),6 * to deal in the Software without restriction, including without limitation7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,8 * and/or sell copies of the Software, and to permit persons to whom the9 * Software is furnished to do so, subject to the following conditions:10 *11 * The above copyright notice and this permission notice shall be included in12 * all copies or substantial portions of the Software.13 *14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR20 * OTHER DEALINGS IN THE SOFTWARE.21 *22 * Authors: AMD23 *24 */25 26#include "reg_helper.h"27#include "core_types.h"28#include "dc_dmub_srv.h"29#include "dcn31_panel_cntl.h"30#include "atom.h"31 32#define TO_DCN31_PANEL_CNTL(panel_cntl)\33 container_of(panel_cntl, struct dcn31_panel_cntl, base)34 35#define CTX \36 dcn31_panel_cntl->base.ctx37 38#define DC_LOGGER \39 dcn31_panel_cntl->base.ctx->logger40 41static bool dcn31_query_backlight_info(struct panel_cntl *panel_cntl, union dmub_rb_cmd *cmd)42{43 struct dcn31_panel_cntl *dcn31_panel_cntl = TO_DCN31_PANEL_CNTL(panel_cntl);44 struct dc_dmub_srv *dc_dmub_srv = panel_cntl->ctx->dmub_srv;45 46 if (!dc_dmub_srv)47 return false;48 49 memset(cmd, 0, sizeof(*cmd));50 cmd->panel_cntl.header.type = DMUB_CMD__PANEL_CNTL;51 cmd->panel_cntl.header.sub_type = DMUB_CMD__PANEL_CNTL_QUERY_BACKLIGHT_INFO;52 cmd->panel_cntl.header.payload_bytes = sizeof(cmd->panel_cntl.data);53 cmd->panel_cntl.data.pwrseq_inst = dcn31_panel_cntl->base.pwrseq_inst;54 55 return dc_wake_and_execute_dmub_cmd(dc_dmub_srv->ctx, cmd, DM_DMUB_WAIT_TYPE_WAIT_WITH_REPLY);56}57 58static uint32_t dcn31_get_16_bit_backlight_from_pwm(struct panel_cntl *panel_cntl)59{60 union dmub_rb_cmd cmd;61 62 if (!dcn31_query_backlight_info(panel_cntl, &cmd))63 return 0;64 65 return cmd.panel_cntl.data.current_backlight;66}67 68static uint32_t dcn31_panel_cntl_hw_init(struct panel_cntl *panel_cntl)69{70 struct dcn31_panel_cntl *dcn31_panel_cntl = TO_DCN31_PANEL_CNTL(panel_cntl);71 struct dc_dmub_srv *dc_dmub_srv = panel_cntl->ctx->dmub_srv;72 union dmub_rb_cmd cmd;73 uint32_t freq_to_set = panel_cntl->ctx->dc->debug.pwm_freq;74 75 if (!dc_dmub_srv)76 return 0;77 78 memset(&cmd, 0, sizeof(cmd));79 cmd.panel_cntl.header.type = DMUB_CMD__PANEL_CNTL;80 cmd.panel_cntl.header.sub_type = DMUB_CMD__PANEL_CNTL_HW_INIT;81 cmd.panel_cntl.header.payload_bytes = sizeof(cmd.panel_cntl.data);82 cmd.panel_cntl.data.pwrseq_inst = dcn31_panel_cntl->base.pwrseq_inst;83 cmd.panel_cntl.data.bl_pwm_cntl = panel_cntl->stored_backlight_registers.BL_PWM_CNTL;84 cmd.panel_cntl.data.bl_pwm_period_cntl = panel_cntl->stored_backlight_registers.BL_PWM_PERIOD_CNTL;85 cmd.panel_cntl.data.bl_pwm_ref_div1 =86 panel_cntl->stored_backlight_registers.LVTMA_PWRSEQ_REF_DIV_BL_PWM_REF_DIV;87 cmd.panel_cntl.data.bl_pwm_ref_div2 =88 panel_cntl->stored_backlight_registers.PANEL_PWRSEQ_REF_DIV2;89 if (!dc_wake_and_execute_dmub_cmd(dc_dmub_srv->ctx, &cmd, DM_DMUB_WAIT_TYPE_WAIT_WITH_REPLY))90 return 0;91 92 panel_cntl->stored_backlight_registers.BL_PWM_CNTL = cmd.panel_cntl.data.bl_pwm_cntl;93 panel_cntl->stored_backlight_registers.BL_PWM_CNTL2 = 0; /* unused */94 panel_cntl->stored_backlight_registers.BL_PWM_PERIOD_CNTL = cmd.panel_cntl.data.bl_pwm_period_cntl;95 panel_cntl->stored_backlight_registers.LVTMA_PWRSEQ_REF_DIV_BL_PWM_REF_DIV =96 cmd.panel_cntl.data.bl_pwm_ref_div1;97 panel_cntl->stored_backlight_registers.PANEL_PWRSEQ_REF_DIV2 =98 cmd.panel_cntl.data.bl_pwm_ref_div2;99 100 if (freq_to_set >= MIN_DEBUG_FREQ_HZ && freq_to_set <= MAX_DEBUG_FREQ_HZ) {101 uint32_t xtal = panel_cntl->ctx->dc->res_pool->ref_clocks.dccg_ref_clock_inKhz;102 103 memset(&cmd, 0, sizeof(cmd));104 cmd.panel_cntl.header.type = DMUB_CMD__PANEL_CNTL;105 cmd.panel_cntl.header.sub_type = DMUB_CMD__PANEL_DEBUG_PWM_FREQ;106 cmd.panel_cntl.header.payload_bytes = sizeof(cmd.panel_cntl.data);107 cmd.panel_cntl.data.pwrseq_inst = dcn31_panel_cntl->base.pwrseq_inst;108 cmd.panel_cntl.data.bl_pwm_cntl = xtal;109 cmd.panel_cntl.data.bl_pwm_period_cntl = freq_to_set;110 if (!dc_wake_and_execute_dmub_cmd(dc_dmub_srv->ctx, &cmd, DM_DMUB_WAIT_TYPE_WAIT_WITH_REPLY))111 return 0;112 }113 return cmd.panel_cntl.data.current_backlight;114}115 116static void dcn31_panel_cntl_destroy(struct panel_cntl **panel_cntl)117{118 struct dcn31_panel_cntl *dcn31_panel_cntl = TO_DCN31_PANEL_CNTL(*panel_cntl);119 120 kfree(dcn31_panel_cntl);121 *panel_cntl = NULL;122}123 124static bool dcn31_is_panel_backlight_on(struct panel_cntl *panel_cntl)125{126 union dmub_rb_cmd cmd;127 128 if (!dcn31_query_backlight_info(panel_cntl, &cmd))129 return false;130 131 return cmd.panel_cntl.data.is_backlight_on;132}133 134static bool dcn31_is_panel_powered_on(struct panel_cntl *panel_cntl)135{136 union dmub_rb_cmd cmd;137 138 if (!dcn31_query_backlight_info(panel_cntl, &cmd))139 return false;140 141 return cmd.panel_cntl.data.is_powered_on;142}143 144static void dcn31_store_backlight_level(struct panel_cntl *panel_cntl)145{146 union dmub_rb_cmd cmd;147 148 if (!dcn31_query_backlight_info(panel_cntl, &cmd))149 return;150 151 panel_cntl->stored_backlight_registers.BL_PWM_CNTL = cmd.panel_cntl.data.bl_pwm_cntl;152 panel_cntl->stored_backlight_registers.BL_PWM_CNTL2 = 0; /* unused */153 panel_cntl->stored_backlight_registers.BL_PWM_PERIOD_CNTL = cmd.panel_cntl.data.bl_pwm_period_cntl;154 panel_cntl->stored_backlight_registers.LVTMA_PWRSEQ_REF_DIV_BL_PWM_REF_DIV =155 cmd.panel_cntl.data.bl_pwm_ref_div1;156}157 158static const struct panel_cntl_funcs dcn31_link_panel_cntl_funcs = {159 .destroy = dcn31_panel_cntl_destroy,160 .hw_init = dcn31_panel_cntl_hw_init,161 .is_panel_backlight_on = dcn31_is_panel_backlight_on,162 .is_panel_powered_on = dcn31_is_panel_powered_on,163 .store_backlight_level = dcn31_store_backlight_level,164 .get_current_backlight = dcn31_get_16_bit_backlight_from_pwm,165};166 167void dcn31_panel_cntl_construct(168 struct dcn31_panel_cntl *dcn31_panel_cntl,169 const struct panel_cntl_init_data *init_data)170{171 uint8_t pwrseq_inst = 0xF;172 173 dcn31_panel_cntl->base.funcs = &dcn31_link_panel_cntl_funcs;174 dcn31_panel_cntl->base.ctx = init_data->ctx;175 dcn31_panel_cntl->base.inst = init_data->inst;176 177 switch (init_data->eng_id) {178 case ENGINE_ID_DIGA:179 pwrseq_inst = 0;180 break;181 case ENGINE_ID_DIGB:182 pwrseq_inst = 1;183 break;184 default:185 DC_LOG_WARNING("Unsupported pwrseq engine id: %d!\n", init_data->eng_id);186 ASSERT(false);187 break;188 }189 190 if (dcn31_panel_cntl->base.ctx->dc->config.support_edp0_on_dp1)191 //If supported, power sequencer mapping shall follow the DIG instance192 dcn31_panel_cntl->base.pwrseq_inst = pwrseq_inst;193 else194 /* If not supported, pwrseq will be assigned in order,195 * so first pwrseq will be assigned to first panel instance (legacy behavior)196 */197 dcn31_panel_cntl->base.pwrseq_inst = dcn31_panel_cntl->base.inst;198}199