60 lines · c
1/*2 * Copyright 2019-2021 Advanced Micro Devices, Inc.3 *4 * Permission is hereby granted, free of charge, to any person obtaining a5 * copy of this software and associated documentation files (the "Software"),6 * to deal in the Software without restriction, including without limitation7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,8 * and/or sell copies of the Software, and to permit persons to whom the9 * Software is furnished to do so, subject to the following conditions:10 *11 * The above copyright notice and this permission notice shall be included in12 * all copies or substantial portions of the Software.13 *14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR20 * OTHER DEALINGS IN THE SOFTWARE.21 *22 * Authors: AMD23 *24 */25 26#ifndef __DCN31_FPU_H__27#define __DCN31_FPU_H__28 29#define DCN3_1_DEFAULT_DET_SIZE 38430#define DCN3_15_DEFAULT_DET_SIZE 19231#define DCN3_15_MIN_COMPBUF_SIZE_KB 12832#define DCN3_16_DEFAULT_DET_SIZE 19233#define DCN3_16_MIN_COMPBUF_SIZE_KB 12834 35void dcn31_zero_pipe_dcc_fraction(display_e2e_pipe_params_st *pipes,36 int pipe_cnt);37 38void dcn31_update_soc_for_wm_a(struct dc *dc, struct dc_state *context);39void dcn315_update_soc_for_wm_a(struct dc *dc, struct dc_state *context);40 41void dcn31_calculate_wm_and_dlg_fp(42 struct dc *dc, struct dc_state *context,43 display_e2e_pipe_params_st *pipes,44 int pipe_cnt,45 int vlevel);46 47void dcn31_update_bw_bounding_box(struct dc *dc, struct clk_bw_params *bw_params);48void dcn315_update_bw_bounding_box(struct dc *dc, struct clk_bw_params *bw_params);49void dcn316_update_bw_bounding_box(struct dc *dc, struct clk_bw_params *bw_params);50int dcn_get_max_non_odm_pix_rate_100hz(struct _vcs_dpi_soc_bounding_box_st *soc);51int dcn_get_approx_det_segs_required_for_pstate(52 struct _vcs_dpi_soc_bounding_box_st *soc,53 int pix_clk_100hz, int bpp, int seg_size_kb);54 55int dcn31x_populate_dml_pipes_from_context(struct dc *dc,56 struct dc_state *context,57 display_e2e_pipe_params_st *pipes,58 bool fast_validate);59#endif /* __DCN31_FPU_H__*/60