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1/*2 * Copyright 2012-17 Advanced Micro Devices, Inc.3 *4 * Permission is hereby granted, free of charge, to any person obtaining a5 * copy of this software and associated documentation files (the "Software"),6 * to deal in the Software without restriction, including without limitation7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,8 * and/or sell copies of the Software, and to permit persons to whom the9 * Software is furnished to do so, subject to the following conditions:10 *11 * The above copyright notice and this permission notice shall be included in12 * all copies or substantial portions of the Software.13 *14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR20 * OTHER DEALINGS IN THE SOFTWARE.21 *22 * Authors: AMD23 *24 */25#include <drm/display/drm_dsc_helper.h>26#include "dscc_types.h"27#include "rc_calc.h"28 29static void copy_pps_fields(struct drm_dsc_config *to, const struct drm_dsc_config *from)30{31 to->line_buf_depth = from->line_buf_depth;32 to->bits_per_component = from->bits_per_component;33 to->convert_rgb = from->convert_rgb;34 to->slice_width = from->slice_width;35 to->slice_height = from->slice_height;36 to->simple_422 = from->simple_422;37 to->native_422 = from->native_422;38 to->native_420 = from->native_420;39 to->pic_width = from->pic_width;40 to->pic_height = from->pic_height;41 to->rc_tgt_offset_high = from->rc_tgt_offset_high;42 to->rc_tgt_offset_low = from->rc_tgt_offset_low;43 to->bits_per_pixel = from->bits_per_pixel;44 to->rc_edge_factor = from->rc_edge_factor;45 to->rc_quant_incr_limit1 = from->rc_quant_incr_limit1;46 to->rc_quant_incr_limit0 = from->rc_quant_incr_limit0;47 to->initial_xmit_delay = from->initial_xmit_delay;48 to->initial_dec_delay = from->initial_dec_delay;49 to->block_pred_enable = from->block_pred_enable;50 to->first_line_bpg_offset = from->first_line_bpg_offset;51 to->second_line_bpg_offset = from->second_line_bpg_offset;52 to->initial_offset = from->initial_offset;53 memcpy(&to->rc_buf_thresh, &from->rc_buf_thresh, sizeof(from->rc_buf_thresh));54 memcpy(&to->rc_range_params, &from->rc_range_params, sizeof(from->rc_range_params));55 to->rc_model_size = from->rc_model_size;56 to->flatness_min_qp = from->flatness_min_qp;57 to->flatness_max_qp = from->flatness_max_qp;58 to->initial_scale_value = from->initial_scale_value;59 to->scale_decrement_interval = from->scale_decrement_interval;60 to->scale_increment_interval = from->scale_increment_interval;61 to->nfl_bpg_offset = from->nfl_bpg_offset;62 to->nsl_bpg_offset = from->nsl_bpg_offset;63 to->slice_bpg_offset = from->slice_bpg_offset;64 to->final_offset = from->final_offset;65 to->vbr_enable = from->vbr_enable;66 to->slice_chunk_size = from->slice_chunk_size;67 to->second_line_offset_adj = from->second_line_offset_adj;68 to->dsc_version_minor = from->dsc_version_minor;69}70 71static void copy_rc_to_cfg(struct drm_dsc_config *dsc_cfg, const struct rc_params *rc)72{73 int i;74 75 dsc_cfg->rc_quant_incr_limit0 = rc->rc_quant_incr_limit0;76 dsc_cfg->rc_quant_incr_limit1 = rc->rc_quant_incr_limit1;77 dsc_cfg->initial_offset = rc->initial_fullness_offset;78 dsc_cfg->initial_xmit_delay = rc->initial_xmit_delay;79 dsc_cfg->first_line_bpg_offset = rc->first_line_bpg_offset;80 dsc_cfg->second_line_bpg_offset = rc->second_line_bpg_offset;81 dsc_cfg->flatness_min_qp = rc->flatness_min_qp;82 dsc_cfg->flatness_max_qp = rc->flatness_max_qp;83 for (i = 0; i < QP_SET_SIZE; ++i) {84 dsc_cfg->rc_range_params[i].range_min_qp = rc->qp_min[i];85 dsc_cfg->rc_range_params[i].range_max_qp = rc->qp_max[i];86 /* Truncate 8-bit signed value to 6-bit signed value */87 dsc_cfg->rc_range_params[i].range_bpg_offset = 0x3f & rc->ofs[i];88 }89 dsc_cfg->rc_model_size = rc->rc_model_size;90 dsc_cfg->rc_edge_factor = rc->rc_edge_factor;91 dsc_cfg->rc_tgt_offset_high = rc->rc_tgt_offset_hi;92 dsc_cfg->rc_tgt_offset_low = rc->rc_tgt_offset_lo;93 94 for (i = 0; i < QP_SET_SIZE - 1; ++i)95 dsc_cfg->rc_buf_thresh[i] = rc->rc_buf_thresh[i];96}97 98int dscc_compute_dsc_parameters(const struct drm_dsc_config *pps,99 const struct rc_params *rc,100 struct dsc_parameters *dsc_params)101{102 int ret;103 struct drm_dsc_config dsc_cfg;104 105 dsc_params->pps = *pps;106 dsc_params->pps.initial_scale_value = 8 * rc->rc_model_size / (rc->rc_model_size - rc->initial_fullness_offset);107 108 copy_pps_fields(&dsc_cfg, &dsc_params->pps);109 copy_rc_to_cfg(&dsc_cfg, rc);110 111 dsc_cfg.mux_word_size = dsc_params->pps.bits_per_component <= 10 ? 48 : 64;112 113 ret = drm_dsc_compute_rc_parameters(&dsc_cfg);114 dsc_params->bytes_per_pixel =115 (uint32_t)(div_u64(((uint64_t)dsc_cfg.slice_chunk_size * 0x10000000 + (dsc_cfg.slice_width - 1)),116 (uint32_t)dsc_cfg.slice_width)); /* Round-up */117 118 copy_pps_fields(&dsc_params->pps, &dsc_cfg);119 dsc_params->rc_buffer_model_size = dsc_cfg.rc_bits;120 return ret;121}122 123