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1/*2 * Copyright 2016 Advanced Micro Devices, Inc.3 *4 * Permission is hereby granted, free of charge, to any person obtaining a5 * copy of this software and associated documentation files (the "Software"),6 * to deal in the Software without restriction, including without limitation7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,8 * and/or sell copies of the Software, and to permit persons to whom the9 * Software is furnished to do so, subject to the following conditions:10 *11 * The above copyright notice and this permission notice shall be included in12 * all copies or substantial portions of the Software.13 *14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR20 * OTHER DEALINGS IN THE SOFTWARE.21 *22 * Authors: AMD23 *24 */25 26#ifndef __DC_HUBBUB_DCN20_H__27#define __DC_HUBBUB_DCN20_H__28 29#include "dcn10/dcn10_hubbub.h"30#include "dcn20/dcn20_vmid.h"31 32#define TO_DCN20_HUBBUB(hubbub)\33 container_of(hubbub, struct dcn20_hubbub, base)34 35#define HUBBUB_REG_LIST_DCN20_COMMON()\36 HUBBUB_REG_LIST_DCN_COMMON(), \37 SR(DCHUBBUB_CRC_CTRL), \38 SR(DCN_VM_FB_LOCATION_BASE),\39 SR(DCN_VM_FB_LOCATION_TOP),\40 SR(DCN_VM_FB_OFFSET),\41 SR(DCN_VM_AGP_BOT),\42 SR(DCN_VM_AGP_TOP),\43 SR(DCN_VM_AGP_BASE),\44 SR(DCN_VM_FAULT_ADDR_MSB), \45 SR(DCN_VM_FAULT_ADDR_LSB), \46 SR(DCN_VM_FAULT_CNTL), \47 SR(DCN_VM_FAULT_STATUS)48 49#define HUBBUB_REG_LIST_DCN20(id)\50 HUBBUB_REG_LIST_DCN20_COMMON(), \51 HUBBUB_SR_WATERMARK_REG_LIST(), \52 HUBBUB_VM_REG_LIST(),\53 SR(DCN_VM_PROTECTION_FAULT_DEFAULT_ADDR_MSB),\54 SR(DCN_VM_PROTECTION_FAULT_DEFAULT_ADDR_LSB)55 56 57#define HUBBUB_MASK_SH_LIST_DCN20(mask_sh)\58 HUBBUB_MASK_SH_LIST_DCN_COMMON(mask_sh), \59 HUBBUB_MASK_SH_LIST_STUTTER(mask_sh), \60 HUBBUB_SF(DCHUBBUB_GLOBAL_TIMER_CNTL, DCHUBBUB_GLOBAL_TIMER_REFDIV, mask_sh), \61 HUBBUB_SF(DCN_VM_FB_LOCATION_BASE, FB_BASE, mask_sh), \62 HUBBUB_SF(DCN_VM_FB_LOCATION_TOP, FB_TOP, mask_sh), \63 HUBBUB_SF(DCN_VM_FB_OFFSET, FB_OFFSET, mask_sh), \64 HUBBUB_SF(DCN_VM_AGP_BOT, AGP_BOT, mask_sh), \65 HUBBUB_SF(DCN_VM_AGP_TOP, AGP_TOP, mask_sh), \66 HUBBUB_SF(DCN_VM_AGP_BASE, AGP_BASE, mask_sh), \67 HUBBUB_SF(DCN_VM_PROTECTION_FAULT_DEFAULT_ADDR_MSB, DCN_VM_PROTECTION_FAULT_DEFAULT_ADDR_MSB, mask_sh), \68 HUBBUB_SF(DCN_VM_PROTECTION_FAULT_DEFAULT_ADDR_LSB, DCN_VM_PROTECTION_FAULT_DEFAULT_ADDR_LSB, mask_sh), \69 HUBBUB_SF(DCN_VM_FAULT_ADDR_MSB, DCN_VM_FAULT_ADDR_MSB, mask_sh), \70 HUBBUB_SF(DCN_VM_FAULT_ADDR_LSB, DCN_VM_FAULT_ADDR_LSB, mask_sh), \71 HUBBUB_SF(DCN_VM_FAULT_CNTL, DCN_VM_ERROR_STATUS_CLEAR, mask_sh), \72 HUBBUB_SF(DCN_VM_FAULT_CNTL, DCN_VM_ERROR_STATUS_MODE, mask_sh), \73 HUBBUB_SF(DCN_VM_FAULT_CNTL, DCN_VM_ERROR_INTERRUPT_ENABLE, mask_sh), \74 HUBBUB_SF(DCN_VM_FAULT_CNTL, DCN_VM_RANGE_FAULT_DISABLE, mask_sh), \75 HUBBUB_SF(DCN_VM_FAULT_CNTL, DCN_VM_PRQ_FAULT_DISABLE, mask_sh), \76 HUBBUB_SF(DCN_VM_FAULT_STATUS, DCN_VM_ERROR_STATUS, mask_sh), \77 HUBBUB_SF(DCN_VM_FAULT_STATUS, DCN_VM_ERROR_VMID, mask_sh), \78 HUBBUB_SF(DCN_VM_FAULT_STATUS, DCN_VM_ERROR_TABLE_LEVEL, mask_sh), \79 HUBBUB_SF(DCN_VM_FAULT_STATUS, DCN_VM_ERROR_PIPE, mask_sh), \80 HUBBUB_SF(DCN_VM_FAULT_STATUS, DCN_VM_ERROR_INTERRUPT_STATUS, mask_sh)81 82struct dcn20_hubbub {83 struct hubbub base;84 const struct dcn_hubbub_registers *regs;85 const struct dcn_hubbub_shift *shifts;86 const struct dcn_hubbub_mask *masks;87 unsigned int debug_test_index_pstate;88 union dcn_watermark_set watermarks;89 int num_vmid;90 struct dcn20_vmid vmid[16];91 unsigned int detile_buf_size;92 unsigned int crb_size_segs;93 unsigned int compbuf_size_segments;94 unsigned int pixel_chunk_size;95 unsigned int det0_size;96 unsigned int det1_size;97 unsigned int det2_size;98 unsigned int det3_size;99};100 101void hubbub2_construct(struct dcn20_hubbub *hubbub,102 struct dc_context *ctx,103 const struct dcn_hubbub_registers *hubbub_regs,104 const struct dcn_hubbub_shift *hubbub_shift,105 const struct dcn_hubbub_mask *hubbub_mask);106 107bool hubbub2_dcc_support_swizzle(108 enum swizzle_mode_values swizzle,109 unsigned int bytes_per_element,110 enum segment_order *segment_order_horz,111 enum segment_order *segment_order_vert);112 113bool hubbub2_dcc_support_pixel_format(114 enum surface_pixel_format format,115 unsigned int *bytes_per_element);116 117bool hubbub2_get_dcc_compression_cap(struct hubbub *hubbub,118 const struct dc_dcc_surface_param *input,119 struct dc_surface_dcc_cap *output);120 121bool hubbub2_initialize_vmids(struct hubbub *hubbub,122 const struct dc_dcc_surface_param *input,123 struct dc_surface_dcc_cap *output);124 125int hubbub2_init_dchub_sys_ctx(struct hubbub *hubbub,126 struct dcn_hubbub_phys_addr_config *pa_config);127void hubbub2_init_vm_ctx(struct hubbub *hubbub,128 struct dcn_hubbub_virt_addr_config *va_config,129 int vmid);130void hubbub2_update_dchub(struct hubbub *hubbub,131 struct dchub_init_data *dh_data);132 133void hubbub2_get_dchub_ref_freq(struct hubbub *hubbub,134 unsigned int dccg_ref_freq_inKhz,135 unsigned int *dchub_ref_freq_inKhz);136 137void hubbub2_wm_read_state(struct hubbub *hubbub,138 struct dcn_hubbub_wm *wm);139 140void hubbub2_read_state(struct hubbub *hubbub,141 struct dcn_hubbub_state *hubbub_state);142 143#endif144