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1/*2 * Copyright 2012-20 Advanced Micro Devices, Inc.3 *4 * Permission is hereby granted, free of charge, to any person obtaining a5 * copy of this software and associated documentation files (the "Software"),6 * to deal in the Software without restriction, including without limitation7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,8 * and/or sell copies of the Software, and to permit persons to whom the9 * Software is furnished to do so, subject to the following conditions:10 *11 * The above copyright notice and this permission notice shall be included in12 * all copies or substantial portions of the Software.13 *14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR20 * OTHER DEALINGS IN THE SOFTWARE.21 *22 * Authors: AMD23 *24 */25 26#include "dm_services.h"27#include "dce_calcs.h"28#include "reg_helper.h"29#include "basics/conversion.h"30#include "dcn32_hubp.h"31 32#define REG(reg)\33 hubp2->hubp_regs->reg34 35#define CTX \36 hubp2->base.ctx37 38#undef FN39#define FN(reg_name, field_name) \40 hubp2->hubp_shift->field_name, hubp2->hubp_mask->field_name41 42void hubp32_update_force_pstate_disallow(struct hubp *hubp, bool pstate_disallow)43{44 struct dcn20_hubp *hubp2 = TO_DCN20_HUBP(hubp);45 REG_UPDATE_2(UCLK_PSTATE_FORCE,46 DATA_UCLK_PSTATE_FORCE_EN, pstate_disallow,47 DATA_UCLK_PSTATE_FORCE_VALUE, 0);48}49 50void hubp32_update_force_cursor_pstate_disallow(struct hubp *hubp, bool pstate_disallow)51{52 struct dcn20_hubp *hubp2 = TO_DCN20_HUBP(hubp);53 54 REG_UPDATE_2(UCLK_PSTATE_FORCE,55 CURSOR_UCLK_PSTATE_FORCE_EN, pstate_disallow,56 CURSOR_UCLK_PSTATE_FORCE_VALUE, 0);57}58 59void hubp32_update_mall_sel(struct hubp *hubp, uint32_t mall_sel, bool c_cursor)60{61 struct dcn20_hubp *hubp2 = TO_DCN20_HUBP(hubp);62 63 // Also cache cursor in MALL if using MALL for SS64 REG_UPDATE_2(DCHUBP_MALL_CONFIG, USE_MALL_SEL, mall_sel,65 USE_MALL_FOR_CURSOR, c_cursor);66}67 68void hubp32_prepare_subvp_buffering(struct hubp *hubp, bool enable)69{70 struct dcn20_hubp *hubp2 = TO_DCN20_HUBP(hubp);71 REG_UPDATE(DCHUBP_VMPG_CONFIG, FORCE_ONE_ROW_FOR_FRAME, enable);72 73 /* Programming guide suggests CURSOR_REQ_MODE = 1 for SubVP:74 * For Pstate change using the MALL with sub-viewport buffering,75 * the cursor does not use the MALL (USE_MALL_FOR_CURSOR is ignored)76 * and sub-viewport positioning by Display FW has to avoid the cursor77 * requests to DRAM (set CURSOR_REQ_MODE = 1 to minimize this exclusion).78 *79 * CURSOR_REQ_MODE = 1 begins fetching cursor data at the beginning of display prefetch.80 * Setting this should allow the sub-viewport position to always avoid the cursor because81 * we do not allow the sub-viewport region to overlap with display prefetch (i.e. during blank).82 */83 REG_UPDATE(CURSOR_CONTROL, CURSOR_REQ_MODE, enable);84}85 86void hubp32_phantom_hubp_post_enable(struct hubp *hubp)87{88 uint32_t reg_val;89 struct dcn20_hubp *hubp2 = TO_DCN20_HUBP(hubp);90 91 /* For phantom pipe enable, disable GSL */92 REG_UPDATE(DCSURF_FLIP_CONTROL2, SURFACE_GSL_ENABLE, 0);93 REG_UPDATE(DCHUBP_CNTL, HUBP_BLANK_EN, 1);94 reg_val = REG_READ(DCHUBP_CNTL);95 if (reg_val) {96 /* init sequence workaround: in case HUBP is97 * power gated, this wait would timeout.98 *99 * we just wrote reg_val to non-0, if it stay 0100 * it means HUBP is gated101 */102 REG_WAIT(DCHUBP_CNTL,103 HUBP_NO_OUTSTANDING_REQ, 1,104 1, 200);105 }106}107 108void hubp32_cursor_set_attributes(109 struct hubp *hubp,110 const struct dc_cursor_attributes *attr)111{112 struct dcn20_hubp *hubp2 = TO_DCN20_HUBP(hubp);113 enum cursor_pitch hw_pitch = hubp1_get_cursor_pitch(attr->pitch);114 enum cursor_lines_per_chunk lpc = hubp2_get_lines_per_chunk(115 attr->width, attr->color_format);116 117 //Round cursor width up to next multiple of 64118 uint32_t cursor_width = ((attr->width + 63) / 64) * 64;119 uint32_t cursor_height = attr->height;120 uint32_t cursor_size = cursor_width * cursor_height;121 122 hubp->curs_attr = *attr;123 124 REG_UPDATE(CURSOR_SURFACE_ADDRESS_HIGH,125 CURSOR_SURFACE_ADDRESS_HIGH, attr->address.high_part);126 REG_UPDATE(CURSOR_SURFACE_ADDRESS,127 CURSOR_SURFACE_ADDRESS, attr->address.low_part);128 129 REG_UPDATE_2(CURSOR_SIZE,130 CURSOR_WIDTH, attr->width,131 CURSOR_HEIGHT, attr->height);132 133 REG_UPDATE_4(CURSOR_CONTROL,134 CURSOR_MODE, attr->color_format,135 CURSOR_2X_MAGNIFY, attr->attribute_flags.bits.ENABLE_MAGNIFICATION,136 CURSOR_PITCH, hw_pitch,137 CURSOR_LINES_PER_CHUNK, lpc);138 139 REG_SET_2(CURSOR_SETTINGS, 0,140 /* no shift of the cursor HDL schedule */141 CURSOR0_DST_Y_OFFSET, 0,142 /* used to shift the cursor chunk request deadline */143 CURSOR0_CHUNK_HDL_ADJUST, 3);144 145 switch (attr->color_format) {146 case CURSOR_MODE_MONO:147 cursor_size /= 2;148 break;149 case CURSOR_MODE_COLOR_1BIT_AND:150 case CURSOR_MODE_COLOR_PRE_MULTIPLIED_ALPHA:151 case CURSOR_MODE_COLOR_UN_PRE_MULTIPLIED_ALPHA:152 cursor_size *= 4;153 break;154 155 case CURSOR_MODE_COLOR_64BIT_FP_PRE_MULTIPLIED:156 case CURSOR_MODE_COLOR_64BIT_FP_UN_PRE_MULTIPLIED:157 default:158 cursor_size *= 8;159 break;160 }161 162 if (cursor_size > 16384)163 REG_UPDATE(DCHUBP_MALL_CONFIG, USE_MALL_FOR_CURSOR, true);164 else165 REG_UPDATE(DCHUBP_MALL_CONFIG, USE_MALL_FOR_CURSOR, false);166}167void hubp32_init(struct hubp *hubp)168{169 struct dcn20_hubp *hubp2 = TO_DCN20_HUBP(hubp);170 REG_WRITE(HUBPREQ_DEBUG_DB, 1 << 8);171}172static struct hubp_funcs dcn32_hubp_funcs = {173 .hubp_enable_tripleBuffer = hubp2_enable_triplebuffer,174 .hubp_is_triplebuffer_enabled = hubp2_is_triplebuffer_enabled,175 .hubp_program_surface_flip_and_addr = hubp3_program_surface_flip_and_addr,176 .hubp_program_surface_config = hubp3_program_surface_config,177 .hubp_is_flip_pending = hubp2_is_flip_pending,178 .hubp_setup = hubp3_setup,179 .hubp_setup_interdependent = hubp2_setup_interdependent,180 .hubp_set_vm_system_aperture_settings = hubp3_set_vm_system_aperture_settings,181 .set_blank = hubp2_set_blank,182 .set_blank_regs = hubp2_set_blank_regs,183 .dcc_control = hubp3_dcc_control,184 .mem_program_viewport = min_set_viewport,185 .set_cursor_attributes = hubp32_cursor_set_attributes,186 .set_cursor_position = hubp2_cursor_set_position,187 .hubp_clk_cntl = hubp2_clk_cntl,188 .hubp_vtg_sel = hubp2_vtg_sel,189 .dmdata_set_attributes = hubp3_dmdata_set_attributes,190 .dmdata_load = hubp2_dmdata_load,191 .dmdata_status_done = hubp2_dmdata_status_done,192 .hubp_read_state = hubp3_read_state,193 .hubp_clear_underflow = hubp2_clear_underflow,194 .hubp_set_flip_control_surface_gsl = hubp2_set_flip_control_surface_gsl,195 .hubp_init = hubp3_init,196 .set_unbounded_requesting = hubp31_set_unbounded_requesting,197 .hubp_soft_reset = hubp31_soft_reset,198 .hubp_set_flip_int = hubp1_set_flip_int,199 .hubp_in_blank = hubp1_in_blank,200 .hubp_update_force_pstate_disallow = hubp32_update_force_pstate_disallow,201 .hubp_update_force_cursor_pstate_disallow = hubp32_update_force_cursor_pstate_disallow,202 .phantom_hubp_post_enable = hubp32_phantom_hubp_post_enable,203 .hubp_update_mall_sel = hubp32_update_mall_sel,204 .hubp_prepare_subvp_buffering = hubp32_prepare_subvp_buffering205};206 207bool hubp32_construct(208 struct dcn20_hubp *hubp2,209 struct dc_context *ctx,210 uint32_t inst,211 const struct dcn_hubp2_registers *hubp_regs,212 const struct dcn_hubp2_shift *hubp_shift,213 const struct dcn_hubp2_mask *hubp_mask)214{215 hubp2->base.funcs = &dcn32_hubp_funcs;216 hubp2->base.ctx = ctx;217 hubp2->hubp_regs = hubp_regs;218 hubp2->hubp_shift = hubp_shift;219 hubp2->hubp_mask = hubp_mask;220 hubp2->base.inst = inst;221 hubp2->base.opp_id = OPP_ID_INVALID;222 hubp2->base.mpcc_id = 0xf;223 224 return true;225}226