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1/* SPDX-License-Identifier: MIT */2/*3 * Copyright 2023 Advanced Micro Devices, Inc.4 *5 * Permission is hereby granted, free of charge, to any person obtaining a6 * copy of this software and associated documentation files (the "Software"),7 * to deal in the Software without restriction, including without limitation8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,9 * and/or sell copies of the Software, and to permit persons to whom the10 * Software is furnished to do so, subject to the following conditions:11 *12 * The above copyright notice and this permission notice shall be included in13 * all copies or substantial portions of the Software.14 *15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR21 * OTHER DEALINGS IN THE SOFTWARE.22 *23 * Authors: AMD24 *25 */26 27#include "dce110/dce110_hwseq.h"28#include "dcn10/dcn10_hwseq.h"29#include "dcn20/dcn20_hwseq.h"30#include "dcn21/dcn21_hwseq.h"31#include "dcn30/dcn30_hwseq.h"32#include "dcn301/dcn301_hwseq.h"33#include "dcn31/dcn31_hwseq.h"34#include "dcn314/dcn314_hwseq.h"35#include "dcn32/dcn32_hwseq.h"36#include "dcn35/dcn35_hwseq.h"37 38#include "dcn35_init.h"39 40static const struct hw_sequencer_funcs dcn35_funcs = {41 .program_gamut_remap = dcn30_program_gamut_remap,42 .init_hw = dcn35_init_hw,43 .power_down_on_boot = dcn35_power_down_on_boot,44 .apply_ctx_to_hw = dce110_apply_ctx_to_hw,45 .apply_ctx_for_surface = NULL,46 .program_front_end_for_ctx = dcn20_program_front_end_for_ctx,47 .wait_for_pending_cleared = dcn10_wait_for_pending_cleared,48 .post_unlock_program_front_end = dcn20_post_unlock_program_front_end,49 .update_plane_addr = dcn20_update_plane_addr,50 .update_dchub = dcn10_update_dchub,51 .update_pending_status = dcn10_update_pending_status,52 .program_output_csc = dcn20_program_output_csc,53 .enable_accelerated_mode = dce110_enable_accelerated_mode,54 .enable_timing_synchronization = dcn10_enable_timing_synchronization,55 .enable_per_frame_crtc_position_reset = dcn10_enable_per_frame_crtc_position_reset,56 .update_info_frame = dcn31_update_info_frame,57 .send_immediate_sdp_message = dcn10_send_immediate_sdp_message,58 .enable_stream = dcn20_enable_stream,59 .disable_stream = dce110_disable_stream,60 .unblank_stream = dcn32_unblank_stream,61 .blank_stream = dce110_blank_stream,62 .enable_audio_stream = dce110_enable_audio_stream,63 .disable_audio_stream = dce110_disable_audio_stream,64 .disable_plane = dcn35_disable_plane,65 .disable_pixel_data = dcn20_disable_pixel_data,66 .pipe_control_lock = dcn20_pipe_control_lock,67 .interdependent_update_lock = dcn10_lock_all_pipes,68 .cursor_lock = dcn10_cursor_lock,69 .prepare_bandwidth = dcn35_prepare_bandwidth,70 .optimize_bandwidth = dcn35_optimize_bandwidth,71 .update_bandwidth = dcn20_update_bandwidth,72 .set_drr = dcn35_set_drr,73 .get_position = dcn10_get_position,74 .set_static_screen_control = dcn35_set_static_screen_control,75 .setup_stereo = dcn10_setup_stereo,76 .set_avmute = dcn30_set_avmute,77 .log_hw_state = dcn10_log_hw_state,78 .get_hw_state = dcn10_get_hw_state,79 .clear_status_bits = dcn10_clear_status_bits,80 .wait_for_mpcc_disconnect = dcn10_wait_for_mpcc_disconnect,81 .edp_backlight_control = dce110_edp_backlight_control,82 .edp_power_control = dce110_edp_power_control,83 .edp_wait_for_T12 = dce110_edp_wait_for_T12,84 .edp_wait_for_hpd_ready = dce110_edp_wait_for_hpd_ready,85 .set_cursor_position = dcn10_set_cursor_position,86 .set_cursor_attribute = dcn10_set_cursor_attribute,87 .set_cursor_sdr_white_level = dcn10_set_cursor_sdr_white_level,88 .setup_periodic_interrupt = dcn10_setup_periodic_interrupt,89 .set_clock = dcn10_set_clock,90 .get_clock = dcn10_get_clock,91 .program_triplebuffer = dcn20_program_triple_buffer,92 .enable_writeback = dcn30_enable_writeback,93 .disable_writeback = dcn30_disable_writeback,94 .update_writeback = dcn30_update_writeback,95 .mmhubbub_warmup = dcn30_mmhubbub_warmup,96 .dmdata_status_done = dcn20_dmdata_status_done,97 .program_dmdata_engine = dcn30_program_dmdata_engine,98 .set_dmdata_attributes = dcn20_set_dmdata_attributes,99 .init_sys_ctx = dcn31_init_sys_ctx,100 .init_vm_ctx = dcn20_init_vm_ctx,101 .set_flip_control_gsl = dcn20_set_flip_control_gsl,102 .get_vupdate_offset_from_vsync = dcn10_get_vupdate_offset_from_vsync,103 .calc_vupdate_position = dcn10_calc_vupdate_position,104 .set_backlight_level = dcn21_set_backlight_level,105 .set_abm_immediate_disable = dcn21_set_abm_immediate_disable,106 .set_pipe = dcn21_set_pipe,107 .enable_lvds_link_output = dce110_enable_lvds_link_output,108 .enable_tmds_link_output = dce110_enable_tmds_link_output,109 .enable_dp_link_output = dce110_enable_dp_link_output,110 .disable_link_output = dcn32_disable_link_output,111 .z10_restore = dcn35_z10_restore,112 .z10_save_init = dcn31_z10_save_init,113 .set_disp_pattern_generator = dcn30_set_disp_pattern_generator,114 .optimize_pwr_state = dcn21_optimize_pwr_state,115 .exit_optimized_pwr_state = dcn21_exit_optimized_pwr_state,116 .update_visual_confirm_color = dcn10_update_visual_confirm_color,117 .apply_idle_power_optimizations = dcn35_apply_idle_power_optimizations,118 .update_dsc_pg = dcn32_update_dsc_pg,119 .calc_blocks_to_gate = dcn35_calc_blocks_to_gate,120 .calc_blocks_to_ungate = dcn35_calc_blocks_to_ungate,121 .hw_block_power_up = dcn35_hw_block_power_up,122 .hw_block_power_down = dcn35_hw_block_power_down,123 .root_clock_control = dcn35_root_clock_control,124 .set_long_vtotal = dcn35_set_long_vblank,125 .calculate_pix_rate_divider = dcn32_calculate_pix_rate_divider,126 .program_outstanding_updates = dcn32_program_outstanding_updates,127};128 129static const struct hwseq_private_funcs dcn35_private_funcs = {130 .init_pipes = dcn35_init_pipes,131 .plane_atomic_disconnect = dcn10_plane_atomic_disconnect,132 .update_mpcc = dcn20_update_mpcc,133 .set_input_transfer_func = dcn32_set_input_transfer_func,134 .set_output_transfer_func = dcn32_set_output_transfer_func,135 .power_down = dce110_power_down,136 .enable_display_power_gating = dcn10_dummy_display_power_gating,137 .blank_pixel_data = dcn20_blank_pixel_data,138 .reset_hw_ctx_wrap = dcn31_reset_hw_ctx_wrap,139 .enable_stream_timing = dcn20_enable_stream_timing,140 .edp_backlight_control = dce110_edp_backlight_control,141 .setup_vupdate_interrupt = dcn20_setup_vupdate_interrupt,142 .did_underflow_occur = dcn10_did_underflow_occur,143 .init_blank = dcn20_init_blank,144 .disable_vga = NULL,145 .bios_golden_init = dcn10_bios_golden_init,146 .plane_atomic_disable = dcn35_plane_atomic_disable,147 //.plane_atomic_disable = dcn20_plane_atomic_disable,/*todo*/148 //.hubp_pg_control = dcn35_hubp_pg_control,149 .enable_power_gating_plane = dcn35_enable_power_gating_plane,150 .dpp_root_clock_control = dcn35_dpp_root_clock_control,151 .dpstream_root_clock_control = dcn35_dpstream_root_clock_control,152 .physymclk_root_clock_control = dcn35_physymclk_root_clock_control,153 .program_all_writeback_pipes_in_tree = dcn30_program_all_writeback_pipes_in_tree,154 .update_odm = dcn35_update_odm,155 .set_hdr_multiplier = dcn10_set_hdr_multiplier,156 .verify_allow_pstate_change_high = dcn10_verify_allow_pstate_change_high,157 .wait_for_blank_complete = dcn20_wait_for_blank_complete,158 .dccg_init = dcn20_dccg_init,159 .set_mcm_luts = dcn32_set_mcm_luts,160 .setup_hpo_hw_control = dcn35_setup_hpo_hw_control,161 .calculate_dccg_k1_k2_values = dcn32_calculate_dccg_k1_k2_values,162 .resync_fifo_dccg_dio = dcn314_resync_fifo_dccg_dio,163 .is_dp_dig_pixel_rate_div_policy = dcn35_is_dp_dig_pixel_rate_div_policy,164 .dsc_pg_control = dcn35_dsc_pg_control,165 .dsc_pg_status = dcn32_dsc_pg_status,166 .enable_plane = dcn35_enable_plane,167};168 169void dcn35_hw_sequencer_construct(struct dc *dc)170{171 dc->hwss = dcn35_funcs;172 dc->hwseq->funcs = dcn35_private_funcs;173 174}175