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1/* Copyright 2012-15 Advanced Micro Devices, Inc.2 *3 * Permission is hereby granted, free of charge, to any person obtaining a4 * copy of this software and associated documentation files (the "Software"),5 * to deal in the Software without restriction, including without limitation6 * the rights to use, copy, modify, merge, publish, distribute, sublicense,7 * and/or sell copies of the Software, and to permit persons to whom the8 * Software is furnished to do so, subject to the following conditions:9 *10 * The above copyright notice and this permission notice shall be included in11 * all copies or substantial portions of the Software.12 *13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR14 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,15 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL16 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR17 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,18 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR19 * OTHER DEALINGS IN THE SOFTWARE.20 *21 * Authors: AMD22 *23 */24 25#ifndef __DC_DMCU_H__26#define __DC_DMCU_H__27 28#include "dm_services_types.h"29 30/* If HW itself ever powered down it will be 0.31 * fwDmcuInit will write to 1.32 * Driver will only call MCP init if current state is 1,33 * and the MCP command will transition this to 2.34 */35enum dmcu_state {36 DMCU_UNLOADED = 0,37 DMCU_LOADED_UNINITIALIZED = 1,38 DMCU_RUNNING = 2,39};40 41struct dmcu_version {42 unsigned int interface_version;43 unsigned int abm_version;44 unsigned int psr_version;45 unsigned int build_version;46};47 48struct dmcu {49 struct dc_context *ctx;50 const struct dmcu_funcs *funcs;51 52 enum dmcu_state dmcu_state;53 struct dmcu_version dmcu_version;54 unsigned int cached_wait_loop_number;55 uint32_t psp_version;56 bool auto_load_dmcu;57};58 59struct dmcu_funcs {60 bool (*dmcu_init)(struct dmcu *dmcu);61 bool (*load_iram)(struct dmcu *dmcu,62 unsigned int start_offset,63 const char *src,64 unsigned int bytes);65 void (*set_psr_enable)(struct dmcu *dmcu, bool enable, bool wait);66 bool (*setup_psr)(struct dmcu *dmcu,67 struct dc_link *link,68 struct psr_context *psr_context);69 void (*get_psr_state)(struct dmcu *dmcu, enum dc_psr_state *dc_psr_state);70 void (*set_psr_wait_loop)(struct dmcu *dmcu,71 unsigned int wait_loop_number);72 void (*get_psr_wait_loop)(struct dmcu *dmcu,73 unsigned int *psr_wait_loop_number);74 bool (*is_dmcu_initialized)(struct dmcu *dmcu);75 bool (*lock_phy)(struct dmcu *dmcu);76 bool (*unlock_phy)(struct dmcu *dmcu);77 bool (*send_edid_cea)(struct dmcu *dmcu,78 int offset,79 int total_length,80 uint8_t *data,81 int length);82 bool (*recv_amd_vsdb)(struct dmcu *dmcu,83 int *version,84 int *min_frame_rate,85 int *max_frame_rate);86 bool (*recv_edid_cea_ack)(struct dmcu *dmcu, int *offset);87#if defined(CONFIG_DRM_AMD_SECURE_DISPLAY)88 void (*forward_crc_window)(struct dmcu *dmcu,89 struct rect *rect,90 struct otg_phy_mux *mux_mapping);91 void (*stop_crc_win_update)(struct dmcu *dmcu,92 struct otg_phy_mux *mux_mapping);93#endif94};95 96#endif97