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1/* SPDX-License-Identifier: MIT */2/*3 * Copyright 2023 Advanced Micro Devices, Inc.4 *5 * Permission is hereby granted, free of charge, to any person obtaining a6 * copy of this software and associated documentation files (the "Software"),7 * to deal in the Software without restriction, including without limitation8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,9 * and/or sell copies of the Software, and to permit persons to whom the10 * Software is furnished to do so, subject to the following conditions:11 *12 * The above copyright notice and this permission notice shall be included in13 * all copies or substantial portions of the Software.14 *15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR21 * OTHER DEALINGS IN THE SOFTWARE.22 *23 * Authors: AMD24 *25 */26 27#ifndef __DCN35_MMHUBBUB_H28#define __DCN35_MMHUBBUB_H29 30#include "mcif_wb.h"31#include "dcn32/dcn32_mmhubbub.h"32 33#define MCIF_WB_REG_VARIABLE_LIST_DCN3_5 \34 MCIF_WB_REG_VARIABLE_LIST_DCN3_0; \35 uint32_t MMHUBBUB_CLOCK_CNTL36 37#define MCIF_WB_COMMON_MASK_SH_LIST_DCN3_5(mask_sh) \38 MCIF_WB_COMMON_MASK_SH_LIST_DCN32(mask_sh), \39 SF(MMHUBBUB_CLOCK_CNTL, MMHUBBUB_TEST_CLK_SEL, mask_sh), \40 SF(MMHUBBUB_CLOCK_CNTL, DISPCLK_R_MMHUBBUB_GATE_DIS, mask_sh), \41 SF(MMHUBBUB_CLOCK_CNTL, DISPCLK_G_WBIF0_GATE_DIS, mask_sh), \42 SF(MMHUBBUB_CLOCK_CNTL, SOCCLK_G_WBIF0_GATE_DIS, mask_sh), \43 SF(MMHUBBUB_CLOCK_CNTL, MMHUBBUB_FGCG_REP_DIS, mask_sh)44 45#define MCIF_WB_REG_FIELD_LIST_DCN3_5(type) \46 struct { \47 MCIF_WB_REG_FIELD_LIST_DCN3_0(type); \48 type MMHUBBUB_TEST_CLK_SEL; \49 type DISPCLK_R_MMHUBBUB_GATE_DIS; \50 type DISPCLK_G_WBIF0_GATE_DIS; \51 type SOCCLK_G_WBIF0_GATE_DIS; \52 type MMHUBBUB_FGCG_REP_DIS; \53 }54 55struct dcn35_mmhubbub_registers {56 MCIF_WB_REG_VARIABLE_LIST_DCN3_5;57};58 59struct dcn35_mmhubbub_mask {60 MCIF_WB_REG_FIELD_LIST_DCN3_5(uint32_t);61};62 63struct dcn35_mmhubbub_shift {64 MCIF_WB_REG_FIELD_LIST_DCN3_5(uint8_t);65};66 67void dcn35_mmhubbub_construct(68 struct dcn30_mmhubbub *mcif_wb30, struct dc_context *ctx,69 const struct dcn35_mmhubbub_registers *mcif_wb_regs,70 const struct dcn35_mmhubbub_shift *mcif_wb_shift,71 const struct dcn35_mmhubbub_mask *mcif_wb_mask, int inst);72 73void dcn35_mmhubbub_set_fgcg(struct dcn30_mmhubbub *mcif_wb30, bool enabled);74 75#endif // __DCN35_MMHUBBUB_H76