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1/*2 * Copyright 2019 Advanced Micro Devices, Inc.3 *4 * Permission is hereby granted, free of charge, to any person obtaining a5 * copy of this software and associated documentation files (the "Software"),6 * to deal in the Software without restriction, including without limitation7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,8 * and/or sell copies of the Software, and to permit persons to whom the9 * Software is furnished to do so, subject to the following conditions:10 *11 * The above copyright notice and this permission notice shall be included in12 * all copies or substantial portions of the Software.13 *14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR20 * OTHER DEALINGS IN THE SOFTWARE.21 *22 * Authors: AMD23 *24 */25 26#ifndef _DMUB_SRV_H_27#define _DMUB_SRV_H_28 29/**30 * DOC: DMUB interface and operation31 *32 * DMUB is the interface to the display DMCUB microcontroller on DCN hardware.33 * It delegates hardware initialization and command submission to the34 * microcontroller. DMUB is the shortname for DMCUB.35 *36 * This interface is not thread-safe. Ensure that all access to the interface37 * is properly synchronized by the caller.38 *39 * Initialization and usage of the DMUB service should be done in the40 * steps given below:41 *42 * 1. dmub_srv_create()43 * 2. dmub_srv_has_hw_support()44 * 3. dmub_srv_calc_region_info()45 * 4. dmub_srv_hw_init()46 *47 * The call to dmub_srv_create() is required to use the server.48 *49 * The calls to dmub_srv_has_hw_support() and dmub_srv_calc_region_info()50 * are helpers to query cache window size and allocate framebuffer(s)51 * for the cache windows.52 *53 * The call to dmub_srv_hw_init() programs the DMCUB registers to prepare54 * for command submission. Commands can be queued via dmub_srv_cmd_queue()55 * and executed via dmub_srv_cmd_execute().56 *57 * If the queue is full the dmub_srv_wait_for_idle() call can be used to58 * wait until the queue has been cleared.59 *60 * Destroying the DMUB service can be done by calling dmub_srv_destroy().61 * This does not clear DMUB hardware state, only software state.62 *63 * The interface is intended to be standalone and should not depend on any64 * other component within DAL.65 */66 67#include "inc/dmub_cmd.h"68#include "dc/dc_types.h"69 70#define DMUB_PC_SNAPSHOT_COUNT 1071 72/* Forward declarations */73struct dmub_srv;74struct dmub_srv_common_regs;75struct dmub_srv_dcn31_regs;76 77struct dmcub_trace_buf_entry;78 79/* enum dmub_window_memory_type - memory location type specification for windows */80enum dmub_window_memory_type {81	DMUB_WINDOW_MEMORY_TYPE_FB = 0,82	DMUB_WINDOW_MEMORY_TYPE_GART83};84 85/* enum dmub_status - return code for dmcub functions */86enum dmub_status {87	DMUB_STATUS_OK = 0,88	DMUB_STATUS_NO_CTX,89	DMUB_STATUS_QUEUE_FULL,90	DMUB_STATUS_TIMEOUT,91	DMUB_STATUS_INVALID,92	DMUB_STATUS_HW_FAILURE,93	DMUB_STATUS_POWER_STATE_D394};95 96/* enum dmub_asic - dmub asic identifier */97enum dmub_asic {98	DMUB_ASIC_NONE = 0,99	DMUB_ASIC_DCN20,100	DMUB_ASIC_DCN21,101	DMUB_ASIC_DCN30,102	DMUB_ASIC_DCN301,103	DMUB_ASIC_DCN302,104	DMUB_ASIC_DCN303,105	DMUB_ASIC_DCN31,106	DMUB_ASIC_DCN31B,107	DMUB_ASIC_DCN314,108	DMUB_ASIC_DCN315,109	DMUB_ASIC_DCN316,110	DMUB_ASIC_DCN32,111	DMUB_ASIC_DCN321,112	DMUB_ASIC_DCN35,113	DMUB_ASIC_DCN351,114	DMUB_ASIC_DCN401,115	DMUB_ASIC_MAX,116};117 118/* enum dmub_window_id - dmub window identifier */119enum dmub_window_id {120	DMUB_WINDOW_0_INST_CONST = 0,121	DMUB_WINDOW_1_STACK,122	DMUB_WINDOW_2_BSS_DATA,123	DMUB_WINDOW_3_VBIOS,124	DMUB_WINDOW_4_MAILBOX,125	DMUB_WINDOW_5_TRACEBUFF,126	DMUB_WINDOW_6_FW_STATE,127	DMUB_WINDOW_7_SCRATCH_MEM,128	DMUB_WINDOW_SHARED_STATE,129	DMUB_WINDOW_TOTAL,130};131 132/* enum dmub_notification_type - dmub outbox notification identifier */133enum dmub_notification_type {134	DMUB_NOTIFICATION_NO_DATA = 0,135	DMUB_NOTIFICATION_AUX_REPLY,136	DMUB_NOTIFICATION_HPD,137	DMUB_NOTIFICATION_HPD_IRQ,138	DMUB_NOTIFICATION_SET_CONFIG_REPLY,139	DMUB_NOTIFICATION_DPIA_NOTIFICATION,140	DMUB_NOTIFICATION_HPD_SENSE_NOTIFY,141	DMUB_NOTIFICATION_MAX142};143 144/**145 * DPIA NOTIFICATION Response Type146 */147enum dpia_notify_bw_alloc_status {148 149	DPIA_BW_REQ_FAILED = 0,150	DPIA_BW_REQ_SUCCESS,151	DPIA_EST_BW_CHANGED,152	DPIA_BW_ALLOC_CAPS_CHANGED153};154 155/* enum dmub_memory_access_type - memory access method */156enum dmub_memory_access_type {157	DMUB_MEMORY_ACCESS_DEFAULT,158	DMUB_MEMORY_ACCESS_CPU = DMUB_MEMORY_ACCESS_DEFAULT,159	DMUB_MEMORY_ACCESS_DMA160};161 162/* enum dmub_power_state type - to track DC power state in dmub_srv */163enum dmub_srv_power_state_type {164	DMUB_POWER_STATE_UNDEFINED = 0,165	DMUB_POWER_STATE_D0 = 1,166	DMUB_POWER_STATE_D3 = 8167};168 169/**170 * struct dmub_region - dmub hw memory region171 * @base: base address for region, must be 256 byte aligned172 * @top: top address for region173 */174struct dmub_region {175	uint32_t base;176	uint32_t top;177};178 179/**180 * struct dmub_window - dmub hw cache window181 * @off: offset to the fb memory in gpu address space182 * @r: region in uc address space for cache window183 */184struct dmub_window {185	union dmub_addr offset;186	struct dmub_region region;187};188 189/**190 * struct dmub_fb - defines a dmub framebuffer memory region191 * @cpu_addr: cpu virtual address for the region, NULL if invalid192 * @gpu_addr: gpu virtual address for the region, NULL if invalid193 * @size: size of the region in bytes, zero if invalid194 */195struct dmub_fb {196	void *cpu_addr;197	uint64_t gpu_addr;198	uint32_t size;199};200 201/**202 * struct dmub_srv_region_params - params used for calculating dmub regions203 * @inst_const_size: size of the fw inst const section204 * @bss_data_size: size of the fw bss data section205 * @vbios_size: size of the vbios data206 * @fw_bss_data: raw firmware bss data section207 */208struct dmub_srv_region_params {209	uint32_t inst_const_size;210	uint32_t bss_data_size;211	uint32_t vbios_size;212	const uint8_t *fw_inst_const;213	const uint8_t *fw_bss_data;214	const enum dmub_window_memory_type *window_memory_type;215};216 217/**218 * struct dmub_srv_region_info - output region info from the dmub service219 * @fb_size: required minimum fb size for all regions, aligned to 4096 bytes220 * @num_regions: number of regions used by the dmub service221 * @regions: region info222 *223 * The regions are aligned such that they can be all placed within the224 * same framebuffer but they can also be placed into different framebuffers.225 *226 * The size of each region can be calculated by the caller:227 * size = reg.top - reg.base228 *229 * Care must be taken when performing custom allocations to ensure that each230 * region base address is 256 byte aligned.231 */232struct dmub_srv_region_info {233	uint32_t fb_size;234	uint32_t gart_size;235	uint8_t num_regions;236	struct dmub_region regions[DMUB_WINDOW_TOTAL];237};238 239/**240 * struct dmub_srv_memory_params - parameters used for driver fb setup241 * @region_info: region info calculated by dmub service242 * @cpu_fb_addr: base cpu address for the framebuffer243 * @cpu_inbox_addr: base cpu address for the gart244 * @gpu_fb_addr: base gpu virtual address for the framebuffer245 * @gpu_inbox_addr: base gpu virtual address for the gart246 */247struct dmub_srv_memory_params {248	const struct dmub_srv_region_info *region_info;249	void *cpu_fb_addr;250	void *cpu_gart_addr;251	uint64_t gpu_fb_addr;252	uint64_t gpu_gart_addr;253	const enum dmub_window_memory_type *window_memory_type;254};255 256/**257 * struct dmub_srv_fb_info - output fb info from the dmub service258 * @num_fbs: number of required dmub framebuffers259 * @fbs: fb data for each region260 *261 * Output from the dmub service helper that can be used by the262 * driver to prepare dmub_fb that can be passed into the dmub263 * hw init service.264 *265 * Assumes that all regions are within the same framebuffer266 * and have been setup according to the region_info generated267 * by the dmub service.268 */269struct dmub_srv_fb_info {270	uint8_t num_fb;271	struct dmub_fb fb[DMUB_WINDOW_TOTAL];272};273 274/*275 * struct dmub_srv_hw_params - params for dmub hardware initialization276 * @fb: framebuffer info for each region277 * @fb_base: base of the framebuffer aperture278 * @fb_offset: offset of the framebuffer aperture279 * @psp_version: psp version to pass for DMCU init280 * @load_inst_const: true if DMUB should load inst const fw281 */282struct dmub_srv_hw_params {283	struct dmub_fb *fb[DMUB_WINDOW_TOTAL];284	uint64_t fb_base;285	uint64_t fb_offset;286	uint32_t psp_version;287	bool load_inst_const;288	bool skip_panel_power_sequence;289	bool disable_z10;290	bool power_optimization;291	bool dpia_supported;292	bool disable_dpia;293	bool usb4_cm_version;294	bool fw_in_system_memory;295	bool dpia_hpd_int_enable_supported;296	bool disable_clock_gate;297	bool disallow_dispclk_dppclk_ds;298	bool ips_sequential_ono;299	enum dmub_memory_access_type mem_access_type;300	enum dmub_ips_disable_type disable_ips;301	bool disallow_phy_access;302	bool disable_sldo_opt;303	bool enable_non_transparent_setconfig;304};305 306/**307 * struct dmub_srv_debug - Debug info for dmub_srv308 * @timeout_occured: Indicates a timeout occured on any message from driver to dmub309 * @timeout_cmd: first cmd sent from driver that timed out - subsequent timeouts are not stored310 */311struct dmub_srv_debug {312	bool timeout_occured;313	union dmub_rb_cmd timeout_cmd;314	unsigned long long timestamp;315};316 317/**318 * struct dmub_diagnostic_data - Diagnostic data retrieved from DMCUB for319 * debugging purposes, including logging, crash analysis, etc.320 */321struct dmub_diagnostic_data {322	uint32_t dmcub_version;323	uint32_t scratch[17];324	uint32_t pc[DMUB_PC_SNAPSHOT_COUNT];325	uint32_t undefined_address_fault_addr;326	uint32_t inst_fetch_fault_addr;327	uint32_t data_write_fault_addr;328	uint32_t inbox1_rptr;329	uint32_t inbox1_wptr;330	uint32_t inbox1_size;331	uint32_t inbox0_rptr;332	uint32_t inbox0_wptr;333	uint32_t inbox0_size;334	uint32_t outbox1_rptr;335	uint32_t outbox1_wptr;336	uint32_t outbox1_size;337	uint32_t gpint_datain0;338	struct dmub_srv_debug timeout_info;339	uint8_t is_dmcub_enabled : 1;340	uint8_t is_dmcub_soft_reset : 1;341	uint8_t is_dmcub_secure_reset : 1;342	uint8_t is_traceport_en : 1;343	uint8_t is_cw0_enabled : 1;344	uint8_t is_cw6_enabled : 1;345};346 347/**348 * struct dmub_srv_base_funcs - Driver specific base callbacks349 */350struct dmub_srv_base_funcs {351	/**352	 * @reg_read:353	 *354	 * Hook for reading a register.355	 *356	 * Return: The 32-bit register value from the given address.357	 */358	uint32_t (*reg_read)(void *ctx, uint32_t address);359 360	/**361	 * @reg_write:362	 *363	 * Hook for writing a value to the register specified by address.364	 */365	void (*reg_write)(void *ctx, uint32_t address, uint32_t value);366};367 368/**369 * struct dmub_srv_hw_funcs - hardware sequencer funcs for dmub370 */371struct dmub_srv_hw_funcs {372	/* private: internal use only */373 374	void (*init)(struct dmub_srv *dmub);375 376	void (*reset)(struct dmub_srv *dmub);377 378	void (*reset_release)(struct dmub_srv *dmub);379 380	void (*backdoor_load)(struct dmub_srv *dmub,381			      const struct dmub_window *cw0,382			      const struct dmub_window *cw1);383 384	void (*backdoor_load_zfb_mode)(struct dmub_srv *dmub,385			      const struct dmub_window *cw0,386			      const struct dmub_window *cw1);387	void (*setup_windows)(struct dmub_srv *dmub,388			      const struct dmub_window *cw2,389			      const struct dmub_window *cw3,390			      const struct dmub_window *cw4,391			      const struct dmub_window *cw5,392			      const struct dmub_window *cw6,393			      const struct dmub_window *region6);394 395	void (*setup_mailbox)(struct dmub_srv *dmub,396			      const struct dmub_region *inbox1);397 398	uint32_t (*get_inbox1_wptr)(struct dmub_srv *dmub);399 400	uint32_t (*get_inbox1_rptr)(struct dmub_srv *dmub);401 402	void (*set_inbox1_wptr)(struct dmub_srv *dmub, uint32_t wptr_offset);403 404	void (*setup_out_mailbox)(struct dmub_srv *dmub,405			      const struct dmub_region *outbox1);406 407	uint32_t (*get_outbox1_wptr)(struct dmub_srv *dmub);408 409	void (*set_outbox1_rptr)(struct dmub_srv *dmub, uint32_t rptr_offset);410 411	void (*setup_outbox0)(struct dmub_srv *dmub,412			      const struct dmub_region *outbox0);413 414	uint32_t (*get_outbox0_wptr)(struct dmub_srv *dmub);415 416	void (*set_outbox0_rptr)(struct dmub_srv *dmub, uint32_t rptr_offset);417 418	uint32_t (*emul_get_inbox1_rptr)(struct dmub_srv *dmub);419 420	void (*emul_set_inbox1_wptr)(struct dmub_srv *dmub, uint32_t wptr_offset);421 422	bool (*is_supported)(struct dmub_srv *dmub);423 424	bool (*is_psrsu_supported)(struct dmub_srv *dmub);425 426	bool (*is_hw_init)(struct dmub_srv *dmub);427	bool (*is_hw_powered_up)(struct dmub_srv *dmub);428 429	void (*enable_dmub_boot_options)(struct dmub_srv *dmub,430				const struct dmub_srv_hw_params *params);431 432	void (*skip_dmub_panel_power_sequence)(struct dmub_srv *dmub, bool skip);433 434	union dmub_fw_boot_status (*get_fw_status)(struct dmub_srv *dmub);435 436	union dmub_fw_boot_options (*get_fw_boot_option)(struct dmub_srv *dmub);437 438	void (*set_gpint)(struct dmub_srv *dmub,439			  union dmub_gpint_data_register reg);440 441	bool (*is_gpint_acked)(struct dmub_srv *dmub,442			       union dmub_gpint_data_register reg);443 444	uint32_t (*get_gpint_response)(struct dmub_srv *dmub);445 446	uint32_t (*get_gpint_dataout)(struct dmub_srv *dmub);447 448	void (*configure_dmub_in_system_memory)(struct dmub_srv *dmub);449	void (*clear_inbox0_ack_register)(struct dmub_srv *dmub);450	uint32_t (*read_inbox0_ack_register)(struct dmub_srv *dmub);451	void (*send_inbox0_cmd)(struct dmub_srv *dmub, union dmub_inbox0_data_register data);452	uint32_t (*get_current_time)(struct dmub_srv *dmub);453 454	void (*get_diagnostic_data)(struct dmub_srv *dmub, struct dmub_diagnostic_data *dmub_oca);455 456	bool (*should_detect)(struct dmub_srv *dmub);457	void (*init_reg_offsets)(struct dmub_srv *dmub, struct dc_context *ctx);458 459	void (*subvp_save_surf_addr)(struct dmub_srv *dmub, const struct dc_plane_address *addr, uint8_t subvp_index);460	void (*send_reg_inbox0_cmd_msg)(struct dmub_srv *dmub,461			union dmub_rb_cmd *cmd);462	uint32_t (*read_reg_inbox0_rsp_int_status)(struct dmub_srv *dmub);463	void (*read_reg_inbox0_cmd_rsp)(struct dmub_srv *dmub,464			union dmub_rb_cmd *cmd);465	void (*write_reg_inbox0_rsp_int_ack)(struct dmub_srv *dmub);466	uint32_t (*read_reg_outbox0_rdy_int_status)(struct dmub_srv *dmub);467	void (*write_reg_outbox0_rdy_int_ack)(struct dmub_srv *dmub);468	void (*read_reg_outbox0_msg)(struct dmub_srv *dmub, uint32_t *msg);469	void (*write_reg_outbox0_rsp)(struct dmub_srv *dmub, uint32_t *rsp);470	uint32_t (*read_reg_outbox0_rsp_int_status)(struct dmub_srv *dmub);471	void (*enable_reg_inbox0_rsp_int)(struct dmub_srv *dmub, bool enable);472	void (*enable_reg_outbox0_rdy_int)(struct dmub_srv *dmub, bool enable);473};474 475/**476 * struct dmub_srv_create_params - params for dmub service creation477 * @base_funcs: driver supplied base routines478 * @hw_funcs: optional overrides for hw funcs479 * @user_ctx: context data for callback funcs480 * @asic: driver supplied asic481 * @fw_version: the current firmware version, if any482 * @is_virtual: false for hw support only483 */484struct dmub_srv_create_params {485	struct dmub_srv_base_funcs funcs;486	struct dmub_srv_hw_funcs *hw_funcs;487	void *user_ctx;488	enum dmub_asic asic;489	uint32_t fw_version;490	bool is_virtual;491};492 493/**494 * struct dmub_srv - software state for dmcub495 * @asic: dmub asic identifier496 * @user_ctx: user provided context for the dmub_srv497 * @fw_version: the current firmware version, if any498 * @is_virtual: false if hardware support only499 * @shared_state: dmub shared state between firmware and driver500 * @fw_state: dmub firmware state pointer501 */502struct dmub_srv {503	enum dmub_asic asic;504	void *user_ctx;505	uint32_t fw_version;506	bool is_virtual;507	struct dmub_fb scratch_mem_fb;508	volatile struct dmub_shared_state_feature_block *shared_state;509	volatile const struct dmub_fw_state *fw_state;510 511	/* private: internal use only */512	const struct dmub_srv_common_regs *regs;513	const struct dmub_srv_dcn31_regs *regs_dcn31;514	struct dmub_srv_dcn32_regs *regs_dcn32;515	struct dmub_srv_dcn35_regs *regs_dcn35;516	const struct dmub_srv_dcn401_regs *regs_dcn401;517 518	struct dmub_srv_base_funcs funcs;519	struct dmub_srv_hw_funcs hw_funcs;520	struct dmub_rb inbox1_rb;521	uint32_t inbox1_last_wptr;522	/**523	 * outbox1_rb is accessed without locks (dal & dc)524	 * and to be used only in dmub_srv_stat_get_notification()525	 */526	struct dmub_rb outbox1_rb;527 528	struct dmub_rb outbox0_rb;529 530	bool sw_init;531	bool hw_init;532 533	uint64_t fb_base;534	uint64_t fb_offset;535	uint32_t psp_version;536 537	/* Feature capabilities reported by fw */538	struct dmub_fw_meta_info meta_info;539	struct dmub_feature_caps feature_caps;540	struct dmub_visual_confirm_color visual_confirm_color;541 542	enum dmub_srv_power_state_type power_state;543	struct dmub_srv_debug debug;544};545 546/**547 * struct dmub_notification - dmub notification data548 * @type: dmub notification type549 * @link_index: link index to identify aux connection550 * @result: USB4 status returned from dmub551 * @pending_notification: Indicates there are other pending notifications552 * @aux_reply: aux reply553 * @hpd_status: hpd status554 * @bw_alloc_reply: BW Allocation reply from CM/DPIA555 */556struct dmub_notification {557	enum dmub_notification_type type;558	uint8_t link_index;559	uint8_t result;560	bool pending_notification;561	union {562		struct aux_reply_data aux_reply;563		enum dp_hpd_status hpd_status;564		enum set_config_status sc_status;565		/**566		 * DPIA notification command.567		 */568		struct dmub_rb_cmd_dpia_notification dpia_notification;569		struct dmub_rb_cmd_hpd_sense_notify_data hpd_sense_notify;570	};571};572 573/**574 * DMUB firmware version helper macro - useful for checking if the version575 * of a firmware to know if feature or functionality is supported or present.576 */577#define DMUB_FW_VERSION(major, minor, revision) \578	((((major) & 0xFF) << 24) | (((minor) & 0xFF) << 16) | (((revision) & 0xFF) << 8))579 580/**581 * dmub_srv_create() - creates the DMUB service.582 * @dmub: the dmub service583 * @params: creation parameters for the service584 *585 * Return:586 *   DMUB_STATUS_OK - success587 *   DMUB_STATUS_INVALID - unspecified error588 */589enum dmub_status dmub_srv_create(struct dmub_srv *dmub,590				 const struct dmub_srv_create_params *params);591 592/**593 * dmub_srv_destroy() - destroys the DMUB service.594 * @dmub: the dmub service595 */596void dmub_srv_destroy(struct dmub_srv *dmub);597 598/**599 * dmub_srv_calc_region_info() - retreives region info from the dmub service600 * @dmub: the dmub service601 * @params: parameters used to calculate region locations602 * @info_out: the output region info from dmub603 *604 * Calculates the base and top address for all relevant dmub regions605 * using the parameters given (if any).606 *607 * Return:608 *   DMUB_STATUS_OK - success609 *   DMUB_STATUS_INVALID - unspecified error610 */611enum dmub_status612dmub_srv_calc_region_info(struct dmub_srv *dmub,613			  const struct dmub_srv_region_params *params,614			  struct dmub_srv_region_info *out);615 616/**617 * dmub_srv_calc_region_info() - retreives fb info from the dmub service618 * @dmub: the dmub service619 * @params: parameters used to calculate fb locations620 * @info_out: the output fb info from dmub621 *622 * Calculates the base and top address for all relevant dmub regions623 * using the parameters given (if any).624 *625 * Return:626 *   DMUB_STATUS_OK - success627 *   DMUB_STATUS_INVALID - unspecified error628 */629enum dmub_status dmub_srv_calc_mem_info(struct dmub_srv *dmub,630				       const struct dmub_srv_memory_params *params,631				       struct dmub_srv_fb_info *out);632 633/**634 * dmub_srv_has_hw_support() - returns hw support state for dmcub635 * @dmub: the dmub service636 * @is_supported: hw support state637 *638 * Queries the hardware for DMCUB support and returns the result.639 *640 * Can be called before dmub_srv_hw_init().641 *642 * Return:643 *   DMUB_STATUS_OK - success644 *   DMUB_STATUS_INVALID - unspecified error645 */646enum dmub_status dmub_srv_has_hw_support(struct dmub_srv *dmub,647					 bool *is_supported);648 649/**650 * dmub_srv_is_hw_init() - returns hardware init state651 *652 * Return:653 *   DMUB_STATUS_OK - success654 *   DMUB_STATUS_INVALID - unspecified error655 */656enum dmub_status dmub_srv_is_hw_init(struct dmub_srv *dmub, bool *is_hw_init);657 658/**659 * dmub_srv_hw_init() - initializes the underlying DMUB hardware660 * @dmub: the dmub service661 * @params: params for hardware initialization662 *663 * Resets the DMUB hardware and performs backdoor loading of the664 * required cache regions based on the input framebuffer regions.665 *666 * Return:667 *   DMUB_STATUS_OK - success668 *   DMUB_STATUS_NO_CTX - dmcub context not initialized669 *   DMUB_STATUS_INVALID - unspecified error670 */671enum dmub_status dmub_srv_hw_init(struct dmub_srv *dmub,672				  const struct dmub_srv_hw_params *params);673 674/**675 * dmub_srv_hw_reset() - puts the DMUB hardware in reset state if initialized676 * @dmub: the dmub service677 *678 * Before destroying the DMUB service or releasing the backing framebuffer679 * memory we'll need to put the DMCUB into reset first.680 *681 * A subsequent call to dmub_srv_hw_init() will re-enable the DMCUB.682 *683 * Return:684 *   DMUB_STATUS_OK - success685 *   DMUB_STATUS_INVALID - unspecified error686 */687enum dmub_status dmub_srv_hw_reset(struct dmub_srv *dmub);688 689/**690 * dmub_srv_sync_inbox1() - sync sw state with hw state691 * @dmub: the dmub service692 *693 * Sync sw state with hw state when resume from S0i3694 *695 * Return:696 *   DMUB_STATUS_OK - success697 *   DMUB_STATUS_INVALID - unspecified error698 */699enum dmub_status dmub_srv_sync_inbox1(struct dmub_srv *dmub);700 701/**702 * dmub_srv_cmd_queue() - queues a command to the DMUB703 * @dmub: the dmub service704 * @cmd: the command to queue705 *706 * Queues a command to the DMUB service but does not begin execution707 * immediately.708 *709 * Return:710 *   DMUB_STATUS_OK - success711 *   DMUB_STATUS_QUEUE_FULL - no remaining room in queue712 *   DMUB_STATUS_INVALID - unspecified error713 */714enum dmub_status dmub_srv_cmd_queue(struct dmub_srv *dmub,715				    const union dmub_rb_cmd *cmd);716 717/**718 * dmub_srv_cmd_execute() - Executes a queued sequence to the dmub719 * @dmub: the dmub service720 *721 * Begins execution of queued commands on the dmub.722 *723 * Return:724 *   DMUB_STATUS_OK - success725 *   DMUB_STATUS_INVALID - unspecified error726 */727enum dmub_status dmub_srv_cmd_execute(struct dmub_srv *dmub);728 729/**730 * dmub_srv_wait_for_hw_pwr_up() - Waits for firmware hardware power up is completed731 * @dmub: the dmub service732 * @timeout_us: the maximum number of microseconds to wait733 *734 * Waits until firmware hardware is powered up. The maximum735 * wait time is given in microseconds to prevent spinning forever.736 *737 * Return:738 *   DMUB_STATUS_OK - success739 *   DMUB_STATUS_TIMEOUT - timed out740 *   DMUB_STATUS_INVALID - unspecified error741 */742enum dmub_status dmub_srv_wait_for_hw_pwr_up(struct dmub_srv *dmub,743					     uint32_t timeout_us);744 745bool dmub_srv_is_hw_pwr_up(struct dmub_srv *dmub);746 747/**748 * dmub_srv_wait_for_auto_load() - Waits for firmware auto load to complete749 * @dmub: the dmub service750 * @timeout_us: the maximum number of microseconds to wait751 *752 * Waits until firmware has been autoloaded by the DMCUB. The maximum753 * wait time is given in microseconds to prevent spinning forever.754 *755 * On ASICs without firmware autoload support this function will return756 * immediately.757 *758 * Return:759 *   DMUB_STATUS_OK - success760 *   DMUB_STATUS_TIMEOUT - wait for phy init timed out761 *   DMUB_STATUS_INVALID - unspecified error762 */763enum dmub_status dmub_srv_wait_for_auto_load(struct dmub_srv *dmub,764					     uint32_t timeout_us);765 766/**767 * dmub_srv_wait_for_phy_init() - Waits for DMUB PHY init to complete768 * @dmub: the dmub service769 * @timeout_us: the maximum number of microseconds to wait770 *771 * Waits until the PHY has been initialized by the DMUB. The maximum772 * wait time is given in microseconds to prevent spinning forever.773 *774 * On ASICs without PHY init support this function will return775 * immediately.776 *777 * Return:778 *   DMUB_STATUS_OK - success779 *   DMUB_STATUS_TIMEOUT - wait for phy init timed out780 *   DMUB_STATUS_INVALID - unspecified error781 */782enum dmub_status dmub_srv_wait_for_phy_init(struct dmub_srv *dmub,783					    uint32_t timeout_us);784 785/**786 * dmub_srv_wait_for_idle() - Waits for the DMUB to be idle787 * @dmub: the dmub service788 * @timeout_us: the maximum number of microseconds to wait789 *790 * Waits until the DMUB buffer is empty and all commands have791 * finished processing. The maximum wait time is given in792 * microseconds to prevent spinning forever.793 *794 * Return:795 *   DMUB_STATUS_OK - success796 *   DMUB_STATUS_TIMEOUT - wait for buffer to flush timed out797 *   DMUB_STATUS_INVALID - unspecified error798 */799enum dmub_status dmub_srv_wait_for_idle(struct dmub_srv *dmub,800					uint32_t timeout_us);801 802/**803 * dmub_srv_send_gpint_command() - Sends a GPINT based command.804 * @dmub: the dmub service805 * @command_code: the command code to send806 * @param: the command parameter to send807 * @timeout_us: the maximum number of microseconds to wait808 *809 * Sends a command via the general purpose interrupt (GPINT).810 * Waits for the number of microseconds specified by timeout_us811 * for the command ACK before returning.812 *813 * Can be called after software initialization.814 *815 * Return:816 *   DMUB_STATUS_OK - success817 *   DMUB_STATUS_TIMEOUT - wait for ACK timed out818 *   DMUB_STATUS_INVALID - unspecified error819 */820enum dmub_status821dmub_srv_send_gpint_command(struct dmub_srv *dmub,822			    enum dmub_gpint_command command_code,823			    uint16_t param, uint32_t timeout_us);824 825/**826 * dmub_srv_get_gpint_response() - Queries the GPINT response.827 * @dmub: the dmub service828 * @response: the response for the last GPINT829 *830 * Returns the response code for the last GPINT interrupt.831 *832 * Can be called after software initialization.833 *834 * Return:835 *   DMUB_STATUS_OK - success836 *   DMUB_STATUS_INVALID - unspecified error837 */838enum dmub_status dmub_srv_get_gpint_response(struct dmub_srv *dmub,839					     uint32_t *response);840 841/**842 * dmub_srv_get_gpint_dataout() - Queries the GPINT DATAOUT.843 * @dmub: the dmub service844 * @dataout: the data for the GPINT DATAOUT845 *846 * Returns the response code for the last GPINT DATAOUT interrupt.847 *848 * Can be called after software initialization.849 *850 * Return:851 *   DMUB_STATUS_OK - success852 *   DMUB_STATUS_INVALID - unspecified error853 */854enum dmub_status dmub_srv_get_gpint_dataout(struct dmub_srv *dmub,855					     uint32_t *dataout);856 857/**858 * dmub_flush_buffer_mem() - Read back entire frame buffer region.859 * This ensures that the write from x86 has been flushed and will not860 * hang the DMCUB.861 * @fb: frame buffer to flush862 *863 * Can be called after software initialization.864 */865void dmub_flush_buffer_mem(const struct dmub_fb *fb);866 867/**868 * dmub_srv_get_fw_boot_status() - Returns the DMUB boot status bits.869 *870 * @dmub: the dmub service871 * @status: out pointer for firmware status872 *873 * Return:874 *   DMUB_STATUS_OK - success875 *   DMUB_STATUS_INVALID - unspecified error, unsupported876 */877enum dmub_status dmub_srv_get_fw_boot_status(struct dmub_srv *dmub,878					     union dmub_fw_boot_status *status);879 880enum dmub_status dmub_srv_get_fw_boot_option(struct dmub_srv *dmub,881					     union dmub_fw_boot_options *option);882 883enum dmub_status dmub_srv_cmd_with_reply_data(struct dmub_srv *dmub,884					      union dmub_rb_cmd *cmd);885 886enum dmub_status dmub_srv_set_skip_panel_power_sequence(struct dmub_srv *dmub,887					     bool skip);888 889bool dmub_srv_get_outbox0_msg(struct dmub_srv *dmub, struct dmcub_trace_buf_entry *entry);890 891bool dmub_srv_get_diagnostic_data(struct dmub_srv *dmub, struct dmub_diagnostic_data *diag_data);892 893bool dmub_srv_should_detect(struct dmub_srv *dmub);894 895/**896 * dmub_srv_send_inbox0_cmd() - Send command to DMUB using INBOX0897 * @dmub: the dmub service898 * @data: the data to be sent in the INBOX0 command899 *900 * Send command by writing directly to INBOX0 WPTR901 *902 * Return:903 *   DMUB_STATUS_OK - success904 *   DMUB_STATUS_INVALID - hw_init false or hw function does not exist905 */906enum dmub_status dmub_srv_send_inbox0_cmd(struct dmub_srv *dmub, union dmub_inbox0_data_register data);907 908/**909 * dmub_srv_wait_for_inbox0_ack() - wait for DMUB to ACK INBOX0 command910 * @dmub: the dmub service911 * @timeout_us: the maximum number of microseconds to wait912 *913 * Wait for DMUB to ACK the INBOX0 message914 *915 * Return:916 *   DMUB_STATUS_OK - success917 *   DMUB_STATUS_INVALID - hw_init false or hw function does not exist918 *   DMUB_STATUS_TIMEOUT - wait for ack timed out919 */920enum dmub_status dmub_srv_wait_for_inbox0_ack(struct dmub_srv *dmub, uint32_t timeout_us);921 922/**923 * dmub_srv_wait_for_inbox0_ack() - clear ACK register for INBOX0924 * @dmub: the dmub service925 *926 * Clear ACK register for INBOX0927 *928 * Return:929 *   DMUB_STATUS_OK - success930 *   DMUB_STATUS_INVALID - hw_init false or hw function does not exist931 */932enum dmub_status dmub_srv_clear_inbox0_ack(struct dmub_srv *dmub);933 934/**935 * dmub_srv_subvp_save_surf_addr() - Save primary and meta address for subvp on each flip936 * @dmub: The dmub service937 * @addr: The surface address to be programmed on the current flip938 * @subvp_index: Index of subvp pipe, indicates which subvp pipe the address should be saved for939 *940 * Function to save the surface flip addr into scratch registers. This is to fix a race condition941 * between FW and driver reading / writing to the surface address at the same time. This is942 * required because there is no EARLIEST_IN_USE_META.943 *944 * Return:945 *   void946 */947void dmub_srv_subvp_save_surf_addr(struct dmub_srv *dmub, const struct dc_plane_address *addr, uint8_t subvp_index);948 949/**950 * dmub_srv_send_reg_inbox0_cmd() - send a dmub command and wait for the command951 * being processed by DMUB.952 * @dmub: The dmub service953 * @cmd: The dmub command being sent. If with_replay is true, the function will954 * update cmd with replied data.955 * @with_reply: true if DMUB reply needs to be copied back to cmd. false if the956 * cmd doesn't need to be replied.957 * @timeout_us: timeout in microseconds.958 *959 * Return:960 * DMUB_STATUS_OK - success961 * DMUB_STATUS_TIMEOUT - DMUB fails to process the command within the timeout962 * interval.963 */964enum dmub_status dmub_srv_send_reg_inbox0_cmd(965		struct dmub_srv *dmub,966		union dmub_rb_cmd *cmd,967		bool with_reply, uint32_t timeout_us);968 969/**970 * dmub_srv_set_power_state() - Track DC power state in dmub_srv971 * @dmub: The dmub service972 * @power_state: DC power state setting973 *974 * Store DC power state in dmub_srv.  If dmub_srv is in D3, then don't send messages to DMUB975 *976 * Return:977 *   void978 */979void dmub_srv_set_power_state(struct dmub_srv *dmub, enum dmub_srv_power_state_type dmub_srv_power_state);980 981#endif /* _DMUB_SRV_H_ */982