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1/*2 * Copyright 2021 Advanced Micro Devices, Inc.3 *4 * Permission is hereby granted, free of charge, to any person obtaining a5 * copy of this software and associated documentation files (the "Software"),6 * to deal in the Software without restriction, including without limitation7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,8 * and/or sell copies of the Software, and to permit persons to whom the9 * Software is furnished to do so, subject to the following conditions:10 *11 * The above copyright notice and this permission notice shall be included in12 * all copies or substantial portions of the Software.13 *14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR20 * OTHER DEALINGS IN THE SOFTWARE.21 *22 * Authors: AMD23 *24 */25 26#include "../dmub_srv.h"27#include "dmub_reg.h"28#include "dmub_dcn314.h"29 30#include "dcn/dcn_3_1_4_offset.h"31#include "dcn/dcn_3_1_4_sh_mask.h"32 33#define DCN_BASE__INST0_SEG0 0x0000001234#define DCN_BASE__INST0_SEG1 0x000000C035#define DCN_BASE__INST0_SEG2 0x000034C036#define DCN_BASE__INST0_SEG3 0x0000900037#define DCN_BASE__INST0_SEG4 0x02403C0038#define DCN_BASE__INST0_SEG5 039 40#define BASE_INNER(seg) DCN_BASE__INST0_SEG##seg41#define CTX dmub42#define REGS dmub->regs_dcn3143#define REG_OFFSET_EXP(reg_name) (BASE(reg##reg_name##_BASE_IDX) + reg##reg_name)44 45/* Registers. */46 47const struct dmub_srv_dcn31_regs dmub_srv_dcn314_regs = {48#define DMUB_SR(reg) REG_OFFSET_EXP(reg),49 {50 DMUB_DCN31_REGS()51 DMCUB_INTERNAL_REGS()52 },53#undef DMUB_SR54 55#define DMUB_SF(reg, field) FD_MASK(reg, field),56 { DMUB_DCN31_FIELDS() },57#undef DMUB_SF58 59#define DMUB_SF(reg, field) FD_SHIFT(reg, field),60 { DMUB_DCN31_FIELDS() },61#undef DMUB_SF62};63 64bool dmub_dcn314_is_psrsu_supported(struct dmub_srv *dmub)65{66 return dmub->fw_version >= DMUB_FW_VERSION(8, 0, 16);67}68