1042 lines · c
1/* Copyright 2018 Advanced Micro Devices, Inc.2 *3 * Permission is hereby granted, free of charge, to any person obtaining a4 * copy of this software and associated documentation files (the "Software"),5 * to deal in the Software without restriction, including without limitation6 * the rights to use, copy, modify, merge, publish, distribute, sublicense,7 * and/or sell copies of the Software, and to permit persons to whom the8 * Software is furnished to do so, subject to the following conditions:9 *10 * The above copyright notice and this permission notice shall be included in11 * all copies or substantial portions of the Software.12 *13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR14 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,15 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL16 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR17 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,18 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR19 * OTHER DEALINGS IN THE SOFTWARE.20 *21 * Authors: AMD22 *23 */24 25#include "power_helpers.h"26#include "dc/inc/hw/dmcu.h"27#include "dc/inc/hw/abm.h"28#include "dc.h"29#include "core_types.h"30#include "dmub_cmd.h"31 32#define DIV_ROUNDUP(a, b) (((a)+((b)/2))/(b))33#define bswap16_based_on_endian(big_endian, value) \34 ((big_endian) ? cpu_to_be16(value) : cpu_to_le16(value))35 36/* Possible Min Reduction config from least aggressive to most aggressive37 * 0 1 2 3 4 5 6 7 8 9 10 11 1238 * 100 98.0 94.1 94.1 85.1 80.3 75.3 69.4 60.0 57.6 50.2 49.8 40.0 %39 */40static const unsigned char min_reduction_table[13] = {410xff, 0xfa, 0xf0, 0xf0, 0xd9, 0xcd, 0xc0, 0xb1, 0x99, 0x93, 0x80, 0x82, 0x66};42 43/* Possible Max Reduction configs from least aggressive to most aggressive44 * 0 1 2 3 4 5 6 7 8 9 10 11 1245 * 96.1 89.8 85.1 80.3 69.4 64.7 64.7 50.2 39.6 30.2 30.2 30.2 19.6 %46 */47static const unsigned char max_reduction_table[13] = {480xf5, 0xe5, 0xd9, 0xcd, 0xb1, 0xa5, 0xa5, 0x80, 0x65, 0x4d, 0x4d, 0x4d, 0x32};49 50/* Possible ABM 2.2 Min Reduction configs from least aggressive to most aggressive51 * 0 1 2 3 4 5 6 7 8 9 10 11 1252 * 100 100 100 100 100 100 100 100 100 92.2 83.1 75.3 75.3 %53 */54static const unsigned char min_reduction_table_v_2_2[13] = {550xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xeb, 0xd4, 0xc0, 0xc0};56 57/* Possible ABM 2.2 Max Reduction configs from least aggressive to most aggressive58 * 0 1 2 3 4 5 6 7 8 9 10 11 1259 * 96.1 89.8 74.9 69.4 64.7 52.2 48.6 39.6 30.2 25.1 19.6 12.5 12.5 %60 */61static const unsigned char max_reduction_table_v_2_2[13] = {620xf5, 0xe5, 0xbf, 0xb1, 0xa5, 0x85, 0x7c, 0x65, 0x4d, 0x40, 0x32, 0x20, 0x20};63 64/* Predefined ABM configuration sets. We may have different configuration sets65 * in order to satisfy different power/quality requirements.66 */67static const unsigned char abm_config[abm_defines_max_config][abm_defines_max_level] = {68/* ABM Level 1, ABM Level 2, ABM Level 3, ABM Level 4 */69{ 2, 5, 7, 8 }, /* Default - Medium aggressiveness */70{ 2, 5, 8, 11 }, /* Alt #1 - Increased aggressiveness */71{ 0, 2, 4, 8 }, /* Alt #2 - Minimal aggressiveness */72{ 3, 6, 10, 12 }, /* Alt #3 - Super aggressiveness */73};74 75struct abm_parameters {76 unsigned char min_reduction;77 unsigned char max_reduction;78 unsigned char bright_pos_gain;79 unsigned char dark_pos_gain;80 unsigned char brightness_gain;81 unsigned char contrast_factor;82 unsigned char deviation_gain;83 unsigned char min_knee;84 unsigned char max_knee;85 unsigned short blRampReduction;86 unsigned short blRampStart;87};88 89static const struct abm_parameters abm_settings_config0[abm_defines_max_level] = {90// min_red max_red bright_pos dark_pos bright_gain contrast dev min_knee max_knee blRed blStart91 {0xff, 0xbf, 0x20, 0x00, 0xff, 0x99, 0xb3, 0x40, 0xe0, 0xf777, 0xcccc},92 {0xde, 0x85, 0x20, 0x00, 0xe0, 0x90, 0xa8, 0x40, 0xc8, 0xf777, 0xcccc},93 {0xb0, 0x50, 0x20, 0x00, 0xc0, 0x88, 0x78, 0x70, 0xa0, 0xeeee, 0x9999},94 {0x82, 0x40, 0x20, 0x00, 0x00, 0xb8, 0xb3, 0x70, 0x70, 0xe333, 0xb333},95};96 97static const struct abm_parameters abm_settings_config1[abm_defines_max_level] = {98// min_red max_red bright_pos dark_pos bright_gain contrast dev min_knee max_knee blRed blStart99 {0xf0, 0xd9, 0x20, 0x00, 0x00, 0xff, 0xb3, 0x70, 0x70, 0xcccc, 0xcccc},100 {0xcd, 0xa5, 0x20, 0x00, 0x00, 0xff, 0xb3, 0x70, 0x70, 0xcccc, 0xcccc},101 {0x99, 0x65, 0x20, 0x00, 0x00, 0xff, 0xb3, 0x70, 0x70, 0xcccc, 0xcccc},102 {0x82, 0x4d, 0x20, 0x00, 0x00, 0xff, 0xb3, 0x70, 0x70, 0xcccc, 0xcccc},103};104 105static const struct abm_parameters abm_settings_config2[abm_defines_max_level] = {106// min_red max_red bright_pos dark_pos bright_gain contrast dev min_knee max_knee blRed blStart107 {0xf0, 0xbf, 0x20, 0x00, 0x88, 0x99, 0xb3, 0x40, 0xe0, 0x0000, 0xcccc},108 {0xd8, 0x85, 0x20, 0x00, 0x70, 0x90, 0xa8, 0x40, 0xc8, 0x0700, 0xb333},109 {0xb8, 0x58, 0x20, 0x00, 0x64, 0x88, 0x78, 0x70, 0xa0, 0x7000, 0x9999},110 {0x82, 0x40, 0x20, 0x00, 0x00, 0xb8, 0xb3, 0x70, 0x70, 0xc333, 0xb333},111};112 113static const struct abm_parameters * const abm_settings[] = {114 abm_settings_config0,115 abm_settings_config1,116 abm_settings_config2,117};118 119static const struct dm_bl_data_point custom_backlight_curve0[] = {120 {2, 14}, {4, 16}, {6, 18}, {8, 21}, {10, 23}, {12, 26}, {14, 29}, {16, 32}, {18, 35},121 {20, 38}, {22, 41}, {24, 44}, {26, 48}, {28, 52}, {30, 55}, {32, 59}, {34, 62},122 {36, 67}, {38, 71}, {40, 75}, {42, 80}, {44, 84}, {46, 88}, {48, 93}, {50, 98},123 {52, 103}, {54, 108}, {56, 113}, {58, 118}, {60, 123}, {62, 129}, {64, 135}, {66, 140},124 {68, 146}, {70, 152}, {72, 158}, {74, 164}, {76, 171}, {78, 177}, {80, 183}, {82, 190},125 {84, 197}, {86, 204}, {88, 211}, {90, 218}, {92, 225}, {94, 232}, {96, 240}, {98, 247}};126 127struct custom_backlight_profile {128 uint8_t ac_level_percentage;129 uint8_t dc_level_percentage;130 uint8_t min_input_signal;131 uint8_t max_input_signal;132 uint8_t num_data_points;133 const struct dm_bl_data_point *data_points;134};135 136static const struct custom_backlight_profile custom_backlight_profiles[] = {137 {100, 32, 12, 255, ARRAY_SIZE(custom_backlight_curve0), custom_backlight_curve0},138};139 140#define NUM_AMBI_LEVEL 5141#define NUM_AGGR_LEVEL 4142#define NUM_POWER_FN_SEGS 8143#define NUM_BL_CURVE_SEGS 16144#define IRAM_SIZE 256145 146#define IRAM_RESERVE_AREA_START_V2 0xF0 // reserve 0xF0~0xF6 are write by DMCU only147#define IRAM_RESERVE_AREA_END_V2 0xF6 // reserve 0xF0~0xF6 are write by DMCU only148 149#define IRAM_RESERVE_AREA_START_V2_2 0xF0 // reserve 0xF0~0xFF are write by DMCU only150#define IRAM_RESERVE_AREA_END_V2_2 0xFF // reserve 0xF0~0xFF are write by DMCU only151 152#pragma pack(push, 1)153/* NOTE: iRAM is 256B in size */154struct iram_table_v_2 {155 /* flags */156 uint16_t min_abm_backlight; /* 0x00 U16 */157 158 /* parameters for ABM2.0 algorithm */159 uint8_t min_reduction[NUM_AMBI_LEVEL][NUM_AGGR_LEVEL]; /* 0x02 U0.8 */160 uint8_t max_reduction[NUM_AMBI_LEVEL][NUM_AGGR_LEVEL]; /* 0x16 U0.8 */161 uint8_t bright_pos_gain[NUM_AMBI_LEVEL][NUM_AGGR_LEVEL]; /* 0x2a U2.6 */162 uint8_t bright_neg_gain[NUM_AMBI_LEVEL][NUM_AGGR_LEVEL]; /* 0x3e U2.6 */163 uint8_t dark_pos_gain[NUM_AMBI_LEVEL][NUM_AGGR_LEVEL]; /* 0x52 U2.6 */164 uint8_t dark_neg_gain[NUM_AMBI_LEVEL][NUM_AGGR_LEVEL]; /* 0x66 U2.6 */165 uint8_t iir_curve[NUM_AMBI_LEVEL]; /* 0x7a U0.8 */166 uint8_t deviation_gain; /* 0x7f U0.8 */167 168 /* parameters for crgb conversion */169 uint16_t crgb_thresh[NUM_POWER_FN_SEGS]; /* 0x80 U3.13 */170 uint16_t crgb_offset[NUM_POWER_FN_SEGS]; /* 0x90 U1.15 */171 uint16_t crgb_slope[NUM_POWER_FN_SEGS]; /* 0xa0 U4.12 */172 173 /* parameters for custom curve */174 /* thresholds for brightness --> backlight */175 uint16_t backlight_thresholds[NUM_BL_CURVE_SEGS]; /* 0xb0 U16.0 */176 /* offsets for brightness --> backlight */177 uint16_t backlight_offsets[NUM_BL_CURVE_SEGS]; /* 0xd0 U16.0 */178 179 /* For reading PSR State directly from IRAM */180 uint8_t psr_state; /* 0xf0 */181 uint8_t dmcu_mcp_interface_version; /* 0xf1 */182 uint8_t dmcu_abm_feature_version; /* 0xf2 */183 uint8_t dmcu_psr_feature_version; /* 0xf3 */184 uint16_t dmcu_version; /* 0xf4 */185 uint8_t dmcu_state; /* 0xf6 */186 187 uint16_t blRampReduction; /* 0xf7 */188 uint16_t blRampStart; /* 0xf9 */189 uint8_t dummy5; /* 0xfb */190 uint8_t dummy6; /* 0xfc */191 uint8_t dummy7; /* 0xfd */192 uint8_t dummy8; /* 0xfe */193 uint8_t dummy9; /* 0xff */194};195 196struct iram_table_v_2_2 {197 /* flags */198 uint16_t flags; /* 0x00 U16 */199 200 /* parameters for ABM2.2 algorithm */201 uint8_t min_reduction[NUM_AMBI_LEVEL][NUM_AGGR_LEVEL]; /* 0x02 U0.8 */202 uint8_t max_reduction[NUM_AMBI_LEVEL][NUM_AGGR_LEVEL]; /* 0x16 U0.8 */203 uint8_t bright_pos_gain[NUM_AMBI_LEVEL][NUM_AGGR_LEVEL]; /* 0x2a U2.6 */204 uint8_t dark_pos_gain[NUM_AMBI_LEVEL][NUM_AGGR_LEVEL]; /* 0x3e U2.6 */205 uint8_t hybrid_factor[NUM_AGGR_LEVEL]; /* 0x52 U0.8 */206 uint8_t contrast_factor[NUM_AGGR_LEVEL]; /* 0x56 U0.8 */207 uint8_t deviation_gain[NUM_AGGR_LEVEL]; /* 0x5a U0.8 */208 uint8_t iir_curve[NUM_AMBI_LEVEL]; /* 0x5e U0.8 */209 uint8_t min_knee[NUM_AGGR_LEVEL]; /* 0x63 U0.8 */210 uint8_t max_knee[NUM_AGGR_LEVEL]; /* 0x67 U0.8 */211 uint16_t min_abm_backlight; /* 0x6b U16 */212 uint8_t pad[19]; /* 0x6d U0.8 */213 214 /* parameters for crgb conversion */215 uint16_t crgb_thresh[NUM_POWER_FN_SEGS]; /* 0x80 U3.13 */216 uint16_t crgb_offset[NUM_POWER_FN_SEGS]; /* 0x90 U1.15 */217 uint16_t crgb_slope[NUM_POWER_FN_SEGS]; /* 0xa0 U4.12 */218 219 /* parameters for custom curve */220 /* thresholds for brightness --> backlight */221 uint16_t backlight_thresholds[NUM_BL_CURVE_SEGS]; /* 0xb0 U16.0 */222 /* offsets for brightness --> backlight */223 uint16_t backlight_offsets[NUM_BL_CURVE_SEGS]; /* 0xd0 U16.0 */224 225 /* For reading PSR State directly from IRAM */226 uint8_t psr_state; /* 0xf0 */227 uint8_t dmcu_mcp_interface_version; /* 0xf1 */228 uint8_t dmcu_abm_feature_version; /* 0xf2 */229 uint8_t dmcu_psr_feature_version; /* 0xf3 */230 uint16_t dmcu_version; /* 0xf4 */231 uint8_t dmcu_state; /* 0xf6 */232 233 uint8_t dummy1; /* 0xf7 */234 uint8_t dummy2; /* 0xf8 */235 uint8_t dummy3; /* 0xf9 */236 uint8_t dummy4; /* 0xfa */237 uint8_t dummy5; /* 0xfb */238 uint8_t dummy6; /* 0xfc */239 uint8_t dummy7; /* 0xfd */240 uint8_t dummy8; /* 0xfe */241 uint8_t dummy9; /* 0xff */242};243#pragma pack(pop)244 245static void fill_backlight_transform_table(struct dmcu_iram_parameters params,246 struct iram_table_v_2 *table)247{248 unsigned int i;249 unsigned int num_entries = NUM_BL_CURVE_SEGS;250 unsigned int lut_index;251 252 table->backlight_thresholds[0] = 0;253 table->backlight_offsets[0] = params.backlight_lut_array[0];254 table->backlight_thresholds[num_entries-1] = 0xFFFF;255 table->backlight_offsets[num_entries-1] =256 params.backlight_lut_array[params.backlight_lut_array_size - 1];257 258 /* Setup all brightness levels between 0% and 100% exclusive259 * Fills brightness-to-backlight transform table. Backlight custom curve260 * describes transform from brightness to backlight. It will be defined261 * as set of thresholds and set of offsets, together, implying262 * extrapolation of custom curve into 16 uniformly spanned linear263 * segments. Each threshold/offset represented by 16 bit entry in264 * format U4.10.265 */266 for (i = 1; i+1 < num_entries; i++) {267 lut_index = (params.backlight_lut_array_size - 1) * i / (num_entries - 1);268 ASSERT(lut_index < params.backlight_lut_array_size);269 270 table->backlight_thresholds[i] =271 cpu_to_be16(DIV_ROUNDUP((i * 65536), num_entries));272 table->backlight_offsets[i] =273 cpu_to_be16(params.backlight_lut_array[lut_index]);274 }275}276 277static void fill_backlight_transform_table_v_2_2(struct dmcu_iram_parameters params,278 struct iram_table_v_2_2 *table, bool big_endian)279{280 unsigned int i;281 unsigned int num_entries = NUM_BL_CURVE_SEGS;282 unsigned int lut_index;283 284 table->backlight_thresholds[0] = 0;285 table->backlight_offsets[0] = params.backlight_lut_array[0];286 table->backlight_thresholds[num_entries-1] = 0xFFFF;287 table->backlight_offsets[num_entries-1] =288 params.backlight_lut_array[params.backlight_lut_array_size - 1];289 290 /* Setup all brightness levels between 0% and 100% exclusive291 * Fills brightness-to-backlight transform table. Backlight custom curve292 * describes transform from brightness to backlight. It will be defined293 * as set of thresholds and set of offsets, together, implying294 * extrapolation of custom curve into 16 uniformly spanned linear295 * segments. Each threshold/offset represented by 16 bit entry in296 * format U4.10.297 */298 for (i = 1; i+1 < num_entries; i++) {299 lut_index = DIV_ROUNDUP((i * params.backlight_lut_array_size), num_entries);300 ASSERT(lut_index < params.backlight_lut_array_size);301 302 table->backlight_thresholds[i] = (big_endian) ?303 cpu_to_be16(DIV_ROUNDUP((i * 65536), num_entries)) :304 cpu_to_le16(DIV_ROUNDUP((i * 65536), num_entries));305 table->backlight_offsets[i] = (big_endian) ?306 cpu_to_be16(params.backlight_lut_array[lut_index]) :307 cpu_to_le16(params.backlight_lut_array[lut_index]);308 }309}310 311static void fill_iram_v_2(struct iram_table_v_2 *ram_table, struct dmcu_iram_parameters params)312{313 unsigned int set = params.set;314 315 ram_table->min_abm_backlight =316 cpu_to_be16(params.min_abm_backlight);317 ram_table->deviation_gain = 0xb3;318 319 ram_table->blRampReduction =320 cpu_to_be16(params.backlight_ramping_reduction);321 ram_table->blRampStart =322 cpu_to_be16(params.backlight_ramping_start);323 324 ram_table->min_reduction[0][0] = min_reduction_table[abm_config[set][0]];325 ram_table->min_reduction[1][0] = min_reduction_table[abm_config[set][0]];326 ram_table->min_reduction[2][0] = min_reduction_table[abm_config[set][0]];327 ram_table->min_reduction[3][0] = min_reduction_table[abm_config[set][0]];328 ram_table->min_reduction[4][0] = min_reduction_table[abm_config[set][0]];329 ram_table->max_reduction[0][0] = max_reduction_table[abm_config[set][0]];330 ram_table->max_reduction[1][0] = max_reduction_table[abm_config[set][0]];331 ram_table->max_reduction[2][0] = max_reduction_table[abm_config[set][0]];332 ram_table->max_reduction[3][0] = max_reduction_table[abm_config[set][0]];333 ram_table->max_reduction[4][0] = max_reduction_table[abm_config[set][0]];334 335 ram_table->min_reduction[0][1] = min_reduction_table[abm_config[set][1]];336 ram_table->min_reduction[1][1] = min_reduction_table[abm_config[set][1]];337 ram_table->min_reduction[2][1] = min_reduction_table[abm_config[set][1]];338 ram_table->min_reduction[3][1] = min_reduction_table[abm_config[set][1]];339 ram_table->min_reduction[4][1] = min_reduction_table[abm_config[set][1]];340 ram_table->max_reduction[0][1] = max_reduction_table[abm_config[set][1]];341 ram_table->max_reduction[1][1] = max_reduction_table[abm_config[set][1]];342 ram_table->max_reduction[2][1] = max_reduction_table[abm_config[set][1]];343 ram_table->max_reduction[3][1] = max_reduction_table[abm_config[set][1]];344 ram_table->max_reduction[4][1] = max_reduction_table[abm_config[set][1]];345 346 ram_table->min_reduction[0][2] = min_reduction_table[abm_config[set][2]];347 ram_table->min_reduction[1][2] = min_reduction_table[abm_config[set][2]];348 ram_table->min_reduction[2][2] = min_reduction_table[abm_config[set][2]];349 ram_table->min_reduction[3][2] = min_reduction_table[abm_config[set][2]];350 ram_table->min_reduction[4][2] = min_reduction_table[abm_config[set][2]];351 ram_table->max_reduction[0][2] = max_reduction_table[abm_config[set][2]];352 ram_table->max_reduction[1][2] = max_reduction_table[abm_config[set][2]];353 ram_table->max_reduction[2][2] = max_reduction_table[abm_config[set][2]];354 ram_table->max_reduction[3][2] = max_reduction_table[abm_config[set][2]];355 ram_table->max_reduction[4][2] = max_reduction_table[abm_config[set][2]];356 357 ram_table->min_reduction[0][3] = min_reduction_table[abm_config[set][3]];358 ram_table->min_reduction[1][3] = min_reduction_table[abm_config[set][3]];359 ram_table->min_reduction[2][3] = min_reduction_table[abm_config[set][3]];360 ram_table->min_reduction[3][3] = min_reduction_table[abm_config[set][3]];361 ram_table->min_reduction[4][3] = min_reduction_table[abm_config[set][3]];362 ram_table->max_reduction[0][3] = max_reduction_table[abm_config[set][3]];363 ram_table->max_reduction[1][3] = max_reduction_table[abm_config[set][3]];364 ram_table->max_reduction[2][3] = max_reduction_table[abm_config[set][3]];365 ram_table->max_reduction[3][3] = max_reduction_table[abm_config[set][3]];366 ram_table->max_reduction[4][3] = max_reduction_table[abm_config[set][3]];367 368 ram_table->bright_pos_gain[0][0] = 0x20;369 ram_table->bright_pos_gain[0][1] = 0x20;370 ram_table->bright_pos_gain[0][2] = 0x20;371 ram_table->bright_pos_gain[0][3] = 0x20;372 ram_table->bright_pos_gain[1][0] = 0x20;373 ram_table->bright_pos_gain[1][1] = 0x20;374 ram_table->bright_pos_gain[1][2] = 0x20;375 ram_table->bright_pos_gain[1][3] = 0x20;376 ram_table->bright_pos_gain[2][0] = 0x20;377 ram_table->bright_pos_gain[2][1] = 0x20;378 ram_table->bright_pos_gain[2][2] = 0x20;379 ram_table->bright_pos_gain[2][3] = 0x20;380 ram_table->bright_pos_gain[3][0] = 0x20;381 ram_table->bright_pos_gain[3][1] = 0x20;382 ram_table->bright_pos_gain[3][2] = 0x20;383 ram_table->bright_pos_gain[3][3] = 0x20;384 ram_table->bright_pos_gain[4][0] = 0x20;385 ram_table->bright_pos_gain[4][1] = 0x20;386 ram_table->bright_pos_gain[4][2] = 0x20;387 ram_table->bright_pos_gain[4][3] = 0x20;388 ram_table->bright_neg_gain[0][0] = 0x00;389 ram_table->bright_neg_gain[0][1] = 0x00;390 ram_table->bright_neg_gain[0][2] = 0x00;391 ram_table->bright_neg_gain[0][3] = 0x00;392 ram_table->bright_neg_gain[1][0] = 0x00;393 ram_table->bright_neg_gain[1][1] = 0x00;394 ram_table->bright_neg_gain[1][2] = 0x00;395 ram_table->bright_neg_gain[1][3] = 0x00;396 ram_table->bright_neg_gain[2][0] = 0x00;397 ram_table->bright_neg_gain[2][1] = 0x00;398 ram_table->bright_neg_gain[2][2] = 0x00;399 ram_table->bright_neg_gain[2][3] = 0x00;400 ram_table->bright_neg_gain[3][0] = 0x00;401 ram_table->bright_neg_gain[3][1] = 0x00;402 ram_table->bright_neg_gain[3][2] = 0x00;403 ram_table->bright_neg_gain[3][3] = 0x00;404 ram_table->bright_neg_gain[4][0] = 0x00;405 ram_table->bright_neg_gain[4][1] = 0x00;406 ram_table->bright_neg_gain[4][2] = 0x00;407 ram_table->bright_neg_gain[4][3] = 0x00;408 ram_table->dark_pos_gain[0][0] = 0x00;409 ram_table->dark_pos_gain[0][1] = 0x00;410 ram_table->dark_pos_gain[0][2] = 0x00;411 ram_table->dark_pos_gain[0][3] = 0x00;412 ram_table->dark_pos_gain[1][0] = 0x00;413 ram_table->dark_pos_gain[1][1] = 0x00;414 ram_table->dark_pos_gain[1][2] = 0x00;415 ram_table->dark_pos_gain[1][3] = 0x00;416 ram_table->dark_pos_gain[2][0] = 0x00;417 ram_table->dark_pos_gain[2][1] = 0x00;418 ram_table->dark_pos_gain[2][2] = 0x00;419 ram_table->dark_pos_gain[2][3] = 0x00;420 ram_table->dark_pos_gain[3][0] = 0x00;421 ram_table->dark_pos_gain[3][1] = 0x00;422 ram_table->dark_pos_gain[3][2] = 0x00;423 ram_table->dark_pos_gain[3][3] = 0x00;424 ram_table->dark_pos_gain[4][0] = 0x00;425 ram_table->dark_pos_gain[4][1] = 0x00;426 ram_table->dark_pos_gain[4][2] = 0x00;427 ram_table->dark_pos_gain[4][3] = 0x00;428 ram_table->dark_neg_gain[0][0] = 0x00;429 ram_table->dark_neg_gain[0][1] = 0x00;430 ram_table->dark_neg_gain[0][2] = 0x00;431 ram_table->dark_neg_gain[0][3] = 0x00;432 ram_table->dark_neg_gain[1][0] = 0x00;433 ram_table->dark_neg_gain[1][1] = 0x00;434 ram_table->dark_neg_gain[1][2] = 0x00;435 ram_table->dark_neg_gain[1][3] = 0x00;436 ram_table->dark_neg_gain[2][0] = 0x00;437 ram_table->dark_neg_gain[2][1] = 0x00;438 ram_table->dark_neg_gain[2][2] = 0x00;439 ram_table->dark_neg_gain[2][3] = 0x00;440 ram_table->dark_neg_gain[3][0] = 0x00;441 ram_table->dark_neg_gain[3][1] = 0x00;442 ram_table->dark_neg_gain[3][2] = 0x00;443 ram_table->dark_neg_gain[3][3] = 0x00;444 ram_table->dark_neg_gain[4][0] = 0x00;445 ram_table->dark_neg_gain[4][1] = 0x00;446 ram_table->dark_neg_gain[4][2] = 0x00;447 ram_table->dark_neg_gain[4][3] = 0x00;448 449 ram_table->iir_curve[0] = 0x65;450 ram_table->iir_curve[1] = 0x65;451 ram_table->iir_curve[2] = 0x65;452 ram_table->iir_curve[3] = 0x65;453 ram_table->iir_curve[4] = 0x65;454 455 //Gamma 2.4456 ram_table->crgb_thresh[0] = cpu_to_be16(0x13b6);457 ram_table->crgb_thresh[1] = cpu_to_be16(0x1648);458 ram_table->crgb_thresh[2] = cpu_to_be16(0x18e3);459 ram_table->crgb_thresh[3] = cpu_to_be16(0x1b41);460 ram_table->crgb_thresh[4] = cpu_to_be16(0x1d46);461 ram_table->crgb_thresh[5] = cpu_to_be16(0x1f21);462 ram_table->crgb_thresh[6] = cpu_to_be16(0x2167);463 ram_table->crgb_thresh[7] = cpu_to_be16(0x2384);464 ram_table->crgb_offset[0] = cpu_to_be16(0x2999);465 ram_table->crgb_offset[1] = cpu_to_be16(0x3999);466 ram_table->crgb_offset[2] = cpu_to_be16(0x4666);467 ram_table->crgb_offset[3] = cpu_to_be16(0x5999);468 ram_table->crgb_offset[4] = cpu_to_be16(0x6333);469 ram_table->crgb_offset[5] = cpu_to_be16(0x7800);470 ram_table->crgb_offset[6] = cpu_to_be16(0x8c00);471 ram_table->crgb_offset[7] = cpu_to_be16(0xa000);472 ram_table->crgb_slope[0] = cpu_to_be16(0x3147);473 ram_table->crgb_slope[1] = cpu_to_be16(0x2978);474 ram_table->crgb_slope[2] = cpu_to_be16(0x23a2);475 ram_table->crgb_slope[3] = cpu_to_be16(0x1f55);476 ram_table->crgb_slope[4] = cpu_to_be16(0x1c63);477 ram_table->crgb_slope[5] = cpu_to_be16(0x1a0f);478 ram_table->crgb_slope[6] = cpu_to_be16(0x178d);479 ram_table->crgb_slope[7] = cpu_to_be16(0x15ab);480 481 fill_backlight_transform_table(482 params, ram_table);483}484 485static void fill_iram_v_2_2(struct iram_table_v_2_2 *ram_table, struct dmcu_iram_parameters params)486{487 unsigned int set = params.set;488 489 ram_table->flags = 0x0;490 491 ram_table->min_abm_backlight =492 cpu_to_be16(params.min_abm_backlight);493 494 ram_table->deviation_gain[0] = 0xb3;495 ram_table->deviation_gain[1] = 0xa8;496 ram_table->deviation_gain[2] = 0x98;497 ram_table->deviation_gain[3] = 0x68;498 499 ram_table->min_reduction[0][0] = min_reduction_table_v_2_2[abm_config[set][0]];500 ram_table->min_reduction[1][0] = min_reduction_table_v_2_2[abm_config[set][0]];501 ram_table->min_reduction[2][0] = min_reduction_table_v_2_2[abm_config[set][0]];502 ram_table->min_reduction[3][0] = min_reduction_table_v_2_2[abm_config[set][0]];503 ram_table->min_reduction[4][0] = min_reduction_table_v_2_2[abm_config[set][0]];504 ram_table->max_reduction[0][0] = max_reduction_table_v_2_2[abm_config[set][0]];505 ram_table->max_reduction[1][0] = max_reduction_table_v_2_2[abm_config[set][0]];506 ram_table->max_reduction[2][0] = max_reduction_table_v_2_2[abm_config[set][0]];507 ram_table->max_reduction[3][0] = max_reduction_table_v_2_2[abm_config[set][0]];508 ram_table->max_reduction[4][0] = max_reduction_table_v_2_2[abm_config[set][0]];509 510 ram_table->min_reduction[0][1] = min_reduction_table_v_2_2[abm_config[set][1]];511 ram_table->min_reduction[1][1] = min_reduction_table_v_2_2[abm_config[set][1]];512 ram_table->min_reduction[2][1] = min_reduction_table_v_2_2[abm_config[set][1]];513 ram_table->min_reduction[3][1] = min_reduction_table_v_2_2[abm_config[set][1]];514 ram_table->min_reduction[4][1] = min_reduction_table_v_2_2[abm_config[set][1]];515 ram_table->max_reduction[0][1] = max_reduction_table_v_2_2[abm_config[set][1]];516 ram_table->max_reduction[1][1] = max_reduction_table_v_2_2[abm_config[set][1]];517 ram_table->max_reduction[2][1] = max_reduction_table_v_2_2[abm_config[set][1]];518 ram_table->max_reduction[3][1] = max_reduction_table_v_2_2[abm_config[set][1]];519 ram_table->max_reduction[4][1] = max_reduction_table_v_2_2[abm_config[set][1]];520 521 ram_table->min_reduction[0][2] = min_reduction_table_v_2_2[abm_config[set][2]];522 ram_table->min_reduction[1][2] = min_reduction_table_v_2_2[abm_config[set][2]];523 ram_table->min_reduction[2][2] = min_reduction_table_v_2_2[abm_config[set][2]];524 ram_table->min_reduction[3][2] = min_reduction_table_v_2_2[abm_config[set][2]];525 ram_table->min_reduction[4][2] = min_reduction_table_v_2_2[abm_config[set][2]];526 ram_table->max_reduction[0][2] = max_reduction_table_v_2_2[abm_config[set][2]];527 ram_table->max_reduction[1][2] = max_reduction_table_v_2_2[abm_config[set][2]];528 ram_table->max_reduction[2][2] = max_reduction_table_v_2_2[abm_config[set][2]];529 ram_table->max_reduction[3][2] = max_reduction_table_v_2_2[abm_config[set][2]];530 ram_table->max_reduction[4][2] = max_reduction_table_v_2_2[abm_config[set][2]];531 532 ram_table->min_reduction[0][3] = min_reduction_table_v_2_2[abm_config[set][3]];533 ram_table->min_reduction[1][3] = min_reduction_table_v_2_2[abm_config[set][3]];534 ram_table->min_reduction[2][3] = min_reduction_table_v_2_2[abm_config[set][3]];535 ram_table->min_reduction[3][3] = min_reduction_table_v_2_2[abm_config[set][3]];536 ram_table->min_reduction[4][3] = min_reduction_table_v_2_2[abm_config[set][3]];537 ram_table->max_reduction[0][3] = max_reduction_table_v_2_2[abm_config[set][3]];538 ram_table->max_reduction[1][3] = max_reduction_table_v_2_2[abm_config[set][3]];539 ram_table->max_reduction[2][3] = max_reduction_table_v_2_2[abm_config[set][3]];540 ram_table->max_reduction[3][3] = max_reduction_table_v_2_2[abm_config[set][3]];541 ram_table->max_reduction[4][3] = max_reduction_table_v_2_2[abm_config[set][3]];542 543 ram_table->bright_pos_gain[0][0] = 0x20;544 ram_table->bright_pos_gain[0][1] = 0x20;545 ram_table->bright_pos_gain[0][2] = 0x20;546 ram_table->bright_pos_gain[0][3] = 0x20;547 ram_table->bright_pos_gain[1][0] = 0x20;548 ram_table->bright_pos_gain[1][1] = 0x20;549 ram_table->bright_pos_gain[1][2] = 0x20;550 ram_table->bright_pos_gain[1][3] = 0x20;551 ram_table->bright_pos_gain[2][0] = 0x20;552 ram_table->bright_pos_gain[2][1] = 0x20;553 ram_table->bright_pos_gain[2][2] = 0x20;554 ram_table->bright_pos_gain[2][3] = 0x20;555 ram_table->bright_pos_gain[3][0] = 0x20;556 ram_table->bright_pos_gain[3][1] = 0x20;557 ram_table->bright_pos_gain[3][2] = 0x20;558 ram_table->bright_pos_gain[3][3] = 0x20;559 ram_table->bright_pos_gain[4][0] = 0x20;560 ram_table->bright_pos_gain[4][1] = 0x20;561 ram_table->bright_pos_gain[4][2] = 0x20;562 ram_table->bright_pos_gain[4][3] = 0x20;563 564 ram_table->dark_pos_gain[0][0] = 0x00;565 ram_table->dark_pos_gain[0][1] = 0x00;566 ram_table->dark_pos_gain[0][2] = 0x00;567 ram_table->dark_pos_gain[0][3] = 0x00;568 ram_table->dark_pos_gain[1][0] = 0x00;569 ram_table->dark_pos_gain[1][1] = 0x00;570 ram_table->dark_pos_gain[1][2] = 0x00;571 ram_table->dark_pos_gain[1][3] = 0x00;572 ram_table->dark_pos_gain[2][0] = 0x00;573 ram_table->dark_pos_gain[2][1] = 0x00;574 ram_table->dark_pos_gain[2][2] = 0x00;575 ram_table->dark_pos_gain[2][3] = 0x00;576 ram_table->dark_pos_gain[3][0] = 0x00;577 ram_table->dark_pos_gain[3][1] = 0x00;578 ram_table->dark_pos_gain[3][2] = 0x00;579 ram_table->dark_pos_gain[3][3] = 0x00;580 ram_table->dark_pos_gain[4][0] = 0x00;581 ram_table->dark_pos_gain[4][1] = 0x00;582 ram_table->dark_pos_gain[4][2] = 0x00;583 ram_table->dark_pos_gain[4][3] = 0x00;584 585 ram_table->hybrid_factor[0] = 0xff;586 ram_table->hybrid_factor[1] = 0xff;587 ram_table->hybrid_factor[2] = 0xff;588 ram_table->hybrid_factor[3] = 0xc0;589 590 ram_table->contrast_factor[0] = 0x99;591 ram_table->contrast_factor[1] = 0x99;592 ram_table->contrast_factor[2] = 0x90;593 ram_table->contrast_factor[3] = 0x80;594 595 ram_table->iir_curve[0] = 0x65;596 ram_table->iir_curve[1] = 0x65;597 ram_table->iir_curve[2] = 0x65;598 ram_table->iir_curve[3] = 0x65;599 ram_table->iir_curve[4] = 0x65;600 601 //Gamma 2.2602 ram_table->crgb_thresh[0] = cpu_to_be16(0x127c);603 ram_table->crgb_thresh[1] = cpu_to_be16(0x151b);604 ram_table->crgb_thresh[2] = cpu_to_be16(0x17d5);605 ram_table->crgb_thresh[3] = cpu_to_be16(0x1a56);606 ram_table->crgb_thresh[4] = cpu_to_be16(0x1c83);607 ram_table->crgb_thresh[5] = cpu_to_be16(0x1e72);608 ram_table->crgb_thresh[6] = cpu_to_be16(0x20f0);609 ram_table->crgb_thresh[7] = cpu_to_be16(0x232b);610 ram_table->crgb_offset[0] = cpu_to_be16(0x2999);611 ram_table->crgb_offset[1] = cpu_to_be16(0x3999);612 ram_table->crgb_offset[2] = cpu_to_be16(0x4666);613 ram_table->crgb_offset[3] = cpu_to_be16(0x5999);614 ram_table->crgb_offset[4] = cpu_to_be16(0x6333);615 ram_table->crgb_offset[5] = cpu_to_be16(0x7800);616 ram_table->crgb_offset[6] = cpu_to_be16(0x8c00);617 ram_table->crgb_offset[7] = cpu_to_be16(0xa000);618 ram_table->crgb_slope[0] = cpu_to_be16(0x3609);619 ram_table->crgb_slope[1] = cpu_to_be16(0x2dfa);620 ram_table->crgb_slope[2] = cpu_to_be16(0x27ea);621 ram_table->crgb_slope[3] = cpu_to_be16(0x235d);622 ram_table->crgb_slope[4] = cpu_to_be16(0x2042);623 ram_table->crgb_slope[5] = cpu_to_be16(0x1dc3);624 ram_table->crgb_slope[6] = cpu_to_be16(0x1b1a);625 ram_table->crgb_slope[7] = cpu_to_be16(0x1910);626 627 fill_backlight_transform_table_v_2_2(628 params, ram_table, true);629}630 631static void fill_iram_v_2_3(struct iram_table_v_2_2 *ram_table, struct dmcu_iram_parameters params, bool big_endian)632{633 unsigned int i, j;634 unsigned int set = params.set;635 636 ram_table->flags = 0x0;637 ram_table->min_abm_backlight = (big_endian) ?638 cpu_to_be16(params.min_abm_backlight) :639 cpu_to_le16(params.min_abm_backlight);640 641 for (i = 0; i < NUM_AGGR_LEVEL; i++) {642 ram_table->hybrid_factor[i] = abm_settings[set][i].brightness_gain;643 ram_table->contrast_factor[i] = abm_settings[set][i].contrast_factor;644 ram_table->deviation_gain[i] = abm_settings[set][i].deviation_gain;645 ram_table->min_knee[i] = abm_settings[set][i].min_knee;646 ram_table->max_knee[i] = abm_settings[set][i].max_knee;647 648 for (j = 0; j < NUM_AMBI_LEVEL; j++) {649 ram_table->min_reduction[j][i] = abm_settings[set][i].min_reduction;650 ram_table->max_reduction[j][i] = abm_settings[set][i].max_reduction;651 ram_table->bright_pos_gain[j][i] = abm_settings[set][i].bright_pos_gain;652 ram_table->dark_pos_gain[j][i] = abm_settings[set][i].dark_pos_gain;653 }654 }655 656 ram_table->iir_curve[0] = 0x65;657 ram_table->iir_curve[1] = 0x65;658 ram_table->iir_curve[2] = 0x65;659 ram_table->iir_curve[3] = 0x65;660 ram_table->iir_curve[4] = 0x65;661 662 //Gamma 2.2663 ram_table->crgb_thresh[0] = bswap16_based_on_endian(big_endian, 0x127c);664 ram_table->crgb_thresh[1] = bswap16_based_on_endian(big_endian, 0x151b);665 ram_table->crgb_thresh[2] = bswap16_based_on_endian(big_endian, 0x17d5);666 ram_table->crgb_thresh[3] = bswap16_based_on_endian(big_endian, 0x1a56);667 ram_table->crgb_thresh[4] = bswap16_based_on_endian(big_endian, 0x1c83);668 ram_table->crgb_thresh[5] = bswap16_based_on_endian(big_endian, 0x1e72);669 ram_table->crgb_thresh[6] = bswap16_based_on_endian(big_endian, 0x20f0);670 ram_table->crgb_thresh[7] = bswap16_based_on_endian(big_endian, 0x232b);671 ram_table->crgb_offset[0] = bswap16_based_on_endian(big_endian, 0x2999);672 ram_table->crgb_offset[1] = bswap16_based_on_endian(big_endian, 0x3999);673 ram_table->crgb_offset[2] = bswap16_based_on_endian(big_endian, 0x4666);674 ram_table->crgb_offset[3] = bswap16_based_on_endian(big_endian, 0x5999);675 ram_table->crgb_offset[4] = bswap16_based_on_endian(big_endian, 0x6333);676 ram_table->crgb_offset[5] = bswap16_based_on_endian(big_endian, 0x7800);677 ram_table->crgb_offset[6] = bswap16_based_on_endian(big_endian, 0x8c00);678 ram_table->crgb_offset[7] = bswap16_based_on_endian(big_endian, 0xa000);679 ram_table->crgb_slope[0] = bswap16_based_on_endian(big_endian, 0x3609);680 ram_table->crgb_slope[1] = bswap16_based_on_endian(big_endian, 0x2dfa);681 ram_table->crgb_slope[2] = bswap16_based_on_endian(big_endian, 0x27ea);682 ram_table->crgb_slope[3] = bswap16_based_on_endian(big_endian, 0x235d);683 ram_table->crgb_slope[4] = bswap16_based_on_endian(big_endian, 0x2042);684 ram_table->crgb_slope[5] = bswap16_based_on_endian(big_endian, 0x1dc3);685 ram_table->crgb_slope[6] = bswap16_based_on_endian(big_endian, 0x1b1a);686 ram_table->crgb_slope[7] = bswap16_based_on_endian(big_endian, 0x1910);687 688 fill_backlight_transform_table_v_2_2(689 params, ram_table, big_endian);690}691 692bool dmub_init_abm_config(struct resource_pool *res_pool,693 struct dmcu_iram_parameters params,694 unsigned int inst)695{696 struct iram_table_v_2_2 ram_table;697 struct abm_config_table config;698 unsigned int set = params.set;699 bool result = false;700 uint32_t i, j = 0;701 702 if (res_pool->abm == NULL && res_pool->multiple_abms[inst] == NULL)703 return false;704 705 memset(&ram_table, 0, sizeof(ram_table));706 memset(&config, 0, sizeof(config));707 708 fill_iram_v_2_3(&ram_table, params, false);709 710 // We must copy to structure that is aligned to 32-bit711 for (i = 0; i < NUM_POWER_FN_SEGS; i++) {712 config.crgb_thresh[i] = ram_table.crgb_thresh[i];713 config.crgb_offset[i] = ram_table.crgb_offset[i];714 config.crgb_slope[i] = ram_table.crgb_slope[i];715 }716 717 for (i = 0; i < NUM_BL_CURVE_SEGS; i++) {718 config.backlight_thresholds[i] = ram_table.backlight_thresholds[i];719 config.backlight_offsets[i] = ram_table.backlight_offsets[i];720 }721 722 for (i = 0; i < NUM_AMBI_LEVEL; i++)723 config.iir_curve[i] = ram_table.iir_curve[i];724 725 for (i = 0; i < NUM_AMBI_LEVEL; i++) {726 for (j = 0; j < NUM_AGGR_LEVEL; j++) {727 config.min_reduction[i][j] = ram_table.min_reduction[i][j];728 config.max_reduction[i][j] = ram_table.max_reduction[i][j];729 config.bright_pos_gain[i][j] = ram_table.bright_pos_gain[i][j];730 config.dark_pos_gain[i][j] = ram_table.dark_pos_gain[i][j];731 }732 }733 734 for (i = 0; i < NUM_AGGR_LEVEL; i++) {735 config.hybrid_factor[i] = ram_table.hybrid_factor[i];736 config.contrast_factor[i] = ram_table.contrast_factor[i];737 config.deviation_gain[i] = ram_table.deviation_gain[i];738 config.min_knee[i] = ram_table.min_knee[i];739 config.max_knee[i] = ram_table.max_knee[i];740 }741 742 if (params.backlight_ramping_override) {743 for (i = 0; i < NUM_AGGR_LEVEL; i++) {744 config.blRampReduction[i] = params.backlight_ramping_reduction;745 config.blRampStart[i] = params.backlight_ramping_start;746 }747 } else {748 for (i = 0; i < NUM_AGGR_LEVEL; i++) {749 config.blRampReduction[i] = abm_settings[set][i].blRampReduction;750 config.blRampStart[i] = abm_settings[set][i].blRampStart;751 }752 }753 754 config.min_abm_backlight = ram_table.min_abm_backlight;755 756 if (res_pool->multiple_abms[inst]) {757 result = res_pool->multiple_abms[inst]->funcs->init_abm_config(758 res_pool->multiple_abms[inst], (char *)(&config), sizeof(struct abm_config_table), inst);759 } else760 result = res_pool->abm->funcs->init_abm_config(761 res_pool->abm, (char *)(&config), sizeof(struct abm_config_table), 0);762 763 return result;764}765 766bool dmcu_load_iram(struct dmcu *dmcu,767 struct dmcu_iram_parameters params)768{769 unsigned char ram_table[IRAM_SIZE];770 bool result = false;771 772 if (dmcu == NULL)773 return false;774 775 if (dmcu && !dmcu->funcs->is_dmcu_initialized(dmcu))776 return true;777 778 memset(&ram_table, 0, sizeof(ram_table));779 780 if (dmcu->dmcu_version.abm_version == 0x24) {781 fill_iram_v_2_3((struct iram_table_v_2_2 *)ram_table, params, true);782 result = dmcu->funcs->load_iram(dmcu, 0, (char *)(&ram_table),783 IRAM_RESERVE_AREA_START_V2_2);784 } else if (dmcu->dmcu_version.abm_version == 0x23) {785 fill_iram_v_2_3((struct iram_table_v_2_2 *)ram_table, params, true);786 787 result = dmcu->funcs->load_iram(788 dmcu, 0, (char *)(&ram_table), IRAM_RESERVE_AREA_START_V2_2);789 } else if (dmcu->dmcu_version.abm_version == 0x22) {790 fill_iram_v_2_2((struct iram_table_v_2_2 *)ram_table, params);791 792 result = dmcu->funcs->load_iram(793 dmcu, 0, (char *)(&ram_table), IRAM_RESERVE_AREA_START_V2_2);794 } else {795 fill_iram_v_2((struct iram_table_v_2 *)ram_table, params);796 797 result = dmcu->funcs->load_iram(798 dmcu, 0, (char *)(&ram_table), IRAM_RESERVE_AREA_START_V2);799 800 if (result)801 result = dmcu->funcs->load_iram(802 dmcu, IRAM_RESERVE_AREA_END_V2 + 1,803 (char *)(&ram_table) + IRAM_RESERVE_AREA_END_V2 + 1,804 sizeof(ram_table) - IRAM_RESERVE_AREA_END_V2 - 1);805 }806 807 return result;808}809 810/*811 * is_psr_su_specific_panel() - check if sink is AMD vendor-specific PSR-SU812 * supported eDP device.813 *814 * @link: dc link pointer815 *816 * Return: true if AMDGPU vendor specific PSR-SU eDP panel817 */818bool is_psr_su_specific_panel(struct dc_link *link)819{820 bool isPSRSUSupported = false;821 struct dpcd_caps *dpcd_caps = &link->dpcd_caps;822 823 if (dpcd_caps->edp_rev >= DP_EDP_14) {824 if (dpcd_caps->psr_info.psr_version >= DP_PSR2_WITH_Y_COORD_ET_SUPPORTED)825 isPSRSUSupported = true;826 /*827 * Some panels will report PSR capabilities over additional DPCD bits.828 * Such panels are approved despite reporting only PSR v3, as long as829 * the additional bits are reported.830 */831 if (dpcd_caps->sink_dev_id == DP_BRANCH_DEVICE_ID_001CF8) {832 /*833 * This is the temporary workaround to disable PSRSU when system turned on834 * DSC function on the sepcific sink.835 */836 if (dpcd_caps->psr_info.psr_version < DP_PSR2_WITH_Y_COORD_IS_SUPPORTED)837 isPSRSUSupported = false;838 else if (dpcd_caps->dsc_caps.dsc_basic_caps.fields.dsc_support.DSC_SUPPORT &&839 ((dpcd_caps->sink_dev_id_str[1] == 0x08 && dpcd_caps->sink_dev_id_str[0] == 0x08) ||840 (dpcd_caps->sink_dev_id_str[1] == 0x08 && dpcd_caps->sink_dev_id_str[0] == 0x07)))841 isPSRSUSupported = false;842 else if (dpcd_caps->sink_dev_id_str[1] == 0x08 && dpcd_caps->sink_dev_id_str[0] == 0x03)843 isPSRSUSupported = false;844 else if (dpcd_caps->sink_dev_id_str[1] == 0x08 && dpcd_caps->sink_dev_id_str[0] == 0x01)845 isPSRSUSupported = false;846 else if (dpcd_caps->psr_info.force_psrsu_cap == 0x1)847 isPSRSUSupported = true;848 }849 }850 851 return isPSRSUSupported;852}853 854/**855 * mod_power_calc_psr_configs() - calculate/update generic psr configuration fields.856 * @psr_config: [output], psr configuration structure to be updated857 * @link: [input] dc link pointer858 * @stream: [input] dc stream state pointer859 *860 * calculate and update the psr configuration fields that are not DM specific, i.e. such861 * fields which are based on DPCD caps or timing information. To setup PSR in DMUB FW,862 * this helper is assumed to be called before the call of the DC helper dc_link_setup_psr().863 *864 * PSR config fields to be updated within the helper:865 * - psr_rfb_setup_time866 * - psr_sdp_transmit_line_num_deadline867 * - line_time_in_us868 * - su_y_granularity869 * - su_granularity_required870 * - psr_frame_capture_indication_req871 * - psr_exit_link_training_required872 *873 * PSR config fields that are DM specific and NOT updated within the helper:874 * - allow_smu_optimizations875 * - allow_multi_disp_optimizations876 */877void mod_power_calc_psr_configs(struct psr_config *psr_config,878 struct dc_link *link,879 const struct dc_stream_state *stream)880{881 unsigned int num_vblank_lines = 0;882 unsigned int vblank_time_in_us = 0;883 unsigned int sdp_tx_deadline_in_us = 0;884 unsigned int line_time_in_us = 0;885 struct dpcd_caps *dpcd_caps = &link->dpcd_caps;886 const int psr_setup_time_step_in_us = 55; /* refer to eDP spec DPCD 0x071h */887 888 /* timing parameters */889 num_vblank_lines = stream->timing.v_total -890 stream->timing.v_addressable -891 stream->timing.v_border_top -892 stream->timing.v_border_bottom;893 894 vblank_time_in_us = (stream->timing.h_total * num_vblank_lines * 1000) / (stream->timing.pix_clk_100hz / 10);895 896 line_time_in_us = ((stream->timing.h_total * 1000) / (stream->timing.pix_clk_100hz / 10)) + 1;897 898 /**899 * psr configuration fields900 *901 * as per eDP 1.5 pg. 377 of 459, DPCD 0x071h bits [3:1], psr setup time bits interpreted as below902 * 000b <--> 330 us (default)903 * 001b <--> 275 us904 * 010b <--> 220 us905 * 011b <--> 165 us906 * 100b <--> 110 us907 * 101b <--> 055 us908 * 110b <--> 000 us909 */910 psr_config->psr_rfb_setup_time =911 (6 - dpcd_caps->psr_info.psr_dpcd_caps.bits.PSR_SETUP_TIME) * psr_setup_time_step_in_us;912 913 if (psr_config->psr_rfb_setup_time > vblank_time_in_us) {914 link->psr_settings.psr_frame_capture_indication_req = true;915 link->psr_settings.psr_sdp_transmit_line_num_deadline = num_vblank_lines;916 } else {917 sdp_tx_deadline_in_us = vblank_time_in_us - psr_config->psr_rfb_setup_time;918 919 /* Set the last possible line SDP may be transmitted without violating the RFB setup time */920 link->psr_settings.psr_frame_capture_indication_req = false;921 link->psr_settings.psr_sdp_transmit_line_num_deadline = sdp_tx_deadline_in_us / line_time_in_us;922 }923 924 psr_config->psr_sdp_transmit_line_num_deadline = link->psr_settings.psr_sdp_transmit_line_num_deadline;925 psr_config->line_time_in_us = line_time_in_us;926 psr_config->su_y_granularity = dpcd_caps->psr_info.psr2_su_y_granularity_cap;927 psr_config->su_granularity_required = dpcd_caps->psr_info.psr_dpcd_caps.bits.SU_GRANULARITY_REQUIRED;928 psr_config->psr_frame_capture_indication_req = link->psr_settings.psr_frame_capture_indication_req;929 psr_config->psr_exit_link_training_required =930 !link->dpcd_caps.psr_info.psr_dpcd_caps.bits.LINK_TRAINING_ON_EXIT_NOT_REQUIRED;931}932 933void init_replay_config(struct dc_link *link, struct replay_config *pr_config)934{935 link->replay_settings.config = *pr_config;936}937 938bool mod_power_only_edp(const struct dc_state *context, const struct dc_stream_state *stream)939{940 return context && context->stream_count == 1 && dc_is_embedded_signal(stream->signal);941}942 943bool psr_su_set_dsc_slice_height(struct dc *dc, struct dc_link *link,944 struct dc_stream_state *stream,945 struct psr_config *config)946{947 uint16_t pic_height;948 uint16_t slice_height;949 950 config->dsc_slice_height = 0;951 if (!(link->connector_signal & SIGNAL_TYPE_EDP) ||952 !dc->caps.edp_dsc_support ||953 link->panel_config.dsc.disable_dsc_edp ||954 !link->dpcd_caps.dsc_caps.dsc_basic_caps.fields.dsc_support.DSC_SUPPORT ||955 !stream->timing.dsc_cfg.num_slices_v)956 return true;957 958 pic_height = stream->timing.v_addressable +959 stream->timing.v_border_top + stream->timing.v_border_bottom;960 961 if (stream->timing.dsc_cfg.num_slices_v == 0)962 return false;963 964 slice_height = pic_height / stream->timing.dsc_cfg.num_slices_v;965 config->dsc_slice_height = slice_height;966 967 if (slice_height) {968 if (config->su_y_granularity &&969 (slice_height % config->su_y_granularity)) {970 ASSERT(0);971 return false;972 }973 }974 975 return true;976}977 978void set_replay_defer_update_coasting_vtotal(struct dc_link *link,979 enum replay_coasting_vtotal_type type,980 uint32_t vtotal)981{982 link->replay_settings.defer_update_coasting_vtotal_table[type] = vtotal;983}984 985void update_replay_coasting_vtotal_from_defer(struct dc_link *link,986 enum replay_coasting_vtotal_type type)987{988 link->replay_settings.coasting_vtotal_table[type] =989 link->replay_settings.defer_update_coasting_vtotal_table[type];990}991 992void set_replay_coasting_vtotal(struct dc_link *link,993 enum replay_coasting_vtotal_type type,994 uint32_t vtotal)995{996 link->replay_settings.coasting_vtotal_table[type] = vtotal;997}998 999void set_replay_ips_full_screen_video_src_vtotal(struct dc_link *link, uint16_t vtotal)1000{1001 link->replay_settings.abm_with_ips_on_full_screen_video_pseudo_vtotal = vtotal;1002}1003 1004void calculate_replay_link_off_frame_count(struct dc_link *link,1005 uint16_t vtotal, uint16_t htotal)1006{1007 uint8_t max_link_off_frame_count = 0;1008 uint16_t max_deviation_line = 0, pixel_deviation_per_line = 0;1009 1010 max_deviation_line = link->dpcd_caps.pr_info.max_deviation_line;1011 pixel_deviation_per_line = link->dpcd_caps.pr_info.pixel_deviation_per_line;1012 1013 if (htotal != 0 && vtotal != 0 && pixel_deviation_per_line != 0)1014 max_link_off_frame_count = htotal * max_deviation_line / (pixel_deviation_per_line * vtotal);1015 else1016 ASSERT(0);1017 1018 link->replay_settings.link_off_frame_count = max_link_off_frame_count;1019}1020 1021bool fill_custom_backlight_caps(unsigned int config_no, struct dm_acpi_atif_backlight_caps *caps)1022{1023 unsigned int data_points_size;1024 1025 if (config_no >= ARRAY_SIZE(custom_backlight_profiles))1026 return false;1027 1028 data_points_size = custom_backlight_profiles[config_no].num_data_points1029 * sizeof(custom_backlight_profiles[config_no].data_points[0]);1030 1031 caps->size = sizeof(struct dm_acpi_atif_backlight_caps) - sizeof(caps->data_points) + data_points_size;1032 caps->flags = 0;1033 caps->error_code = 0;1034 caps->ac_level_percentage = custom_backlight_profiles[config_no].ac_level_percentage;1035 caps->dc_level_percentage = custom_backlight_profiles[config_no].dc_level_percentage;1036 caps->min_input_signal = custom_backlight_profiles[config_no].min_input_signal;1037 caps->max_input_signal = custom_backlight_profiles[config_no].max_input_signal;1038 caps->num_data_points = custom_backlight_profiles[config_no].num_data_points;1039 memcpy(caps->data_points, custom_backlight_profiles[config_no].data_points, data_points_size);1040 return true;1041}1042