856 lines · c
1/*2 * Copyright (C) 2019 Advanced Micro Devices, Inc.3 *4 * Permission is hereby granted, free of charge, to any person obtaining a5 * copy of this software and associated documentation files (the "Software"),6 * to deal in the Software without restriction, including without limitation7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,8 * and/or sell copies of the Software, and to permit persons to whom the9 * Software is furnished to do so, subject to the following conditions:10 *11 * The above copyright notice and this permission notice shall be included12 * in all copies or substantial portions of the Software.13 *14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL17 * THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN18 * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN19 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.20 */21#ifndef _navi10_ip_offset_HEADER22#define _navi10_ip_offset_HEADER23 24#define MAX_INSTANCE 625#define MAX_SEGMENT 626 27 28struct IP_BASE_INSTANCE {29 unsigned int segment[MAX_SEGMENT];30};31 32struct IP_BASE {33 struct IP_BASE_INSTANCE instance[MAX_INSTANCE];34} __maybe_unused;35 36 37static const struct IP_BASE ATHUB_BASE ={ { { { 0x00000C00, 0, 0, 0, 0, 0 } },38 { { 0, 0, 0, 0, 0, 0 } },39 { { 0, 0, 0, 0, 0, 0 } },40 { { 0, 0, 0, 0, 0, 0 } },41 { { 0, 0, 0, 0, 0, 0 } },42 { { 0, 0, 0, 0, 0, 0 } } } };43static const struct IP_BASE CLK_BASE ={ { { { 0x00016C00, 0x00016E00, 0x00017000, 0x00017200, 0x00017E00, 0x0001B000 } },44 { { 0, 0, 0, 0, 0, 0 } },45 { { 0, 0, 0, 0, 0, 0 } },46 { { 0, 0, 0, 0, 0, 0 } },47 { { 0, 0, 0, 0, 0, 0 } },48 { { 0, 0, 0, 0, 0, 0 } } } };49static const struct IP_BASE DF_BASE ={ { { { 0x00007000, 0, 0, 0, 0, 0 } },50 { { 0, 0, 0, 0, 0, 0 } },51 { { 0, 0, 0, 0, 0, 0 } },52 { { 0, 0, 0, 0, 0, 0 } },53 { { 0, 0, 0, 0, 0, 0 } },54 { { 0, 0, 0, 0, 0, 0 } } } };55static const struct IP_BASE DCN_BASE ={ { { { 0x00000012, 0x000000C0, 0x000034C0, 0x00009000, 0, 0 } },56 { { 0, 0, 0, 0, 0, 0 } },57 { { 0, 0, 0, 0, 0, 0 } },58 { { 0, 0, 0, 0, 0, 0 } },59 { { 0, 0, 0, 0, 0, 0 } },60 { { 0, 0, 0, 0, 0, 0 } } } };61static const struct IP_BASE FUSE_BASE ={ { { { 0x00017400, 0, 0, 0, 0, 0 } },62 { { 0, 0, 0, 0, 0, 0 } },63 { { 0, 0, 0, 0, 0, 0 } },64 { { 0, 0, 0, 0, 0, 0 } },65 { { 0, 0, 0, 0, 0, 0 } },66 { { 0, 0, 0, 0, 0, 0 } } } };67static const struct IP_BASE GC_BASE ={ { { { 0x00001260, 0x0000A000, 0, 0, 0, 0 } },68 { { 0, 0, 0, 0, 0, 0 } },69 { { 0, 0, 0, 0, 0, 0 } },70 { { 0, 0, 0, 0, 0, 0 } },71 { { 0, 0, 0, 0, 0, 0 } },72 { { 0, 0, 0, 0, 0, 0 } } } };73static const struct IP_BASE HDP_BASE ={ { { { 0x00000F20, 0, 0, 0, 0, 0 } },74 { { 0, 0, 0, 0, 0, 0 } },75 { { 0, 0, 0, 0, 0, 0 } },76 { { 0, 0, 0, 0, 0, 0 } },77 { { 0, 0, 0, 0, 0, 0 } },78 { { 0, 0, 0, 0, 0, 0 } } } };79static const struct IP_BASE MMHUB_BASE ={ { { { 0x0001A000, 0, 0, 0, 0, 0 } },80 { { 0, 0, 0, 0, 0, 0 } },81 { { 0, 0, 0, 0, 0, 0 } },82 { { 0, 0, 0, 0, 0, 0 } },83 { { 0, 0, 0, 0, 0, 0 } },84 { { 0, 0, 0, 0, 0, 0 } } } };85static const struct IP_BASE MP0_BASE ={ { { { 0x00016000, 0, 0, 0, 0, 0 } },86 { { 0, 0, 0, 0, 0, 0 } },87 { { 0, 0, 0, 0, 0, 0 } },88 { { 0, 0, 0, 0, 0, 0 } },89 { { 0, 0, 0, 0, 0, 0 } },90 { { 0, 0, 0, 0, 0, 0 } } } };91static const struct IP_BASE MP1_BASE ={ { { { 0x00016000, 0, 0, 0, 0, 0 } },92 { { 0, 0, 0, 0, 0, 0 } },93 { { 0, 0, 0, 0, 0, 0 } },94 { { 0, 0, 0, 0, 0, 0 } },95 { { 0, 0, 0, 0, 0, 0 } },96 { { 0, 0, 0, 0, 0, 0 } } } };97static const struct IP_BASE NBIO_BASE ={ { { { 0x00000000, 0x00000014, 0x00000D20, 0x00010400, 0, 0 } },98 { { 0, 0, 0, 0, 0, 0 } },99 { { 0, 0, 0, 0, 0, 0 } },100 { { 0, 0, 0, 0, 0, 0 } },101 { { 0, 0, 0, 0, 0, 0 } },102 { { 0, 0, 0, 0, 0, 0 } } } };103static const struct IP_BASE OSSSYS_BASE ={ { { { 0x000010A0, 0, 0, 0, 0, 0 } },104 { { 0, 0, 0, 0, 0, 0 } },105 { { 0, 0, 0, 0, 0, 0 } },106 { { 0, 0, 0, 0, 0, 0 } },107 { { 0, 0, 0, 0, 0, 0 } },108 { { 0, 0, 0, 0, 0, 0 } } } };109static const struct IP_BASE RSMU_BASE = { { { { 0x00012000, 0, 0, 0, 0, 0 } },110 { { 0, 0, 0, 0, 0, 0 } },111 { { 0, 0, 0, 0, 0, 0 } },112 { { 0, 0, 0, 0, 0, 0 } },113 { { 0, 0, 0, 0, 0, 0 } },114 { { 0, 0, 0, 0, 0, 0 } } } };115static const struct IP_BASE SMUIO_BASE ={ { { { 0x00016800, 0x00016A00, 0, 0, 0, 0 } },116 { { 0, 0, 0, 0, 0, 0 } },117 { { 0, 0, 0, 0, 0, 0 } },118 { { 0, 0, 0, 0, 0, 0 } },119 { { 0, 0, 0, 0, 0, 0 } },120 { { 0, 0, 0, 0, 0, 0 } } } };121static const struct IP_BASE THM_BASE ={ { { { 0x00016600, 0, 0, 0, 0, 0 } },122 { { 0, 0, 0, 0, 0, 0 } },123 { { 0, 0, 0, 0, 0, 0 } },124 { { 0, 0, 0, 0, 0, 0 } },125 { { 0, 0, 0, 0, 0, 0 } },126 { { 0, 0, 0, 0, 0, 0 } } } };127static const struct IP_BASE UMC_BASE ={ { { { 0x00014000, 0, 0, 0, 0, 0 } },128 { { 0, 0, 0, 0, 0, 0 } },129 { { 0, 0, 0, 0, 0, 0 } },130 { { 0, 0, 0, 0, 0, 0 } },131 { { 0, 0, 0, 0, 0, 0 } },132 { { 0, 0, 0, 0, 0, 0 } } } };133static const struct IP_BASE VCN_BASE ={ { { { 0x00007800, 0x00007E00, 0, 0, 0, 0 } },134 { { 0, 0, 0, 0, 0, 0 } },135 { { 0, 0, 0, 0, 0, 0 } },136 { { 0, 0, 0, 0, 0, 0 } },137 { { 0, 0, 0, 0, 0, 0 } },138 { { 0, 0, 0, 0, 0, 0 } } } };139 140 141#define ATHUB_BASE__INST0_SEG0 0x00000C00142#define ATHUB_BASE__INST0_SEG1 0143#define ATHUB_BASE__INST0_SEG2 0144#define ATHUB_BASE__INST0_SEG3 0145#define ATHUB_BASE__INST0_SEG4 0146#define ATHUB_BASE__INST0_SEG5 0147 148#define ATHUB_BASE__INST1_SEG0 0149#define ATHUB_BASE__INST1_SEG1 0150#define ATHUB_BASE__INST1_SEG2 0151#define ATHUB_BASE__INST1_SEG3 0152#define ATHUB_BASE__INST1_SEG4 0153#define ATHUB_BASE__INST1_SEG5 0154 155#define ATHUB_BASE__INST2_SEG0 0156#define ATHUB_BASE__INST2_SEG1 0157#define ATHUB_BASE__INST2_SEG2 0158#define ATHUB_BASE__INST2_SEG3 0159#define ATHUB_BASE__INST2_SEG4 0160#define ATHUB_BASE__INST2_SEG5 0161 162#define ATHUB_BASE__INST3_SEG0 0163#define ATHUB_BASE__INST3_SEG1 0164#define ATHUB_BASE__INST3_SEG2 0165#define ATHUB_BASE__INST3_SEG3 0166#define ATHUB_BASE__INST3_SEG4 0167#define ATHUB_BASE__INST3_SEG5 0168 169#define ATHUB_BASE__INST4_SEG0 0170#define ATHUB_BASE__INST4_SEG1 0171#define ATHUB_BASE__INST4_SEG2 0172#define ATHUB_BASE__INST4_SEG3 0173#define ATHUB_BASE__INST4_SEG4 0174#define ATHUB_BASE__INST4_SEG5 0175 176#define ATHUB_BASE__INST5_SEG0 0177#define ATHUB_BASE__INST5_SEG1 0178#define ATHUB_BASE__INST5_SEG2 0179#define ATHUB_BASE__INST5_SEG3 0180#define ATHUB_BASE__INST5_SEG4 0181#define ATHUB_BASE__INST5_SEG5 0182 183#define CLK_BASE__INST0_SEG0 0x00016C00184#define CLK_BASE__INST0_SEG1 0x00016E00185#define CLK_BASE__INST0_SEG2 0x00017000186#define CLK_BASE__INST0_SEG3 0x00017200187#define CLK_BASE__INST0_SEG4 0x00017E00188#define CLK_BASE__INST0_SEG5 0x0001B000189 190#define CLK_BASE__INST1_SEG0 0191#define CLK_BASE__INST1_SEG1 0192#define CLK_BASE__INST1_SEG2 0193#define CLK_BASE__INST1_SEG3 0194#define CLK_BASE__INST1_SEG4 0195#define CLK_BASE__INST1_SEG5 0196 197#define CLK_BASE__INST2_SEG0 0198#define CLK_BASE__INST2_SEG1 0199#define CLK_BASE__INST2_SEG2 0200#define CLK_BASE__INST2_SEG3 0201#define CLK_BASE__INST2_SEG4 0202#define CLK_BASE__INST2_SEG5 0203 204#define CLK_BASE__INST3_SEG0 0205#define CLK_BASE__INST3_SEG1 0206#define CLK_BASE__INST3_SEG2 0207#define CLK_BASE__INST3_SEG3 0208#define CLK_BASE__INST3_SEG4 0209#define CLK_BASE__INST3_SEG5 0210 211#define CLK_BASE__INST4_SEG0 0212#define CLK_BASE__INST4_SEG1 0213#define CLK_BASE__INST4_SEG2 0214#define CLK_BASE__INST4_SEG3 0215#define CLK_BASE__INST4_SEG4 0216#define CLK_BASE__INST4_SEG5 0217 218#define CLK_BASE__INST5_SEG0 0219#define CLK_BASE__INST5_SEG1 0220#define CLK_BASE__INST5_SEG2 0221#define CLK_BASE__INST5_SEG3 0222#define CLK_BASE__INST5_SEG4 0223#define CLK_BASE__INST5_SEG5 0224 225#define DF_BASE__INST0_SEG0 0x00007000226#define DF_BASE__INST0_SEG1 0227#define DF_BASE__INST0_SEG2 0228#define DF_BASE__INST0_SEG3 0229#define DF_BASE__INST0_SEG4 0230#define DF_BASE__INST0_SEG5 0231 232#define DF_BASE__INST1_SEG0 0233#define DF_BASE__INST1_SEG1 0234#define DF_BASE__INST1_SEG2 0235#define DF_BASE__INST1_SEG3 0236#define DF_BASE__INST1_SEG4 0237#define DF_BASE__INST1_SEG5 0238 239#define DF_BASE__INST2_SEG0 0240#define DF_BASE__INST2_SEG1 0241#define DF_BASE__INST2_SEG2 0242#define DF_BASE__INST2_SEG3 0243#define DF_BASE__INST2_SEG4 0244#define DF_BASE__INST2_SEG5 0245 246#define DF_BASE__INST3_SEG0 0247#define DF_BASE__INST3_SEG1 0248#define DF_BASE__INST3_SEG2 0249#define DF_BASE__INST3_SEG3 0250#define DF_BASE__INST3_SEG4 0251#define DF_BASE__INST3_SEG5 0252 253#define DF_BASE__INST4_SEG0 0254#define DF_BASE__INST4_SEG1 0255#define DF_BASE__INST4_SEG2 0256#define DF_BASE__INST4_SEG3 0257#define DF_BASE__INST4_SEG4 0258#define DF_BASE__INST4_SEG5 0259 260#define DF_BASE__INST5_SEG0 0261#define DF_BASE__INST5_SEG1 0262#define DF_BASE__INST5_SEG2 0263#define DF_BASE__INST5_SEG3 0264#define DF_BASE__INST5_SEG4 0265#define DF_BASE__INST5_SEG5 0266 267#define DCN_BASE__INST0_SEG0 0x00000012268#define DCN_BASE__INST0_SEG1 0x000000C0269#define DCN_BASE__INST0_SEG2 0x000034C0270#define DCN_BASE__INST0_SEG3 0x00009000271#define DCN_BASE__INST0_SEG4 0272#define DCN_BASE__INST0_SEG5 0273 274#define DCN_BASE__INST1_SEG0 0275#define DCN_BASE__INST1_SEG1 0276#define DCN_BASE__INST1_SEG2 0277#define DCN_BASE__INST1_SEG3 0278#define DCN_BASE__INST1_SEG4 0279#define DCN_BASE__INST1_SEG5 0280 281#define DCN_BASE__INST2_SEG0 0282#define DCN_BASE__INST2_SEG1 0283#define DCN_BASE__INST2_SEG2 0284#define DCN_BASE__INST2_SEG3 0285#define DCN_BASE__INST2_SEG4 0286#define DCN_BASE__INST2_SEG5 0287 288#define DCN_BASE__INST3_SEG0 0289#define DCN_BASE__INST3_SEG1 0290#define DCN_BASE__INST3_SEG2 0291#define DCN_BASE__INST3_SEG3 0292#define DCN_BASE__INST3_SEG4 0293#define DCN_BASE__INST3_SEG5 0294 295#define DCN_BASE__INST4_SEG0 0296#define DCN_BASE__INST4_SEG1 0297#define DCN_BASE__INST4_SEG2 0298#define DCN_BASE__INST4_SEG3 0299#define DCN_BASE__INST4_SEG4 0300#define DCN_BASE__INST4_SEG5 0301 302#define DCN_BASE__INST5_SEG0 0303#define DCN_BASE__INST5_SEG1 0304#define DCN_BASE__INST5_SEG2 0305#define DCN_BASE__INST5_SEG3 0306#define DCN_BASE__INST5_SEG4 0307#define DCN_BASE__INST5_SEG5 0308 309#define FUSE_BASE__INST0_SEG0 0x00017400310#define FUSE_BASE__INST0_SEG1 0311#define FUSE_BASE__INST0_SEG2 0312#define FUSE_BASE__INST0_SEG3 0313#define FUSE_BASE__INST0_SEG4 0314#define FUSE_BASE__INST0_SEG5 0315 316#define FUSE_BASE__INST1_SEG0 0317#define FUSE_BASE__INST1_SEG1 0318#define FUSE_BASE__INST1_SEG2 0319#define FUSE_BASE__INST1_SEG3 0320#define FUSE_BASE__INST1_SEG4 0321#define FUSE_BASE__INST1_SEG5 0322 323#define FUSE_BASE__INST2_SEG0 0324#define FUSE_BASE__INST2_SEG1 0325#define FUSE_BASE__INST2_SEG2 0326#define FUSE_BASE__INST2_SEG3 0327#define FUSE_BASE__INST2_SEG4 0328#define FUSE_BASE__INST2_SEG5 0329 330#define FUSE_BASE__INST3_SEG0 0331#define FUSE_BASE__INST3_SEG1 0332#define FUSE_BASE__INST3_SEG2 0333#define FUSE_BASE__INST3_SEG3 0334#define FUSE_BASE__INST3_SEG4 0335#define FUSE_BASE__INST3_SEG5 0336 337#define FUSE_BASE__INST4_SEG0 0338#define FUSE_BASE__INST4_SEG1 0339#define FUSE_BASE__INST4_SEG2 0340#define FUSE_BASE__INST4_SEG3 0341#define FUSE_BASE__INST4_SEG4 0342#define FUSE_BASE__INST4_SEG5 0343 344#define FUSE_BASE__INST5_SEG0 0345#define FUSE_BASE__INST5_SEG1 0346#define FUSE_BASE__INST5_SEG2 0347#define FUSE_BASE__INST5_SEG3 0348#define FUSE_BASE__INST5_SEG4 0349#define FUSE_BASE__INST5_SEG5 0350 351#define GC_BASE__INST0_SEG0 0x00001260352#define GC_BASE__INST0_SEG1 0x0000A000353#define GC_BASE__INST0_SEG2 0354#define GC_BASE__INST0_SEG3 0355#define GC_BASE__INST0_SEG4 0356#define GC_BASE__INST0_SEG5 0357 358#define GC_BASE__INST1_SEG0 0359#define GC_BASE__INST1_SEG1 0360#define GC_BASE__INST1_SEG2 0361#define GC_BASE__INST1_SEG3 0362#define GC_BASE__INST1_SEG4 0363#define GC_BASE__INST1_SEG5 0364 365#define GC_BASE__INST2_SEG0 0366#define GC_BASE__INST2_SEG1 0367#define GC_BASE__INST2_SEG2 0368#define GC_BASE__INST2_SEG3 0369#define GC_BASE__INST2_SEG4 0370#define GC_BASE__INST2_SEG5 0371 372#define GC_BASE__INST3_SEG0 0373#define GC_BASE__INST3_SEG1 0374#define GC_BASE__INST3_SEG2 0375#define GC_BASE__INST3_SEG3 0376#define GC_BASE__INST3_SEG4 0377#define GC_BASE__INST3_SEG5 0378 379#define GC_BASE__INST4_SEG0 0380#define GC_BASE__INST4_SEG1 0381#define GC_BASE__INST4_SEG2 0382#define GC_BASE__INST4_SEG3 0383#define GC_BASE__INST4_SEG4 0384#define GC_BASE__INST4_SEG5 0385 386#define GC_BASE__INST5_SEG0 0387#define GC_BASE__INST5_SEG1 0388#define GC_BASE__INST5_SEG2 0389#define GC_BASE__INST5_SEG3 0390#define GC_BASE__INST5_SEG4 0391#define GC_BASE__INST5_SEG5 0392 393#define HDP_BASE__INST0_SEG0 0x00000F20394#define HDP_BASE__INST0_SEG1 0395#define HDP_BASE__INST0_SEG2 0396#define HDP_BASE__INST0_SEG3 0397#define HDP_BASE__INST0_SEG4 0398#define HDP_BASE__INST0_SEG5 0399 400#define HDP_BASE__INST1_SEG0 0401#define HDP_BASE__INST1_SEG1 0402#define HDP_BASE__INST1_SEG2 0403#define HDP_BASE__INST1_SEG3 0404#define HDP_BASE__INST1_SEG4 0405#define HDP_BASE__INST1_SEG5 0406 407#define HDP_BASE__INST2_SEG0 0408#define HDP_BASE__INST2_SEG1 0409#define HDP_BASE__INST2_SEG2 0410#define HDP_BASE__INST2_SEG3 0411#define HDP_BASE__INST2_SEG4 0412#define HDP_BASE__INST2_SEG5 0413 414#define HDP_BASE__INST3_SEG0 0415#define HDP_BASE__INST3_SEG1 0416#define HDP_BASE__INST3_SEG2 0417#define HDP_BASE__INST3_SEG3 0418#define HDP_BASE__INST3_SEG4 0419#define HDP_BASE__INST3_SEG5 0420 421#define HDP_BASE__INST4_SEG0 0422#define HDP_BASE__INST4_SEG1 0423#define HDP_BASE__INST4_SEG2 0424#define HDP_BASE__INST4_SEG3 0425#define HDP_BASE__INST4_SEG4 0426#define HDP_BASE__INST4_SEG5 0427 428#define HDP_BASE__INST5_SEG0 0429#define HDP_BASE__INST5_SEG1 0430#define HDP_BASE__INST5_SEG2 0431#define HDP_BASE__INST5_SEG3 0432#define HDP_BASE__INST5_SEG4 0433#define HDP_BASE__INST5_SEG5 0434 435#define MMHUB_BASE__INST0_SEG0 0x0001A000436#define MMHUB_BASE__INST0_SEG1 0437#define MMHUB_BASE__INST0_SEG2 0438#define MMHUB_BASE__INST0_SEG3 0439#define MMHUB_BASE__INST0_SEG4 0440#define MMHUB_BASE__INST0_SEG5 0441 442#define MMHUB_BASE__INST1_SEG0 0443#define MMHUB_BASE__INST1_SEG1 0444#define MMHUB_BASE__INST1_SEG2 0445#define MMHUB_BASE__INST1_SEG3 0446#define MMHUB_BASE__INST1_SEG4 0447#define MMHUB_BASE__INST1_SEG5 0448 449#define MMHUB_BASE__INST2_SEG0 0450#define MMHUB_BASE__INST2_SEG1 0451#define MMHUB_BASE__INST2_SEG2 0452#define MMHUB_BASE__INST2_SEG3 0453#define MMHUB_BASE__INST2_SEG4 0454#define MMHUB_BASE__INST2_SEG5 0455 456#define MMHUB_BASE__INST3_SEG0 0457#define MMHUB_BASE__INST3_SEG1 0458#define MMHUB_BASE__INST3_SEG2 0459#define MMHUB_BASE__INST3_SEG3 0460#define MMHUB_BASE__INST3_SEG4 0461#define MMHUB_BASE__INST3_SEG5 0462 463#define MMHUB_BASE__INST4_SEG0 0464#define MMHUB_BASE__INST4_SEG1 0465#define MMHUB_BASE__INST4_SEG2 0466#define MMHUB_BASE__INST4_SEG3 0467#define MMHUB_BASE__INST4_SEG4 0468#define MMHUB_BASE__INST4_SEG5 0469 470#define MMHUB_BASE__INST5_SEG0 0471#define MMHUB_BASE__INST5_SEG1 0472#define MMHUB_BASE__INST5_SEG2 0473#define MMHUB_BASE__INST5_SEG3 0474#define MMHUB_BASE__INST5_SEG4 0475#define MMHUB_BASE__INST5_SEG5 0476 477#define MP0_BASE__INST0_SEG0 0x00016000478#define MP0_BASE__INST0_SEG1 0479#define MP0_BASE__INST0_SEG2 0480#define MP0_BASE__INST0_SEG3 0481#define MP0_BASE__INST0_SEG4 0482#define MP0_BASE__INST0_SEG5 0483 484#define MP0_BASE__INST1_SEG0 0485#define MP0_BASE__INST1_SEG1 0486#define MP0_BASE__INST1_SEG2 0487#define MP0_BASE__INST1_SEG3 0488#define MP0_BASE__INST1_SEG4 0489#define MP0_BASE__INST1_SEG5 0490 491#define MP0_BASE__INST2_SEG0 0492#define MP0_BASE__INST2_SEG1 0493#define MP0_BASE__INST2_SEG2 0494#define MP0_BASE__INST2_SEG3 0495#define MP0_BASE__INST2_SEG4 0496#define MP0_BASE__INST2_SEG5 0497 498#define MP0_BASE__INST3_SEG0 0499#define MP0_BASE__INST3_SEG1 0500#define MP0_BASE__INST3_SEG2 0501#define MP0_BASE__INST3_SEG3 0502#define MP0_BASE__INST3_SEG4 0503#define MP0_BASE__INST3_SEG5 0504 505#define MP0_BASE__INST4_SEG0 0506#define MP0_BASE__INST4_SEG1 0507#define MP0_BASE__INST4_SEG2 0508#define MP0_BASE__INST4_SEG3 0509#define MP0_BASE__INST4_SEG4 0510#define MP0_BASE__INST4_SEG5 0511 512#define MP0_BASE__INST5_SEG0 0513#define MP0_BASE__INST5_SEG1 0514#define MP0_BASE__INST5_SEG2 0515#define MP0_BASE__INST5_SEG3 0516#define MP0_BASE__INST5_SEG4 0517#define MP0_BASE__INST5_SEG5 0518 519#define MP1_BASE__INST0_SEG0 0x00016000520#define MP1_BASE__INST0_SEG1 0521#define MP1_BASE__INST0_SEG2 0522#define MP1_BASE__INST0_SEG3 0523#define MP1_BASE__INST0_SEG4 0524#define MP1_BASE__INST0_SEG5 0525 526#define MP1_BASE__INST1_SEG0 0527#define MP1_BASE__INST1_SEG1 0528#define MP1_BASE__INST1_SEG2 0529#define MP1_BASE__INST1_SEG3 0530#define MP1_BASE__INST1_SEG4 0531#define MP1_BASE__INST1_SEG5 0532 533#define MP1_BASE__INST2_SEG0 0534#define MP1_BASE__INST2_SEG1 0535#define MP1_BASE__INST2_SEG2 0536#define MP1_BASE__INST2_SEG3 0537#define MP1_BASE__INST2_SEG4 0538#define MP1_BASE__INST2_SEG5 0539 540#define MP1_BASE__INST3_SEG0 0541#define MP1_BASE__INST3_SEG1 0542#define MP1_BASE__INST3_SEG2 0543#define MP1_BASE__INST3_SEG3 0544#define MP1_BASE__INST3_SEG4 0545#define MP1_BASE__INST3_SEG5 0546 547#define MP1_BASE__INST4_SEG0 0548#define MP1_BASE__INST4_SEG1 0549#define MP1_BASE__INST4_SEG2 0550#define MP1_BASE__INST4_SEG3 0551#define MP1_BASE__INST4_SEG4 0552#define MP1_BASE__INST4_SEG5 0553 554#define MP1_BASE__INST5_SEG0 0555#define MP1_BASE__INST5_SEG1 0556#define MP1_BASE__INST5_SEG2 0557#define MP1_BASE__INST5_SEG3 0558#define MP1_BASE__INST5_SEG4 0559#define MP1_BASE__INST5_SEG5 0560 561#define NBIO_BASE__INST0_SEG0 0x00000000562#define NBIO_BASE__INST0_SEG1 0x00000014563#define NBIO_BASE__INST0_SEG2 0x00000D20564#define NBIO_BASE__INST0_SEG3 0x00010400565#define NBIO_BASE__INST0_SEG4 0566#define NBIO_BASE__INST0_SEG5 0567 568#define NBIO_BASE__INST1_SEG0 0569#define NBIO_BASE__INST1_SEG1 0570#define NBIO_BASE__INST1_SEG2 0571#define NBIO_BASE__INST1_SEG3 0572#define NBIO_BASE__INST1_SEG4 0573#define NBIO_BASE__INST1_SEG5 0574 575#define NBIO_BASE__INST2_SEG0 0576#define NBIO_BASE__INST2_SEG1 0577#define NBIO_BASE__INST2_SEG2 0578#define NBIO_BASE__INST2_SEG3 0579#define NBIO_BASE__INST2_SEG4 0580#define NBIO_BASE__INST2_SEG5 0581 582#define NBIO_BASE__INST3_SEG0 0583#define NBIO_BASE__INST3_SEG1 0584#define NBIO_BASE__INST3_SEG2 0585#define NBIO_BASE__INST3_SEG3 0586#define NBIO_BASE__INST3_SEG4 0587#define NBIO_BASE__INST3_SEG5 0588 589#define NBIO_BASE__INST4_SEG0 0590#define NBIO_BASE__INST4_SEG1 0591#define NBIO_BASE__INST4_SEG2 0592#define NBIO_BASE__INST4_SEG3 0593#define NBIO_BASE__INST4_SEG4 0594#define NBIO_BASE__INST4_SEG5 0595 596#define NBIO_BASE__INST5_SEG0 0597#define NBIO_BASE__INST5_SEG1 0598#define NBIO_BASE__INST5_SEG2 0599#define NBIO_BASE__INST5_SEG3 0600#define NBIO_BASE__INST5_SEG4 0601#define NBIO_BASE__INST5_SEG5 0602 603#define OSSSYS_BASE__INST0_SEG0 0x000010A0604#define OSSSYS_BASE__INST0_SEG1 0605#define OSSSYS_BASE__INST0_SEG2 0606#define OSSSYS_BASE__INST0_SEG3 0607#define OSSSYS_BASE__INST0_SEG4 0608#define OSSSYS_BASE__INST0_SEG5 0609 610#define OSSSYS_BASE__INST1_SEG0 0611#define OSSSYS_BASE__INST1_SEG1 0612#define OSSSYS_BASE__INST1_SEG2 0613#define OSSSYS_BASE__INST1_SEG3 0614#define OSSSYS_BASE__INST1_SEG4 0615#define OSSSYS_BASE__INST1_SEG5 0616 617#define OSSSYS_BASE__INST2_SEG0 0618#define OSSSYS_BASE__INST2_SEG1 0619#define OSSSYS_BASE__INST2_SEG2 0620#define OSSSYS_BASE__INST2_SEG3 0621#define OSSSYS_BASE__INST2_SEG4 0622#define OSSSYS_BASE__INST2_SEG5 0623 624#define OSSSYS_BASE__INST3_SEG0 0625#define OSSSYS_BASE__INST3_SEG1 0626#define OSSSYS_BASE__INST3_SEG2 0627#define OSSSYS_BASE__INST3_SEG3 0628#define OSSSYS_BASE__INST3_SEG4 0629#define OSSSYS_BASE__INST3_SEG5 0630 631#define OSSSYS_BASE__INST4_SEG0 0632#define OSSSYS_BASE__INST4_SEG1 0633#define OSSSYS_BASE__INST4_SEG2 0634#define OSSSYS_BASE__INST4_SEG3 0635#define OSSSYS_BASE__INST4_SEG4 0636#define OSSSYS_BASE__INST4_SEG5 0637 638#define OSSSYS_BASE__INST5_SEG0 0639#define OSSSYS_BASE__INST5_SEG1 0640#define OSSSYS_BASE__INST5_SEG2 0641#define OSSSYS_BASE__INST5_SEG3 0642#define OSSSYS_BASE__INST5_SEG4 0643#define OSSSYS_BASE__INST5_SEG5 0644 645#define RSMU_BASE__INST0_SEG0 0x00012000646#define RSMU_BASE__INST0_SEG1 0647#define RSMU_BASE__INST0_SEG2 0648#define RSMU_BASE__INST0_SEG3 0649#define RSMU_BASE__INST0_SEG4 0650#define RSMU_BASE__INST0_SEG5 0651 652#define RSMU_BASE__INST1_SEG0 0653#define RSMU_BASE__INST1_SEG1 0654#define RSMU_BASE__INST1_SEG2 0655#define RSMU_BASE__INST1_SEG3 0656#define RSMU_BASE__INST1_SEG4 0657#define RSMU_BASE__INST1_SEG5 0658 659#define RSMU_BASE__INST2_SEG0 0660#define RSMU_BASE__INST2_SEG1 0661#define RSMU_BASE__INST2_SEG2 0662#define RSMU_BASE__INST2_SEG3 0663#define RSMU_BASE__INST2_SEG4 0664#define RSMU_BASE__INST2_SEG5 0665 666#define RSMU_BASE__INST3_SEG0 0667#define RSMU_BASE__INST3_SEG1 0668#define RSMU_BASE__INST3_SEG2 0669#define RSMU_BASE__INST3_SEG3 0670#define RSMU_BASE__INST3_SEG4 0671#define RSMU_BASE__INST3_SEG5 0672 673#define RSMU_BASE__INST4_SEG0 0674#define RSMU_BASE__INST4_SEG1 0675#define RSMU_BASE__INST4_SEG2 0676#define RSMU_BASE__INST4_SEG3 0677#define RSMU_BASE__INST4_SEG4 0678#define RSMU_BASE__INST4_SEG5 0679 680#define RSMU_BASE__INST5_SEG0 0681#define RSMU_BASE__INST5_SEG1 0682#define RSMU_BASE__INST5_SEG2 0683#define RSMU_BASE__INST5_SEG3 0684#define RSMU_BASE__INST5_SEG4 0685#define RSMU_BASE__INST5_SEG5 0686 687#define SMUIO_BASE__INST0_SEG0 0x00016800688#define SMUIO_BASE__INST0_SEG1 0x00016A00689#define SMUIO_BASE__INST0_SEG2 0690#define SMUIO_BASE__INST0_SEG3 0691#define SMUIO_BASE__INST0_SEG4 0692#define SMUIO_BASE__INST0_SEG5 0693 694#define SMUIO_BASE__INST1_SEG0 0695#define SMUIO_BASE__INST1_SEG1 0696#define SMUIO_BASE__INST1_SEG2 0697#define SMUIO_BASE__INST1_SEG3 0698#define SMUIO_BASE__INST1_SEG4 0699#define SMUIO_BASE__INST1_SEG5 0700 701#define SMUIO_BASE__INST2_SEG0 0702#define SMUIO_BASE__INST2_SEG1 0703#define SMUIO_BASE__INST2_SEG2 0704#define SMUIO_BASE__INST2_SEG3 0705#define SMUIO_BASE__INST2_SEG4 0706#define SMUIO_BASE__INST2_SEG5 0707 708#define SMUIO_BASE__INST3_SEG0 0709#define SMUIO_BASE__INST3_SEG1 0710#define SMUIO_BASE__INST3_SEG2 0711#define SMUIO_BASE__INST3_SEG3 0712#define SMUIO_BASE__INST3_SEG4 0713#define SMUIO_BASE__INST3_SEG5 0714 715#define SMUIO_BASE__INST4_SEG0 0716#define SMUIO_BASE__INST4_SEG1 0717#define SMUIO_BASE__INST4_SEG2 0718#define SMUIO_BASE__INST4_SEG3 0719#define SMUIO_BASE__INST4_SEG4 0720#define SMUIO_BASE__INST4_SEG5 0721 722#define SMUIO_BASE__INST5_SEG0 0723#define SMUIO_BASE__INST5_SEG1 0724#define SMUIO_BASE__INST5_SEG2 0725#define SMUIO_BASE__INST5_SEG3 0726#define SMUIO_BASE__INST5_SEG4 0727#define SMUIO_BASE__INST5_SEG5 0728 729#define THM_BASE__INST0_SEG0 0x00016600730#define THM_BASE__INST0_SEG1 0731#define THM_BASE__INST0_SEG2 0732#define THM_BASE__INST0_SEG3 0733#define THM_BASE__INST0_SEG4 0734#define THM_BASE__INST0_SEG5 0735 736#define THM_BASE__INST1_SEG0 0737#define THM_BASE__INST1_SEG1 0738#define THM_BASE__INST1_SEG2 0739#define THM_BASE__INST1_SEG3 0740#define THM_BASE__INST1_SEG4 0741#define THM_BASE__INST1_SEG5 0742 743#define THM_BASE__INST2_SEG0 0744#define THM_BASE__INST2_SEG1 0745#define THM_BASE__INST2_SEG2 0746#define THM_BASE__INST2_SEG3 0747#define THM_BASE__INST2_SEG4 0748#define THM_BASE__INST2_SEG5 0749 750#define THM_BASE__INST3_SEG0 0751#define THM_BASE__INST3_SEG1 0752#define THM_BASE__INST3_SEG2 0753#define THM_BASE__INST3_SEG3 0754#define THM_BASE__INST3_SEG4 0755#define THM_BASE__INST3_SEG5 0756 757#define THM_BASE__INST4_SEG0 0758#define THM_BASE__INST4_SEG1 0759#define THM_BASE__INST4_SEG2 0760#define THM_BASE__INST4_SEG3 0761#define THM_BASE__INST4_SEG4 0762#define THM_BASE__INST4_SEG5 0763 764#define THM_BASE__INST5_SEG0 0765#define THM_BASE__INST5_SEG1 0766#define THM_BASE__INST5_SEG2 0767#define THM_BASE__INST5_SEG3 0768#define THM_BASE__INST5_SEG4 0769#define THM_BASE__INST5_SEG5 0770 771#define UMC_BASE__INST0_SEG0 0x00014000772#define UMC_BASE__INST0_SEG1 0773#define UMC_BASE__INST0_SEG2 0774#define UMC_BASE__INST0_SEG3 0775#define UMC_BASE__INST0_SEG4 0776#define UMC_BASE__INST0_SEG5 0777 778#define UMC_BASE__INST1_SEG0 0779#define UMC_BASE__INST1_SEG1 0780#define UMC_BASE__INST1_SEG2 0781#define UMC_BASE__INST1_SEG3 0782#define UMC_BASE__INST1_SEG4 0783#define UMC_BASE__INST1_SEG5 0784 785#define UMC_BASE__INST2_SEG0 0786#define UMC_BASE__INST2_SEG1 0787#define UMC_BASE__INST2_SEG2 0788#define UMC_BASE__INST2_SEG3 0789#define UMC_BASE__INST2_SEG4 0790#define UMC_BASE__INST2_SEG5 0791 792#define UMC_BASE__INST3_SEG0 0793#define UMC_BASE__INST3_SEG1 0794#define UMC_BASE__INST3_SEG2 0795#define UMC_BASE__INST3_SEG3 0796#define UMC_BASE__INST3_SEG4 0797#define UMC_BASE__INST3_SEG5 0798 799#define UMC_BASE__INST4_SEG0 0800#define UMC_BASE__INST4_SEG1 0801#define UMC_BASE__INST4_SEG2 0802#define UMC_BASE__INST4_SEG3 0803#define UMC_BASE__INST4_SEG4 0804#define UMC_BASE__INST4_SEG5 0805 806#define UMC_BASE__INST5_SEG0 0807#define UMC_BASE__INST5_SEG1 0808#define UMC_BASE__INST5_SEG2 0809#define UMC_BASE__INST5_SEG3 0810#define UMC_BASE__INST5_SEG4 0811#define UMC_BASE__INST5_SEG5 0812 813#define VCN_BASE__INST0_SEG0 0x00007800814#define VCN_BASE__INST0_SEG1 0x00007E00815#define VCN_BASE__INST0_SEG2 0816#define VCN_BASE__INST0_SEG3 0817#define VCN_BASE__INST0_SEG4 0818#define VCN_BASE__INST0_SEG5 0819 820#define VCN_BASE__INST1_SEG0 0821#define VCN_BASE__INST1_SEG1 0822#define VCN_BASE__INST1_SEG2 0823#define VCN_BASE__INST1_SEG3 0824#define VCN_BASE__INST1_SEG4 0825#define VCN_BASE__INST1_SEG5 0826 827#define VCN_BASE__INST2_SEG0 0828#define VCN_BASE__INST2_SEG1 0829#define VCN_BASE__INST2_SEG2 0830#define VCN_BASE__INST2_SEG3 0831#define VCN_BASE__INST2_SEG4 0832#define VCN_BASE__INST2_SEG5 0833 834#define VCN_BASE__INST3_SEG0 0835#define VCN_BASE__INST3_SEG1 0836#define VCN_BASE__INST3_SEG2 0837#define VCN_BASE__INST3_SEG3 0838#define VCN_BASE__INST3_SEG4 0839#define VCN_BASE__INST3_SEG5 0840 841#define VCN_BASE__INST4_SEG0 0842#define VCN_BASE__INST4_SEG1 0843#define VCN_BASE__INST4_SEG2 0844#define VCN_BASE__INST4_SEG3 0845#define VCN_BASE__INST4_SEG4 0846#define VCN_BASE__INST4_SEG5 0847 848#define VCN_BASE__INST5_SEG0 0849#define VCN_BASE__INST5_SEG1 0850#define VCN_BASE__INST5_SEG2 0851#define VCN_BASE__INST5_SEG3 0852#define VCN_BASE__INST5_SEG4 0853#define VCN_BASE__INST5_SEG5 0854 855#endif856