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1// SPDX-License-Identifier: GPL-2.02// Copyright (c) 2021, ASPEED Technology Inc.3// Authors: KuoHsiang Chou <kuohsiang_chou@aspeedtech.com>4 5#include <linux/firmware.h>6#include <linux/delay.h>7 8#include <drm/drm_atomic_state_helper.h>9#include <drm/drm_edid.h>10#include <drm/drm_modeset_helper_vtables.h>11#include <drm/drm_print.h>12#include <drm/drm_probe_helper.h>13 14#include "ast_drv.h"15 16static bool ast_astdp_is_connected(struct ast_device *ast)17{18	if (!ast_get_index_reg_mask(ast, AST_IO_VGACRI, 0xDF, AST_IO_VGACRDF_HPD))19		return false;20	return true;21}22 23static int ast_astdp_read_edid_block(void *data, u8 *buf, unsigned int block, size_t len)24{25	struct ast_device *ast = data;26	size_t rdlen = round_up(len, 4);27	int ret = 0;28	unsigned int i;29 30	if (block > 0)31		return -EIO; /* extension headers not supported */32 33	/*34	 * Protect access to I/O registers from concurrent modesetting35	 * by acquiring the I/O-register lock.36	 */37	mutex_lock(&ast->modeset_lock);38 39	/* Start reading EDID data */40	ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xe5, (u8)~AST_IO_VGACRE5_EDID_READ_DONE, 0x00);41 42	for (i = 0; i < rdlen; i += 4) {43		unsigned int offset;44		unsigned int j;45		u8 ediddata[4];46		u8 vgacre4;47 48		offset = (i + block * EDID_LENGTH) / 4;49		if (offset >= 64) {50			ret = -EIO;51			goto out;52		}53		vgacre4 = offset;54 55		/*56		 * CRE4[7:0]: Read-Pointer for EDID (Unit: 4bytes); valid range: 0~6457		 */58		ast_set_index_reg(ast, AST_IO_VGACRI, 0xe4, vgacre4);59 60		/*61		 * CRD7[b0]: valid flag for EDID62		 * CRD6[b0]: mirror read pointer for EDID63		 */64		for (j = 0; j < 200; ++j) {65			u8 vgacrd7, vgacrd6;66 67			/*68			 * Delay are getting longer with each retry.69			 *70			 * 1. No delay on first try71			 * 2. The Delays are often 2 loops when users request "Display Settings"72			 *	  of right-click of mouse.73			 * 3. The Delays are often longer a lot when system resume from S3/S4.74			 */75			if (j)76				mdelay(j + 1);77 78			/* Wait for EDID offset to show up in mirror register */79			vgacrd7 = ast_get_index_reg(ast, AST_IO_VGACRI, 0xd7);80			if (vgacrd7 & AST_IO_VGACRD7_EDID_VALID_FLAG) {81				vgacrd6 = ast_get_index_reg(ast, AST_IO_VGACRI, 0xd6);82				if (vgacrd6 == offset)83					break;84			}85		}86		if (j == 200) {87			ret = -EBUSY;88			goto out;89		}90 91		ediddata[0] = ast_get_index_reg(ast, AST_IO_VGACRI, 0xd8);92		ediddata[1] = ast_get_index_reg(ast, AST_IO_VGACRI, 0xd9);93		ediddata[2] = ast_get_index_reg(ast, AST_IO_VGACRI, 0xda);94		ediddata[3] = ast_get_index_reg(ast, AST_IO_VGACRI, 0xdb);95 96		if (i == 31) {97			/*98			 * For 128-bytes EDID_1.3,99			 * 1. Add the value of Bytes-126 to Bytes-127.100			 *		The Bytes-127 is Checksum. Sum of all 128bytes should101			 *		equal 0	(mod 256).102			 * 2. Modify Bytes-126 to be 0.103			 *		The Bytes-126 indicates the Number of extensions to104			 *		follow. 0 represents noextensions.105			 */106			ediddata[3] = ediddata[3] + ediddata[2];107			ediddata[2] = 0;108		}109 110		memcpy(buf, ediddata, min((len - i), 4));111		buf += 4;112	}113 114out:115	/* Signal end of reading */116	ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xe5, (u8)~AST_IO_VGACRE5_EDID_READ_DONE,117			       AST_IO_VGACRE5_EDID_READ_DONE);118 119	mutex_unlock(&ast->modeset_lock);120 121	return ret;122}123 124/*125 * Launch Aspeed DP126 */127int ast_dp_launch(struct ast_device *ast)128{129	struct drm_device *dev = &ast->base;130	unsigned int i = 10;131 132	while (i) {133		u8 vgacrd1 = ast_get_index_reg(ast, AST_IO_VGACRI, 0xd1);134 135		if (vgacrd1 & AST_IO_VGACRD1_MCU_FW_EXECUTING)136			break;137		--i;138		msleep(100);139	}140	if (!i) {141		drm_err(dev, "Wait DPMCU executing timeout\n");142		return -ENODEV;143	}144 145	ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xe5,146			       (u8) ~AST_IO_VGACRE5_EDID_READ_DONE,147			       AST_IO_VGACRE5_EDID_READ_DONE);148 149	return 0;150}151 152static bool ast_dp_power_is_on(struct ast_device *ast)153{154	u8 vgacre3;155 156	vgacre3 = ast_get_index_reg(ast, AST_IO_VGACRI, 0xe3);157 158	return !(vgacre3 & AST_DP_PHY_SLEEP);159}160 161static void ast_dp_power_on_off(struct drm_device *dev, bool on)162{163	struct ast_device *ast = to_ast_device(dev);164	// Read and Turn off DP PHY sleep165	u8 bE3 = ast_get_index_reg_mask(ast, AST_IO_VGACRI, 0xE3, AST_DP_VIDEO_ENABLE);166 167	// Turn on DP PHY sleep168	if (!on)169		bE3 |= AST_DP_PHY_SLEEP;170 171	// DP Power on/off172	ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xE3, (u8) ~AST_DP_PHY_SLEEP, bE3);173 174	msleep(50);175}176 177static void ast_dp_link_training(struct ast_device *ast)178{179	struct drm_device *dev = &ast->base;180	int i;181 182	for (i = 0; i < 10; i++) {183		u8 vgacrdc;184 185		if (i)186			msleep(100);187 188		vgacrdc = ast_get_index_reg(ast, AST_IO_VGACRI, 0xdc);189		if (vgacrdc & AST_IO_VGACRDC_LINK_SUCCESS)190			return;191	}192	drm_err(dev, "Link training failed\n");193}194 195static void ast_dp_set_on_off(struct drm_device *dev, bool on)196{197	struct ast_device *ast = to_ast_device(dev);198	u8 video_on_off = on;199	u32 i = 0;200 201	// Video On/Off202	ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xE3, (u8) ~AST_DP_VIDEO_ENABLE, on);203 204	video_on_off <<= 4;205	while (ast_get_index_reg_mask(ast, AST_IO_VGACRI, 0xDF,206						ASTDP_MIRROR_VIDEO_ENABLE) != video_on_off) {207		// wait 1 ms208		mdelay(1);209		if (++i > 200)210			break;211	}212}213 214static void ast_dp_set_mode(struct drm_crtc *crtc, struct ast_vbios_mode_info *vbios_mode)215{216	struct ast_device *ast = to_ast_device(crtc->dev);217 218	u32 ulRefreshRateIndex;219	u8 ModeIdx;220 221	ulRefreshRateIndex = vbios_mode->enh_table->refresh_rate_index - 1;222 223	switch (crtc->mode.crtc_hdisplay) {224	case 320:225		ModeIdx = ASTDP_320x240_60;226		break;227	case 400:228		ModeIdx = ASTDP_400x300_60;229		break;230	case 512:231		ModeIdx = ASTDP_512x384_60;232		break;233	case 640:234		ModeIdx = (ASTDP_640x480_60 + (u8) ulRefreshRateIndex);235		break;236	case 800:237		ModeIdx = (ASTDP_800x600_56 + (u8) ulRefreshRateIndex);238		break;239	case 1024:240		ModeIdx = (ASTDP_1024x768_60 + (u8) ulRefreshRateIndex);241		break;242	case 1152:243		ModeIdx = ASTDP_1152x864_75;244		break;245	case 1280:246		if (crtc->mode.crtc_vdisplay == 800)247			ModeIdx = (ASTDP_1280x800_60_RB - (u8) ulRefreshRateIndex);248		else		// 1024249			ModeIdx = (ASTDP_1280x1024_60 + (u8) ulRefreshRateIndex);250		break;251	case 1360:252	case 1366:253		ModeIdx = ASTDP_1366x768_60;254		break;255	case 1440:256		ModeIdx = (ASTDP_1440x900_60_RB - (u8) ulRefreshRateIndex);257		break;258	case 1600:259		if (crtc->mode.crtc_vdisplay == 900)260			ModeIdx = (ASTDP_1600x900_60_RB - (u8) ulRefreshRateIndex);261		else		//1200262			ModeIdx = ASTDP_1600x1200_60;263		break;264	case 1680:265		ModeIdx = (ASTDP_1680x1050_60_RB - (u8) ulRefreshRateIndex);266		break;267	case 1920:268		if (crtc->mode.crtc_vdisplay == 1080)269			ModeIdx = ASTDP_1920x1080_60;270		else		//1200271			ModeIdx = ASTDP_1920x1200_60;272		break;273	default:274		return;275	}276 277	/*278	 * CRE0[7:0]: MISC0 ((0x00: 18-bpp) or (0x20: 24-bpp)279	 * CRE1[7:0]: MISC1 (default: 0x00)280	 * CRE2[7:0]: video format index (0x00 ~ 0x20 or 0x40 ~ 0x50)281	 */282	ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xE0, ASTDP_AND_CLEAR_MASK,283			       ASTDP_MISC0_24bpp);284	ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xE1, ASTDP_AND_CLEAR_MASK, ASTDP_MISC1);285	ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xE2, ASTDP_AND_CLEAR_MASK, ModeIdx);286}287 288static void ast_wait_for_vretrace(struct ast_device *ast)289{290	unsigned long timeout = jiffies + HZ;291	u8 vgair1;292 293	do {294		vgair1 = ast_io_read8(ast, AST_IO_VGAIR1_R);295	} while (!(vgair1 & AST_IO_VGAIR1_VREFRESH) && time_before(jiffies, timeout));296}297 298/*299 * Encoder300 */301 302static const struct drm_encoder_funcs ast_astdp_encoder_funcs = {303	.destroy = drm_encoder_cleanup,304};305 306static void ast_astdp_encoder_helper_atomic_mode_set(struct drm_encoder *encoder,307						     struct drm_crtc_state *crtc_state,308						     struct drm_connector_state *conn_state)309{310	struct drm_crtc *crtc = crtc_state->crtc;311	struct ast_crtc_state *ast_crtc_state = to_ast_crtc_state(crtc_state);312	struct ast_vbios_mode_info *vbios_mode_info = &ast_crtc_state->vbios_mode_info;313 314	ast_dp_set_mode(crtc, vbios_mode_info);315}316 317static void ast_astdp_encoder_helper_atomic_enable(struct drm_encoder *encoder,318						   struct drm_atomic_state *state)319{320	struct drm_device *dev = encoder->dev;321	struct ast_device *ast = to_ast_device(dev);322	struct ast_connector *ast_connector = &ast->output.astdp.connector;323 324	if (ast_connector->physical_status == connector_status_connected) {325		ast_dp_power_on_off(dev, AST_DP_POWER_ON);326		ast_dp_link_training(ast);327 328		ast_wait_for_vretrace(ast);329		ast_dp_set_on_off(dev, 1);330	}331}332 333static void ast_astdp_encoder_helper_atomic_disable(struct drm_encoder *encoder,334						    struct drm_atomic_state *state)335{336	struct drm_device *dev = encoder->dev;337 338	ast_dp_set_on_off(dev, 0);339	ast_dp_power_on_off(dev, AST_DP_POWER_OFF);340}341 342static const struct drm_encoder_helper_funcs ast_astdp_encoder_helper_funcs = {343	.atomic_mode_set = ast_astdp_encoder_helper_atomic_mode_set,344	.atomic_enable = ast_astdp_encoder_helper_atomic_enable,345	.atomic_disable = ast_astdp_encoder_helper_atomic_disable,346};347 348/*349 * Connector350 */351 352static int ast_astdp_connector_helper_get_modes(struct drm_connector *connector)353{354	struct ast_connector *ast_connector = to_ast_connector(connector);355	int count;356 357	if (ast_connector->physical_status == connector_status_connected) {358		struct ast_device *ast = to_ast_device(connector->dev);359		const struct drm_edid *drm_edid;360 361		drm_edid = drm_edid_read_custom(connector, ast_astdp_read_edid_block, ast);362		drm_edid_connector_update(connector, drm_edid);363		count = drm_edid_connector_add_modes(connector);364		drm_edid_free(drm_edid);365	} else {366		drm_edid_connector_update(connector, NULL);367 368		/*369		 * There's no EDID data without a connected monitor. Set BMC-370		 * compatible modes in this case. The XGA default resolution371		 * should work well for all BMCs.372		 */373		count = drm_add_modes_noedid(connector, 4096, 4096);374		if (count)375			drm_set_preferred_mode(connector, 1024, 768);376	}377 378	return count;379}380 381static int ast_astdp_connector_helper_detect_ctx(struct drm_connector *connector,382						 struct drm_modeset_acquire_ctx *ctx,383						 bool force)384{385	struct ast_connector *ast_connector = to_ast_connector(connector);386	struct drm_device *dev = connector->dev;387	struct ast_device *ast = to_ast_device(connector->dev);388	enum drm_connector_status status = connector_status_disconnected;389	bool power_is_on;390 391	mutex_lock(&ast->modeset_lock);392 393	power_is_on = ast_dp_power_is_on(ast);394	if (!power_is_on)395		ast_dp_power_on_off(dev, true);396 397	if (ast_astdp_is_connected(ast))398		status = connector_status_connected;399 400	if (!power_is_on && status == connector_status_disconnected)401		ast_dp_power_on_off(dev, false);402 403	mutex_unlock(&ast->modeset_lock);404 405	if (status != ast_connector->physical_status)406		++connector->epoch_counter;407	ast_connector->physical_status = status;408 409	return connector_status_connected;410}411 412static const struct drm_connector_helper_funcs ast_astdp_connector_helper_funcs = {413	.get_modes = ast_astdp_connector_helper_get_modes,414	.detect_ctx = ast_astdp_connector_helper_detect_ctx,415};416 417static const struct drm_connector_funcs ast_astdp_connector_funcs = {418	.reset = drm_atomic_helper_connector_reset,419	.fill_modes = drm_helper_probe_single_connector_modes,420	.destroy = drm_connector_cleanup,421	.atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,422	.atomic_destroy_state = drm_atomic_helper_connector_destroy_state,423};424 425static int ast_astdp_connector_init(struct drm_device *dev, struct drm_connector *connector)426{427	int ret;428 429	ret = drm_connector_init(dev, connector, &ast_astdp_connector_funcs,430				 DRM_MODE_CONNECTOR_DisplayPort);431	if (ret)432		return ret;433 434	drm_connector_helper_add(connector, &ast_astdp_connector_helper_funcs);435 436	connector->interlace_allowed = 0;437	connector->doublescan_allowed = 0;438 439	connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;440 441	return 0;442}443 444int ast_astdp_output_init(struct ast_device *ast)445{446	struct drm_device *dev = &ast->base;447	struct drm_crtc *crtc = &ast->crtc;448	struct drm_encoder *encoder = &ast->output.astdp.encoder;449	struct ast_connector *ast_connector = &ast->output.astdp.connector;450	struct drm_connector *connector = &ast_connector->base;451	int ret;452 453	ret = drm_encoder_init(dev, encoder, &ast_astdp_encoder_funcs,454			       DRM_MODE_ENCODER_TMDS, NULL);455	if (ret)456		return ret;457	drm_encoder_helper_add(encoder, &ast_astdp_encoder_helper_funcs);458 459	encoder->possible_crtcs = drm_crtc_mask(crtc);460 461	ret = ast_astdp_connector_init(dev, connector);462	if (ret)463		return ret;464	ast_connector->physical_status = connector->status;465 466	ret = drm_connector_attach_encoder(connector, encoder);467	if (ret)468		return ret;469 470	return 0;471}472