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1// SPDX-License-Identifier: GPL-2.02/*3 * Copyright (c) 2018, The Linux Foundation. All rights reserved.4 * Copyright (c) 2019-2020. Linaro Limited.5 */6 7#include <linux/gpio/consumer.h>8#include <linux/i2c.h>9#include <linux/interrupt.h>10#include <linux/media-bus-format.h>11#include <linux/module.h>12#include <linux/of_graph.h>13#include <linux/platform_device.h>14#include <linux/regmap.h>15#include <linux/regulator/consumer.h>16 17#include <sound/hdmi-codec.h>18 19#include <drm/drm_atomic_helper.h>20#include <drm/drm_bridge.h>21#include <drm/drm_edid.h>22#include <drm/drm_mipi_dsi.h>23#include <drm/drm_of.h>24#include <drm/drm_print.h>25#include <drm/drm_probe_helper.h>26 27#define EDID_SEG_SIZE	25628#define EDID_LEN	3229#define EDID_LOOP	830#define KEY_DDC_ACCS_DONE 0x0231#define DDC_NO_ACK	0x5032 33#define LT9611_4LANES	034 35struct lt9611 {36	struct device *dev;37	struct drm_bridge bridge;38	struct drm_bridge *next_bridge;39 40	struct regmap *regmap;41 42	struct device_node *dsi0_node;43	struct device_node *dsi1_node;44	struct mipi_dsi_device *dsi0;45	struct mipi_dsi_device *dsi1;46	struct platform_device *audio_pdev;47 48	bool ac_mode;49 50	struct gpio_desc *reset_gpio;51	struct gpio_desc *enable_gpio;52 53	bool power_on;54	bool sleep;55 56	struct regulator_bulk_data supplies[2];57 58	struct i2c_client *client;59 60	enum drm_connector_status status;61 62	u8 edid_buf[EDID_SEG_SIZE];63};64 65#define LT9611_PAGE_CONTROL	0xff66 67static const struct regmap_range_cfg lt9611_ranges[] = {68	{69		.name = "register_range",70		.range_min =  0,71		.range_max = 0x85ff,72		.selector_reg = LT9611_PAGE_CONTROL,73		.selector_mask = 0xff,74		.selector_shift = 0,75		.window_start = 0,76		.window_len = 0x100,77	},78};79 80static const struct regmap_config lt9611_regmap_config = {81	.reg_bits = 8,82	.val_bits = 8,83	.max_register = 0xffff,84	.ranges = lt9611_ranges,85	.num_ranges = ARRAY_SIZE(lt9611_ranges),86};87 88static struct lt9611 *bridge_to_lt9611(struct drm_bridge *bridge)89{90	return container_of(bridge, struct lt9611, bridge);91}92 93static int lt9611_mipi_input_analog(struct lt9611 *lt9611)94{95	const struct reg_sequence reg_cfg[] = {96		{ 0x8106, 0x40 }, /* port A rx current */97		{ 0x810a, 0xfe }, /* port A ldo voltage set */98		{ 0x810b, 0xbf }, /* enable port A lprx */99		{ 0x8111, 0x40 }, /* port B rx current */100		{ 0x8115, 0xfe }, /* port B ldo voltage set */101		{ 0x8116, 0xbf }, /* enable port B lprx */102 103		{ 0x811c, 0x03 }, /* PortA clk lane no-LP mode */104		{ 0x8120, 0x03 }, /* PortB clk lane with-LP mode */105	};106 107	return regmap_multi_reg_write(lt9611->regmap, reg_cfg, ARRAY_SIZE(reg_cfg));108}109 110static int lt9611_mipi_input_digital(struct lt9611 *lt9611,111				     const struct drm_display_mode *mode)112{113	struct reg_sequence reg_cfg[] = {114		{ 0x8300, LT9611_4LANES },115		{ 0x830a, 0x00 },116		{ 0x824f, 0x80 },117		{ 0x8250, 0x10 },118		{ 0x8302, 0x0a },119		{ 0x8306, 0x0a },120	};121 122	if (lt9611->dsi1_node)123		reg_cfg[1].def = 0x03;124 125	return regmap_multi_reg_write(lt9611->regmap, reg_cfg, ARRAY_SIZE(reg_cfg));126}127 128static void lt9611_mipi_video_setup(struct lt9611 *lt9611,129				    const struct drm_display_mode *mode)130{131	u32 h_total, hactive, hsync_len, hfront_porch, hsync_porch;132	u32 v_total, vactive, vsync_len, vfront_porch, vsync_porch;133 134	h_total = mode->htotal;135	v_total = mode->vtotal;136 137	hactive = mode->hdisplay;138	hsync_len = mode->hsync_end - mode->hsync_start;139	hfront_porch = mode->hsync_start - mode->hdisplay;140	hsync_porch = mode->htotal - mode->hsync_start;141 142	vactive = mode->vdisplay;143	vsync_len = mode->vsync_end - mode->vsync_start;144	vfront_porch = mode->vsync_start - mode->vdisplay;145	vsync_porch = mode->vtotal - mode->vsync_start;146 147	regmap_write(lt9611->regmap, 0x830d, (u8)(v_total / 256));148	regmap_write(lt9611->regmap, 0x830e, (u8)(v_total % 256));149 150	regmap_write(lt9611->regmap, 0x830f, (u8)(vactive / 256));151	regmap_write(lt9611->regmap, 0x8310, (u8)(vactive % 256));152 153	regmap_write(lt9611->regmap, 0x8311, (u8)(h_total / 256));154	regmap_write(lt9611->regmap, 0x8312, (u8)(h_total % 256));155 156	regmap_write(lt9611->regmap, 0x8313, (u8)(hactive / 256));157	regmap_write(lt9611->regmap, 0x8314, (u8)(hactive % 256));158 159	regmap_write(lt9611->regmap, 0x8315, (u8)(vsync_len % 256));160	regmap_write(lt9611->regmap, 0x8316, (u8)(hsync_len % 256));161 162	regmap_write(lt9611->regmap, 0x8317, (u8)(vfront_porch % 256));163 164	regmap_write(lt9611->regmap, 0x8318, (u8)(vsync_porch % 256));165 166	regmap_write(lt9611->regmap, 0x8319, (u8)(hfront_porch % 256));167 168	regmap_write(lt9611->regmap, 0x831a, (u8)(hsync_porch / 256) |169						((hfront_porch / 256) << 4));170	regmap_write(lt9611->regmap, 0x831b, (u8)(hsync_porch % 256));171}172 173static void lt9611_pcr_setup(struct lt9611 *lt9611, const struct drm_display_mode *mode, unsigned int postdiv)174{175	unsigned int pcr_m = mode->clock * 5 * postdiv / 27000;176	const struct reg_sequence reg_cfg[] = {177		{ 0x830b, 0x01 },178		{ 0x830c, 0x10 },179		{ 0x8348, 0x00 },180		{ 0x8349, 0x81 },181 182		/* stage 1 */183		{ 0x8321, 0x4a },184		{ 0x8324, 0x71 },185		{ 0x8325, 0x30 },186		{ 0x832a, 0x01 },187 188		/* stage 2 */189		{ 0x834a, 0x40 },190 191		/* MK limit */192		{ 0x832d, 0x38 },193		{ 0x8331, 0x08 },194	};195	u8 pol = 0x10;196 197	if (mode->flags & DRM_MODE_FLAG_NHSYNC)198		pol |= 0x2;199	if (mode->flags & DRM_MODE_FLAG_NVSYNC)200		pol |= 0x1;201	regmap_write(lt9611->regmap, 0x831d, pol);202 203	regmap_multi_reg_write(lt9611->regmap, reg_cfg, ARRAY_SIZE(reg_cfg));204	if (lt9611->dsi1_node) {205		unsigned int hact = mode->hdisplay;206 207		hact >>= 2;208		hact += 0x50;209		hact = min(hact, 0x3e0U);210		regmap_write(lt9611->regmap, 0x830b, hact / 256);211		regmap_write(lt9611->regmap, 0x830c, hact % 256);212		regmap_write(lt9611->regmap, 0x8348, hact / 256);213		regmap_write(lt9611->regmap, 0x8349, hact % 256);214	}215 216	regmap_write(lt9611->regmap, 0x8326, pcr_m);217 218	/* pcr rst */219	regmap_write(lt9611->regmap, 0x8011, 0x5a);220	regmap_write(lt9611->regmap, 0x8011, 0xfa);221}222 223static int lt9611_pll_setup(struct lt9611 *lt9611, const struct drm_display_mode *mode, unsigned int *postdiv)224{225	unsigned int pclk = mode->clock;226	const struct reg_sequence reg_cfg[] = {227		/* txpll init */228		{ 0x8123, 0x40 },229		{ 0x8124, 0x64 },230		{ 0x8125, 0x80 },231		{ 0x8126, 0x55 },232		{ 0x812c, 0x37 },233		{ 0x812f, 0x01 },234		{ 0x8126, 0x55 },235		{ 0x8127, 0x66 },236		{ 0x8128, 0x88 },237		{ 0x812a, 0x20 },238	};239 240	regmap_multi_reg_write(lt9611->regmap, reg_cfg, ARRAY_SIZE(reg_cfg));241 242	if (pclk > 150000) {243		regmap_write(lt9611->regmap, 0x812d, 0x88);244		*postdiv = 1;245	} else if (pclk > 70000) {246		regmap_write(lt9611->regmap, 0x812d, 0x99);247		*postdiv = 2;248	} else {249		regmap_write(lt9611->regmap, 0x812d, 0xaa);250		*postdiv = 4;251	}252 253	/*254	 * first divide pclk by 2 first255	 *  - write divide by 64k to 19:16 bits which means shift by 17256	 *  - write divide by 256 to 15:8 bits which means shift by 9257	 *  - write remainder to 7:0 bits, which means shift by 1258	 */259	regmap_write(lt9611->regmap, 0x82e3, pclk >> 17); /* pclk[19:16] */260	regmap_write(lt9611->regmap, 0x82e4, pclk >> 9);  /* pclk[15:8]  */261	regmap_write(lt9611->regmap, 0x82e5, pclk >> 1);  /* pclk[7:0]   */262 263	regmap_write(lt9611->regmap, 0x82de, 0x20);264	regmap_write(lt9611->regmap, 0x82de, 0xe0);265 266	regmap_write(lt9611->regmap, 0x8016, 0xf1);267	regmap_write(lt9611->regmap, 0x8016, 0xf3);268 269	return 0;270}271 272static int lt9611_read_video_check(struct lt9611 *lt9611, unsigned int reg)273{274	unsigned int temp, temp2;275	int ret;276 277	ret = regmap_read(lt9611->regmap, reg, &temp);278	if (ret)279		return ret;280	temp <<= 8;281	ret = regmap_read(lt9611->regmap, reg + 1, &temp2);282	if (ret)283		return ret;284 285	return (temp + temp2);286}287 288static int lt9611_video_check(struct lt9611 *lt9611)289{290	u32 v_total, vactive, hactive_a, hactive_b, h_total_sysclk;291	int temp;292 293	/* top module video check */294 295	/* vactive */296	temp = lt9611_read_video_check(lt9611, 0x8282);297	if (temp < 0)298		goto end;299	vactive = temp;300 301	/* v_total */302	temp = lt9611_read_video_check(lt9611, 0x826c);303	if (temp < 0)304		goto end;305	v_total = temp;306 307	/* h_total_sysclk */308	temp = lt9611_read_video_check(lt9611, 0x8286);309	if (temp < 0)310		goto end;311	h_total_sysclk = temp;312 313	/* hactive_a */314	temp = lt9611_read_video_check(lt9611, 0x8382);315	if (temp < 0)316		goto end;317	hactive_a = temp / 3;318 319	/* hactive_b */320	temp = lt9611_read_video_check(lt9611, 0x8386);321	if (temp < 0)322		goto end;323	hactive_b = temp / 3;324 325	dev_info(lt9611->dev,326		 "video check: hactive_a=%d, hactive_b=%d, vactive=%d, v_total=%d, h_total_sysclk=%d\n",327		 hactive_a, hactive_b, vactive, v_total, h_total_sysclk);328 329	return 0;330 331end:332	dev_err(lt9611->dev, "read video check error\n");333	return temp;334}335 336static void lt9611_hdmi_set_infoframes(struct lt9611 *lt9611,337				       struct drm_connector *connector,338				       struct drm_display_mode *mode)339{340	union hdmi_infoframe infoframe;341	ssize_t len;342	u8 iframes = 0x0a; /* UD1 infoframe */343	u8 buf[32];344	int ret;345	int i;346 347	ret = drm_hdmi_avi_infoframe_from_display_mode(&infoframe.avi,348						       connector,349						       mode);350	if (ret < 0)351		goto out;352 353	len = hdmi_infoframe_pack(&infoframe, buf, sizeof(buf));354	if (len < 0)355		goto out;356 357	for (i = 0; i < len; i++)358		regmap_write(lt9611->regmap, 0x8440 + i, buf[i]);359 360	ret = drm_hdmi_vendor_infoframe_from_display_mode(&infoframe.vendor.hdmi,361							  connector,362							  mode);363	if (ret < 0)364		goto out;365 366	len = hdmi_infoframe_pack(&infoframe, buf, sizeof(buf));367	if (len < 0)368		goto out;369 370	for (i = 0; i < len; i++)371		regmap_write(lt9611->regmap, 0x8474 + i, buf[i]);372 373	iframes |= 0x20;374 375out:376	regmap_write(lt9611->regmap, 0x843d, iframes); /* UD1 infoframe */377}378 379static void lt9611_hdmi_tx_digital(struct lt9611 *lt9611, bool is_hdmi)380{381	if (is_hdmi)382		regmap_write(lt9611->regmap, 0x82d6, 0x8c);383	else384		regmap_write(lt9611->regmap, 0x82d6, 0x0c);385	regmap_write(lt9611->regmap, 0x82d7, 0x04);386}387 388static void lt9611_hdmi_tx_phy(struct lt9611 *lt9611)389{390	struct reg_sequence reg_cfg[] = {391		{ 0x8130, 0x6a },392		{ 0x8131, 0x44 }, /* HDMI DC mode */393		{ 0x8132, 0x4a },394		{ 0x8133, 0x0b },395		{ 0x8134, 0x00 },396		{ 0x8135, 0x00 },397		{ 0x8136, 0x00 },398		{ 0x8137, 0x44 },399		{ 0x813f, 0x0f },400		{ 0x8140, 0xa0 },401		{ 0x8141, 0xa0 },402		{ 0x8142, 0xa0 },403		{ 0x8143, 0xa0 },404		{ 0x8144, 0x0a },405	};406 407	/* HDMI AC mode */408	if (lt9611->ac_mode)409		reg_cfg[2].def = 0x73;410 411	regmap_multi_reg_write(lt9611->regmap, reg_cfg, ARRAY_SIZE(reg_cfg));412}413 414static irqreturn_t lt9611_irq_thread_handler(int irq, void *dev_id)415{416	struct lt9611 *lt9611 = dev_id;417	unsigned int irq_flag0 = 0;418	unsigned int irq_flag3 = 0;419 420	regmap_read(lt9611->regmap, 0x820f, &irq_flag3);421	regmap_read(lt9611->regmap, 0x820c, &irq_flag0);422 423	/* hpd changed low */424	if (irq_flag3 & 0x80) {425		dev_info(lt9611->dev, "hdmi cable disconnected\n");426 427		regmap_write(lt9611->regmap, 0x8207, 0xbf);428		regmap_write(lt9611->regmap, 0x8207, 0x3f);429	}430 431	/* hpd changed high */432	if (irq_flag3 & 0x40) {433		dev_info(lt9611->dev, "hdmi cable connected\n");434 435		regmap_write(lt9611->regmap, 0x8207, 0x7f);436		regmap_write(lt9611->regmap, 0x8207, 0x3f);437	}438 439	if (irq_flag3 & 0xc0 && lt9611->bridge.dev)440		drm_kms_helper_hotplug_event(lt9611->bridge.dev);441 442	/* video input changed */443	if (irq_flag0 & 0x01) {444		dev_info(lt9611->dev, "video input changed\n");445		regmap_write(lt9611->regmap, 0x829e, 0xff);446		regmap_write(lt9611->regmap, 0x829e, 0xf7);447		regmap_write(lt9611->regmap, 0x8204, 0xff);448		regmap_write(lt9611->regmap, 0x8204, 0xfe);449	}450 451	return IRQ_HANDLED;452}453 454static void lt9611_enable_hpd_interrupts(struct lt9611 *lt9611)455{456	unsigned int val;457 458	regmap_read(lt9611->regmap, 0x8203, &val);459 460	val &= ~0xc0;461	regmap_write(lt9611->regmap, 0x8203, val);462	regmap_write(lt9611->regmap, 0x8207, 0xff); /* clear */463	regmap_write(lt9611->regmap, 0x8207, 0x3f);464}465 466static void lt9611_sleep_setup(struct lt9611 *lt9611)467{468	const struct reg_sequence sleep_setup[] = {469		{ 0x8024, 0x76 },470		{ 0x8023, 0x01 },471		{ 0x8157, 0x03 }, /* set addr pin as output */472		{ 0x8149, 0x0b },473 474		{ 0x8102, 0x48 }, /* MIPI Rx power down */475		{ 0x8123, 0x80 },476		{ 0x8130, 0x00 },477		{ 0x8011, 0x0a },478	};479 480	regmap_multi_reg_write(lt9611->regmap,481			       sleep_setup, ARRAY_SIZE(sleep_setup));482	lt9611->sleep = true;483}484 485static int lt9611_power_on(struct lt9611 *lt9611)486{487	int ret;488	const struct reg_sequence seq[] = {489		/* LT9611_System_Init */490		{ 0x8101, 0x18 }, /* sel xtal clock */491 492		/* timer for frequency meter */493		{ 0x821b, 0x69 }, /* timer 2 */494		{ 0x821c, 0x78 },495		{ 0x82cb, 0x69 }, /* timer 1 */496		{ 0x82cc, 0x78 },497 498		/* irq init */499		{ 0x8251, 0x01 },500		{ 0x8258, 0x0a }, /* hpd irq */501		{ 0x8259, 0x80 }, /* hpd debounce width */502		{ 0x829e, 0xf7 }, /* video check irq */503 504		/* power consumption for work */505		{ 0x8004, 0xf0 },506		{ 0x8006, 0xf0 },507		{ 0x800a, 0x80 },508		{ 0x800b, 0x40 },509		{ 0x800d, 0xef },510		{ 0x8011, 0xfa },511	};512 513	if (lt9611->power_on)514		return 0;515 516	ret = regmap_multi_reg_write(lt9611->regmap, seq, ARRAY_SIZE(seq));517	if (!ret)518		lt9611->power_on = true;519 520	return ret;521}522 523static int lt9611_power_off(struct lt9611 *lt9611)524{525	int ret;526 527	ret = regmap_write(lt9611->regmap, 0x8130, 0x6a);528	if (!ret)529		lt9611->power_on = false;530 531	return ret;532}533 534static void lt9611_reset(struct lt9611 *lt9611)535{536	gpiod_set_value_cansleep(lt9611->reset_gpio, 1);537	msleep(20);538 539	gpiod_set_value_cansleep(lt9611->reset_gpio, 0);540	msleep(20);541 542	gpiod_set_value_cansleep(lt9611->reset_gpio, 1);543	msleep(100);544}545 546static void lt9611_assert_5v(struct lt9611 *lt9611)547{548	if (!lt9611->enable_gpio)549		return;550 551	gpiod_set_value_cansleep(lt9611->enable_gpio, 1);552	msleep(20);553}554 555static int lt9611_regulator_init(struct lt9611 *lt9611)556{557	int ret;558 559	lt9611->supplies[0].supply = "vdd";560	lt9611->supplies[1].supply = "vcc";561 562	ret = devm_regulator_bulk_get(lt9611->dev, 2, lt9611->supplies);563	if (ret < 0)564		return ret;565 566	return regulator_set_load(lt9611->supplies[0].consumer, 300000);567}568 569static int lt9611_regulator_enable(struct lt9611 *lt9611)570{571	int ret;572 573	ret = regulator_enable(lt9611->supplies[0].consumer);574	if (ret < 0)575		return ret;576 577	usleep_range(1000, 10000);578 579	ret = regulator_enable(lt9611->supplies[1].consumer);580	if (ret < 0) {581		regulator_disable(lt9611->supplies[0].consumer);582		return ret;583	}584 585	return 0;586}587 588static enum drm_connector_status lt9611_bridge_detect(struct drm_bridge *bridge)589{590	struct lt9611 *lt9611 = bridge_to_lt9611(bridge);591	unsigned int reg_val = 0;592	int connected = 0;593 594	regmap_read(lt9611->regmap, 0x825e, &reg_val);595	connected  = (reg_val & (BIT(2) | BIT(0)));596 597	lt9611->status = connected ?  connector_status_connected :598				connector_status_disconnected;599 600	return lt9611->status;601}602 603static int lt9611_read_edid(struct lt9611 *lt9611)604{605	unsigned int temp;606	int ret = 0;607	int i, j;608 609	/* memset to clear old buffer, if any */610	memset(lt9611->edid_buf, 0, sizeof(lt9611->edid_buf));611 612	regmap_write(lt9611->regmap, 0x8503, 0xc9);613 614	/* 0xA0 is EDID device address */615	regmap_write(lt9611->regmap, 0x8504, 0xa0);616	/* 0x00 is EDID offset address */617	regmap_write(lt9611->regmap, 0x8505, 0x00);618 619	/* length for read */620	regmap_write(lt9611->regmap, 0x8506, EDID_LEN);621	regmap_write(lt9611->regmap, 0x8514, 0x7f);622 623	for (i = 0; i < EDID_LOOP; i++) {624		/* offset address */625		regmap_write(lt9611->regmap, 0x8505, i * EDID_LEN);626		regmap_write(lt9611->regmap, 0x8507, 0x36);627		regmap_write(lt9611->regmap, 0x8507, 0x31);628		regmap_write(lt9611->regmap, 0x8507, 0x37);629		usleep_range(5000, 10000);630 631		regmap_read(lt9611->regmap, 0x8540, &temp);632 633		if (temp & KEY_DDC_ACCS_DONE) {634			for (j = 0; j < EDID_LEN; j++) {635				regmap_read(lt9611->regmap, 0x8583, &temp);636				lt9611->edid_buf[i * EDID_LEN + j] = temp;637			}638 639		} else if (temp & DDC_NO_ACK) { /* DDC No Ack or Abitration lost */640			dev_err(lt9611->dev, "read edid failed: no ack\n");641			ret = -EIO;642			goto end;643 644		} else {645			dev_err(lt9611->dev, "read edid failed: access not done\n");646			ret = -EIO;647			goto end;648		}649	}650 651end:652	regmap_write(lt9611->regmap, 0x8507, 0x1f);653	return ret;654}655 656static int657lt9611_get_edid_block(void *data, u8 *buf, unsigned int block, size_t len)658{659	struct lt9611 *lt9611 = data;660	int ret;661 662	if (len > 128)663		return -EINVAL;664 665	/* supports up to 1 extension block */666	/* TODO: add support for more extension blocks */667	if (block > 1)668		return -EINVAL;669 670	if (block == 0) {671		ret = lt9611_read_edid(lt9611);672		if (ret) {673			dev_err(lt9611->dev, "edid read failed\n");674			return ret;675		}676	}677 678	block %= 2;679	memcpy(buf, lt9611->edid_buf + (block * 128), len);680 681	return 0;682}683 684/* bridge funcs */685static void686lt9611_bridge_atomic_enable(struct drm_bridge *bridge,687			    struct drm_bridge_state *old_bridge_state)688{689	struct lt9611 *lt9611 = bridge_to_lt9611(bridge);690	struct drm_atomic_state *state = old_bridge_state->base.state;691	struct drm_connector *connector;692	struct drm_connector_state *conn_state;693	struct drm_crtc_state *crtc_state;694	struct drm_display_mode *mode;695	unsigned int postdiv;696 697	connector = drm_atomic_get_new_connector_for_encoder(state, bridge->encoder);698	if (WARN_ON(!connector))699		return;700 701	conn_state = drm_atomic_get_new_connector_state(state, connector);702	if (WARN_ON(!conn_state))703		return;704 705	crtc_state = drm_atomic_get_new_crtc_state(state, conn_state->crtc);706	if (WARN_ON(!crtc_state))707		return;708 709	mode = &crtc_state->adjusted_mode;710 711	lt9611_mipi_input_digital(lt9611, mode);712	lt9611_pll_setup(lt9611, mode, &postdiv);713	lt9611_mipi_video_setup(lt9611, mode);714	lt9611_pcr_setup(lt9611, mode, postdiv);715 716	if (lt9611_power_on(lt9611)) {717		dev_err(lt9611->dev, "power on failed\n");718		return;719	}720 721	lt9611_mipi_input_analog(lt9611);722	lt9611_hdmi_set_infoframes(lt9611, connector, mode);723	lt9611_hdmi_tx_digital(lt9611, connector->display_info.is_hdmi);724	lt9611_hdmi_tx_phy(lt9611);725 726	msleep(500);727 728	lt9611_video_check(lt9611);729 730	/* Enable HDMI output */731	regmap_write(lt9611->regmap, 0x8130, 0xea);732}733 734static void735lt9611_bridge_atomic_disable(struct drm_bridge *bridge,736			     struct drm_bridge_state *old_bridge_state)737{738	struct lt9611 *lt9611 = bridge_to_lt9611(bridge);739	int ret;740 741	/* Disable HDMI output */742	ret = regmap_write(lt9611->regmap, 0x8130, 0x6a);743	if (ret) {744		dev_err(lt9611->dev, "video on failed\n");745		return;746	}747 748	if (lt9611_power_off(lt9611)) {749		dev_err(lt9611->dev, "power on failed\n");750		return;751	}752}753 754static struct mipi_dsi_device *lt9611_attach_dsi(struct lt9611 *lt9611,755						 struct device_node *dsi_node)756{757	const struct mipi_dsi_device_info info = { "lt9611", 0, lt9611->dev->of_node};758	struct mipi_dsi_device *dsi;759	struct mipi_dsi_host *host;760	struct device *dev = lt9611->dev;761	int ret;762 763	host = of_find_mipi_dsi_host_by_node(dsi_node);764	if (!host)765		return ERR_PTR(dev_err_probe(lt9611->dev, -EPROBE_DEFER, "failed to find dsi host\n"));766 767	dsi = devm_mipi_dsi_device_register_full(dev, host, &info);768	if (IS_ERR(dsi)) {769		dev_err(lt9611->dev, "failed to create dsi device\n");770		return dsi;771	}772 773	dsi->lanes = 4;774	dsi->format = MIPI_DSI_FMT_RGB888;775	dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |776			  MIPI_DSI_MODE_VIDEO_HSE;777 778	ret = devm_mipi_dsi_attach(dev, dsi);779	if (ret < 0) {780		dev_err(dev, "failed to attach dsi to host\n");781		return ERR_PTR(ret);782	}783 784	return dsi;785}786 787static int lt9611_bridge_attach(struct drm_bridge *bridge,788				enum drm_bridge_attach_flags flags)789{790	struct lt9611 *lt9611 = bridge_to_lt9611(bridge);791 792	return drm_bridge_attach(bridge->encoder, lt9611->next_bridge,793				 bridge, flags);794}795 796static enum drm_mode_status lt9611_bridge_mode_valid(struct drm_bridge *bridge,797						     const struct drm_display_info *info,798						     const struct drm_display_mode *mode)799{800	struct lt9611 *lt9611 = bridge_to_lt9611(bridge);801 802	if (mode->hdisplay > 3840)803		return MODE_BAD_HVALUE;804 805	if (mode->vdisplay > 2160)806		return MODE_BAD_VVALUE;807 808	if (mode->hdisplay == 3840 &&809	    mode->vdisplay == 2160 &&810	    drm_mode_vrefresh(mode) > 30)811		return MODE_CLOCK_HIGH;812 813	if (mode->hdisplay > 2000 && !lt9611->dsi1_node)814		return MODE_PANEL;815	else816		return MODE_OK;817}818 819static void lt9611_bridge_atomic_pre_enable(struct drm_bridge *bridge,820					    struct drm_bridge_state *old_bridge_state)821{822	struct lt9611 *lt9611 = bridge_to_lt9611(bridge);823	static const struct reg_sequence reg_cfg[] = {824		{ 0x8102, 0x12 },825		{ 0x8123, 0x40 },826		{ 0x8130, 0xea },827		{ 0x8011, 0xfa },828	};829 830	if (!lt9611->sleep)831		return;832 833	regmap_multi_reg_write(lt9611->regmap,834			       reg_cfg, ARRAY_SIZE(reg_cfg));835 836	lt9611->sleep = false;837}838 839static void840lt9611_bridge_atomic_post_disable(struct drm_bridge *bridge,841				  struct drm_bridge_state *old_bridge_state)842{843	struct lt9611 *lt9611 = bridge_to_lt9611(bridge);844 845	lt9611_sleep_setup(lt9611);846}847 848static const struct drm_edid *lt9611_bridge_edid_read(struct drm_bridge *bridge,849						      struct drm_connector *connector)850{851	struct lt9611 *lt9611 = bridge_to_lt9611(bridge);852 853	lt9611_power_on(lt9611);854	return drm_edid_read_custom(connector, lt9611_get_edid_block, lt9611);855}856 857static void lt9611_bridge_hpd_enable(struct drm_bridge *bridge)858{859	struct lt9611 *lt9611 = bridge_to_lt9611(bridge);860 861	lt9611_enable_hpd_interrupts(lt9611);862}863 864#define MAX_INPUT_SEL_FORMATS	1865 866static u32 *867lt9611_atomic_get_input_bus_fmts(struct drm_bridge *bridge,868				 struct drm_bridge_state *bridge_state,869				 struct drm_crtc_state *crtc_state,870				 struct drm_connector_state *conn_state,871				 u32 output_fmt,872				 unsigned int *num_input_fmts)873{874	u32 *input_fmts;875 876	*num_input_fmts = 0;877 878	input_fmts = kcalloc(MAX_INPUT_SEL_FORMATS, sizeof(*input_fmts),879			     GFP_KERNEL);880	if (!input_fmts)881		return NULL;882 883	/* This is the DSI-end bus format */884	input_fmts[0] = MEDIA_BUS_FMT_RGB888_1X24;885	*num_input_fmts = 1;886 887	return input_fmts;888}889 890static const struct drm_bridge_funcs lt9611_bridge_funcs = {891	.attach = lt9611_bridge_attach,892	.mode_valid = lt9611_bridge_mode_valid,893	.detect = lt9611_bridge_detect,894	.edid_read = lt9611_bridge_edid_read,895	.hpd_enable = lt9611_bridge_hpd_enable,896 897	.atomic_pre_enable = lt9611_bridge_atomic_pre_enable,898	.atomic_enable = lt9611_bridge_atomic_enable,899	.atomic_disable = lt9611_bridge_atomic_disable,900	.atomic_post_disable = lt9611_bridge_atomic_post_disable,901	.atomic_duplicate_state = drm_atomic_helper_bridge_duplicate_state,902	.atomic_destroy_state = drm_atomic_helper_bridge_destroy_state,903	.atomic_reset = drm_atomic_helper_bridge_reset,904	.atomic_get_input_bus_fmts = lt9611_atomic_get_input_bus_fmts,905};906 907static int lt9611_parse_dt(struct device *dev,908			   struct lt9611 *lt9611)909{910	lt9611->dsi0_node = of_graph_get_remote_node(dev->of_node, 0, -1);911	if (!lt9611->dsi0_node) {912		dev_err(lt9611->dev, "failed to get remote node for primary dsi\n");913		return -ENODEV;914	}915 916	lt9611->dsi1_node = of_graph_get_remote_node(dev->of_node, 1, -1);917 918	lt9611->ac_mode = of_property_read_bool(dev->of_node, "lt,ac-mode");919 920	return drm_of_find_panel_or_bridge(dev->of_node, 2, -1, NULL, &lt9611->next_bridge);921}922 923static int lt9611_gpio_init(struct lt9611 *lt9611)924{925	struct device *dev = lt9611->dev;926 927	lt9611->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH);928	if (IS_ERR(lt9611->reset_gpio)) {929		dev_err(dev, "failed to acquire reset gpio\n");930		return PTR_ERR(lt9611->reset_gpio);931	}932 933	lt9611->enable_gpio = devm_gpiod_get_optional(dev, "enable",934						      GPIOD_OUT_LOW);935	if (IS_ERR(lt9611->enable_gpio)) {936		dev_err(dev, "failed to acquire enable gpio\n");937		return PTR_ERR(lt9611->enable_gpio);938	}939 940	return 0;941}942 943static int lt9611_read_device_rev(struct lt9611 *lt9611)944{945	unsigned int rev;946	int ret;947 948	regmap_write(lt9611->regmap, 0x80ee, 0x01);949	ret = regmap_read(lt9611->regmap, 0x8002, &rev);950	if (ret)951		dev_err(lt9611->dev, "failed to read revision: %d\n", ret);952	else953		dev_info(lt9611->dev, "LT9611 revision: 0x%x\n", rev);954 955	return ret;956}957 958static int lt9611_hdmi_hw_params(struct device *dev, void *data,959				 struct hdmi_codec_daifmt *fmt,960				 struct hdmi_codec_params *hparms)961{962	struct lt9611 *lt9611 = data;963 964	if (hparms->sample_rate == 48000)965		regmap_write(lt9611->regmap, 0x840f, 0x2b);966	else if (hparms->sample_rate == 96000)967		regmap_write(lt9611->regmap, 0x840f, 0xab);968	else969		return -EINVAL;970 971	regmap_write(lt9611->regmap, 0x8435, 0x00);972	regmap_write(lt9611->regmap, 0x8436, 0x18);973	regmap_write(lt9611->regmap, 0x8437, 0x00);974 975	return 0;976}977 978static int lt9611_audio_startup(struct device *dev, void *data)979{980	struct lt9611 *lt9611 = data;981 982	regmap_write(lt9611->regmap, 0x82d6, 0x8c);983	regmap_write(lt9611->regmap, 0x82d7, 0x04);984 985	regmap_write(lt9611->regmap, 0x8406, 0x08);986	regmap_write(lt9611->regmap, 0x8407, 0x10);987 988	regmap_write(lt9611->regmap, 0x8434, 0xd5);989 990	return 0;991}992 993static void lt9611_audio_shutdown(struct device *dev, void *data)994{995	struct lt9611 *lt9611 = data;996 997	regmap_write(lt9611->regmap, 0x8406, 0x00);998	regmap_write(lt9611->regmap, 0x8407, 0x00);999}1000 1001static int lt9611_hdmi_i2s_get_dai_id(struct snd_soc_component *component,1002				      struct device_node *endpoint)1003{1004	struct of_endpoint of_ep;1005	int ret;1006 1007	ret = of_graph_parse_endpoint(endpoint, &of_ep);1008	if (ret < 0)1009		return ret;1010 1011	/*1012	 * HDMI sound should be located as reg = <2>1013	 * Then, it is sound port 01014	 */1015	if (of_ep.port == 2)1016		return 0;1017 1018	return -EINVAL;1019}1020 1021static const struct hdmi_codec_ops lt9611_codec_ops = {1022	.hw_params	= lt9611_hdmi_hw_params,1023	.audio_shutdown = lt9611_audio_shutdown,1024	.audio_startup	= lt9611_audio_startup,1025	.get_dai_id	= lt9611_hdmi_i2s_get_dai_id,1026};1027 1028static struct hdmi_codec_pdata codec_data = {1029	.ops = &lt9611_codec_ops,1030	.max_i2s_channels = 8,1031	.i2s = 1,1032};1033 1034static int lt9611_audio_init(struct device *dev, struct lt9611 *lt9611)1035{1036	codec_data.data = lt9611;1037	lt9611->audio_pdev =1038		platform_device_register_data(dev, HDMI_CODEC_DRV_NAME,1039					      PLATFORM_DEVID_AUTO,1040					      &codec_data, sizeof(codec_data));1041 1042	return PTR_ERR_OR_ZERO(lt9611->audio_pdev);1043}1044 1045static void lt9611_audio_exit(struct lt9611 *lt9611)1046{1047	if (lt9611->audio_pdev) {1048		platform_device_unregister(lt9611->audio_pdev);1049		lt9611->audio_pdev = NULL;1050	}1051}1052 1053static int lt9611_probe(struct i2c_client *client)1054{1055	struct lt9611 *lt9611;1056	struct device *dev = &client->dev;1057	int ret;1058 1059	if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {1060		dev_err(dev, "device doesn't support I2C\n");1061		return -ENODEV;1062	}1063 1064	lt9611 = devm_kzalloc(dev, sizeof(*lt9611), GFP_KERNEL);1065	if (!lt9611)1066		return -ENOMEM;1067 1068	lt9611->dev = dev;1069	lt9611->client = client;1070	lt9611->sleep = false;1071 1072	lt9611->regmap = devm_regmap_init_i2c(client, &lt9611_regmap_config);1073	if (IS_ERR(lt9611->regmap)) {1074		dev_err(lt9611->dev, "regmap i2c init failed\n");1075		return PTR_ERR(lt9611->regmap);1076	}1077 1078	ret = lt9611_parse_dt(dev, lt9611);1079	if (ret) {1080		dev_err(dev, "failed to parse device tree\n");1081		return ret;1082	}1083 1084	ret = lt9611_gpio_init(lt9611);1085	if (ret < 0)1086		goto err_of_put;1087 1088	ret = lt9611_regulator_init(lt9611);1089	if (ret < 0)1090		goto err_of_put;1091 1092	lt9611_assert_5v(lt9611);1093 1094	ret = lt9611_regulator_enable(lt9611);1095	if (ret)1096		goto err_of_put;1097 1098	lt9611_reset(lt9611);1099 1100	ret = lt9611_read_device_rev(lt9611);1101	if (ret) {1102		dev_err(dev, "failed to read chip rev\n");1103		goto err_disable_regulators;1104	}1105 1106	ret = devm_request_threaded_irq(dev, client->irq, NULL,1107					lt9611_irq_thread_handler,1108					IRQF_ONESHOT, "lt9611", lt9611);1109	if (ret) {1110		dev_err(dev, "failed to request irq\n");1111		goto err_disable_regulators;1112	}1113 1114	i2c_set_clientdata(client, lt9611);1115 1116	lt9611->bridge.funcs = &lt9611_bridge_funcs;1117	lt9611->bridge.of_node = client->dev.of_node;1118	lt9611->bridge.ops = DRM_BRIDGE_OP_DETECT | DRM_BRIDGE_OP_EDID |1119			     DRM_BRIDGE_OP_HPD | DRM_BRIDGE_OP_MODES;1120	lt9611->bridge.type = DRM_MODE_CONNECTOR_HDMIA;1121 1122	drm_bridge_add(&lt9611->bridge);1123 1124	/* Attach primary DSI */1125	lt9611->dsi0 = lt9611_attach_dsi(lt9611, lt9611->dsi0_node);1126	if (IS_ERR(lt9611->dsi0)) {1127		ret = PTR_ERR(lt9611->dsi0);1128		goto err_remove_bridge;1129	}1130 1131	/* Attach secondary DSI, if specified */1132	if (lt9611->dsi1_node) {1133		lt9611->dsi1 = lt9611_attach_dsi(lt9611, lt9611->dsi1_node);1134		if (IS_ERR(lt9611->dsi1)) {1135			ret = PTR_ERR(lt9611->dsi1);1136			goto err_remove_bridge;1137		}1138	}1139 1140	lt9611_enable_hpd_interrupts(lt9611);1141 1142	ret = lt9611_audio_init(dev, lt9611);1143	if (ret)1144		goto err_remove_bridge;1145 1146	return 0;1147 1148err_remove_bridge:1149	drm_bridge_remove(&lt9611->bridge);1150 1151err_disable_regulators:1152	regulator_bulk_disable(ARRAY_SIZE(lt9611->supplies), lt9611->supplies);1153 1154err_of_put:1155	of_node_put(lt9611->dsi1_node);1156	of_node_put(lt9611->dsi0_node);1157 1158	return ret;1159}1160 1161static void lt9611_remove(struct i2c_client *client)1162{1163	struct lt9611 *lt9611 = i2c_get_clientdata(client);1164 1165	disable_irq(client->irq);1166	lt9611_audio_exit(lt9611);1167	drm_bridge_remove(&lt9611->bridge);1168 1169	regulator_bulk_disable(ARRAY_SIZE(lt9611->supplies), lt9611->supplies);1170 1171	of_node_put(lt9611->dsi1_node);1172	of_node_put(lt9611->dsi0_node);1173}1174 1175static struct i2c_device_id lt9611_id[] = {1176	{ "lontium,lt9611", 0 },1177	{}1178};1179MODULE_DEVICE_TABLE(i2c, lt9611_id);1180 1181static const struct of_device_id lt9611_match_table[] = {1182	{ .compatible = "lontium,lt9611" },1183	{ }1184};1185MODULE_DEVICE_TABLE(of, lt9611_match_table);1186 1187static struct i2c_driver lt9611_driver = {1188	.driver = {1189		.name = "lt9611",1190		.of_match_table = lt9611_match_table,1191	},1192	.probe = lt9611_probe,1193	.remove = lt9611_remove,1194	.id_table = lt9611_id,1195};1196module_i2c_driver(lt9611_driver);1197 1198MODULE_DESCRIPTION("Lontium LT9611 DSI/HDMI bridge driver");1199MODULE_LICENSE("GPL v2");1200