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1// SPDX-License-Identifier: GPL-2.0-or-later2/*3 * Copyright (C) 2018 Renesas Electronics4 *5 * Copyright (C) 2016 Atmel6 * Bo Shen <voice.shen@atmel.com>7 *8 * Authors: Bo Shen <voice.shen@atmel.com>9 * Boris Brezillon <boris.brezillon@free-electrons.com>10 * Wu, Songjun <Songjun.Wu@atmel.com>11 *12 * Copyright (C) 2010-2011 Freescale Semiconductor, Inc. All Rights Reserved.13 */14 15#include <linux/gpio/consumer.h>16#include <linux/i2c-mux.h>17#include <linux/i2c.h>18#include <linux/media-bus-format.h>19#include <linux/module.h>20#include <linux/regmap.h>21#include <linux/regulator/consumer.h>22#include <linux/clk.h>23 24#include <drm/drm_atomic_helper.h>25#include <drm/drm_bridge.h>26#include <drm/drm_drv.h>27#include <drm/drm_edid.h>28#include <drm/drm_print.h>29#include <drm/drm_probe_helper.h>30 31#include <sound/hdmi-codec.h>32 33#define SII902X_TPI_VIDEO_DATA 0x034 35#define SII902X_TPI_PIXEL_REPETITION 0x836#define SII902X_TPI_AVI_PIXEL_REP_BUS_24BIT BIT(5)37#define SII902X_TPI_AVI_PIXEL_REP_RISING_EDGE BIT(4)38#define SII902X_TPI_AVI_PIXEL_REP_4X 339#define SII902X_TPI_AVI_PIXEL_REP_2X 140#define SII902X_TPI_AVI_PIXEL_REP_NONE 041#define SII902X_TPI_CLK_RATIO_HALF (0 << 6)42#define SII902X_TPI_CLK_RATIO_1X (1 << 6)43#define SII902X_TPI_CLK_RATIO_2X (2 << 6)44#define SII902X_TPI_CLK_RATIO_4X (3 << 6)45 46#define SII902X_TPI_AVI_IN_FORMAT 0x947#define SII902X_TPI_AVI_INPUT_BITMODE_12BIT BIT(7)48#define SII902X_TPI_AVI_INPUT_DITHER BIT(6)49#define SII902X_TPI_AVI_INPUT_RANGE_LIMITED (2 << 2)50#define SII902X_TPI_AVI_INPUT_RANGE_FULL (1 << 2)51#define SII902X_TPI_AVI_INPUT_RANGE_AUTO (0 << 2)52#define SII902X_TPI_AVI_INPUT_COLORSPACE_BLACK (3 << 0)53#define SII902X_TPI_AVI_INPUT_COLORSPACE_YUV422 (2 << 0)54#define SII902X_TPI_AVI_INPUT_COLORSPACE_YUV444 (1 << 0)55#define SII902X_TPI_AVI_INPUT_COLORSPACE_RGB (0 << 0)56 57#define SII902X_TPI_AVI_INFOFRAME 0x0c58 59#define SII902X_SYS_CTRL_DATA 0x1a60#define SII902X_SYS_CTRL_PWR_DWN BIT(4)61#define SII902X_SYS_CTRL_AV_MUTE BIT(3)62#define SII902X_SYS_CTRL_DDC_BUS_REQ BIT(2)63#define SII902X_SYS_CTRL_DDC_BUS_GRTD BIT(1)64#define SII902X_SYS_CTRL_OUTPUT_MODE BIT(0)65#define SII902X_SYS_CTRL_OUTPUT_HDMI 166#define SII902X_SYS_CTRL_OUTPUT_DVI 067 68#define SII902X_REG_CHIPID(n) (0x1b + (n))69 70#define SII902X_PWR_STATE_CTRL 0x1e71#define SII902X_AVI_POWER_STATE_MSK GENMASK(1, 0)72#define SII902X_AVI_POWER_STATE_D(l) ((l) & SII902X_AVI_POWER_STATE_MSK)73 74/* Audio */75#define SII902X_TPI_I2S_ENABLE_MAPPING_REG 0x1f76#define SII902X_TPI_I2S_CONFIG_FIFO0 (0 << 0)77#define SII902X_TPI_I2S_CONFIG_FIFO1 (1 << 0)78#define SII902X_TPI_I2S_CONFIG_FIFO2 (2 << 0)79#define SII902X_TPI_I2S_CONFIG_FIFO3 (3 << 0)80#define SII902X_TPI_I2S_LEFT_RIGHT_SWAP (1 << 2)81#define SII902X_TPI_I2S_AUTO_DOWNSAMPLE (1 << 3)82#define SII902X_TPI_I2S_SELECT_SD0 (0 << 4)83#define SII902X_TPI_I2S_SELECT_SD1 (1 << 4)84#define SII902X_TPI_I2S_SELECT_SD2 (2 << 4)85#define SII902X_TPI_I2S_SELECT_SD3 (3 << 4)86#define SII902X_TPI_I2S_FIFO_ENABLE (1 << 7)87 88#define SII902X_TPI_I2S_INPUT_CONFIG_REG 0x2089#define SII902X_TPI_I2S_FIRST_BIT_SHIFT_YES (0 << 0)90#define SII902X_TPI_I2S_FIRST_BIT_SHIFT_NO (1 << 0)91#define SII902X_TPI_I2S_SD_DIRECTION_MSB_FIRST (0 << 1)92#define SII902X_TPI_I2S_SD_DIRECTION_LSB_FIRST (1 << 1)93#define SII902X_TPI_I2S_SD_JUSTIFY_LEFT (0 << 2)94#define SII902X_TPI_I2S_SD_JUSTIFY_RIGHT (1 << 2)95#define SII902X_TPI_I2S_WS_POLARITY_LOW (0 << 3)96#define SII902X_TPI_I2S_WS_POLARITY_HIGH (1 << 3)97#define SII902X_TPI_I2S_MCLK_MULTIPLIER_128 (0 << 4)98#define SII902X_TPI_I2S_MCLK_MULTIPLIER_256 (1 << 4)99#define SII902X_TPI_I2S_MCLK_MULTIPLIER_384 (2 << 4)100#define SII902X_TPI_I2S_MCLK_MULTIPLIER_512 (3 << 4)101#define SII902X_TPI_I2S_MCLK_MULTIPLIER_768 (4 << 4)102#define SII902X_TPI_I2S_MCLK_MULTIPLIER_1024 (5 << 4)103#define SII902X_TPI_I2S_MCLK_MULTIPLIER_1152 (6 << 4)104#define SII902X_TPI_I2S_MCLK_MULTIPLIER_192 (7 << 4)105#define SII902X_TPI_I2S_SCK_EDGE_FALLING (0 << 7)106#define SII902X_TPI_I2S_SCK_EDGE_RISING (1 << 7)107 108#define SII902X_TPI_I2S_STRM_HDR_BASE 0x21109#define SII902X_TPI_I2S_STRM_HDR_SIZE 5110 111#define SII902X_TPI_AUDIO_CONFIG_BYTE2_REG 0x26112#define SII902X_TPI_AUDIO_CODING_STREAM_HEADER (0 << 0)113#define SII902X_TPI_AUDIO_CODING_PCM (1 << 0)114#define SII902X_TPI_AUDIO_CODING_AC3 (2 << 0)115#define SII902X_TPI_AUDIO_CODING_MPEG1 (3 << 0)116#define SII902X_TPI_AUDIO_CODING_MP3 (4 << 0)117#define SII902X_TPI_AUDIO_CODING_MPEG2 (5 << 0)118#define SII902X_TPI_AUDIO_CODING_AAC (6 << 0)119#define SII902X_TPI_AUDIO_CODING_DTS (7 << 0)120#define SII902X_TPI_AUDIO_CODING_ATRAC (8 << 0)121#define SII902X_TPI_AUDIO_MUTE_DISABLE (0 << 4)122#define SII902X_TPI_AUDIO_MUTE_ENABLE (1 << 4)123#define SII902X_TPI_AUDIO_LAYOUT_2_CHANNELS (0 << 5)124#define SII902X_TPI_AUDIO_LAYOUT_8_CHANNELS (1 << 5)125#define SII902X_TPI_AUDIO_INTERFACE_DISABLE (0 << 6)126#define SII902X_TPI_AUDIO_INTERFACE_SPDIF (1 << 6)127#define SII902X_TPI_AUDIO_INTERFACE_I2S (2 << 6)128 129#define SII902X_TPI_AUDIO_CONFIG_BYTE3_REG 0x27130#define SII902X_TPI_AUDIO_FREQ_STREAM (0 << 3)131#define SII902X_TPI_AUDIO_FREQ_32KHZ (1 << 3)132#define SII902X_TPI_AUDIO_FREQ_44KHZ (2 << 3)133#define SII902X_TPI_AUDIO_FREQ_48KHZ (3 << 3)134#define SII902X_TPI_AUDIO_FREQ_88KHZ (4 << 3)135#define SII902X_TPI_AUDIO_FREQ_96KHZ (5 << 3)136#define SII902X_TPI_AUDIO_FREQ_176KHZ (6 << 3)137#define SII902X_TPI_AUDIO_FREQ_192KHZ (7 << 3)138#define SII902X_TPI_AUDIO_SAMPLE_SIZE_STREAM (0 << 6)139#define SII902X_TPI_AUDIO_SAMPLE_SIZE_16 (1 << 6)140#define SII902X_TPI_AUDIO_SAMPLE_SIZE_20 (2 << 6)141#define SII902X_TPI_AUDIO_SAMPLE_SIZE_24 (3 << 6)142 143#define SII902X_TPI_AUDIO_CONFIG_BYTE4_REG 0x28144 145#define SII902X_INT_ENABLE 0x3c146#define SII902X_INT_STATUS 0x3d147#define SII902X_HOTPLUG_EVENT BIT(0)148#define SII902X_PLUGGED_STATUS BIT(2)149 150#define SII902X_REG_TPI_RQB 0xc7151 152/* Indirect internal register access */153#define SII902X_IND_SET_PAGE 0xbc154#define SII902X_IND_OFFSET 0xbd155#define SII902X_IND_VALUE 0xbe156 157#define SII902X_TPI_MISC_INFOFRAME_BASE 0xbf158#define SII902X_TPI_MISC_INFOFRAME_END 0xde159#define SII902X_TPI_MISC_INFOFRAME_SIZE \160 (SII902X_TPI_MISC_INFOFRAME_END - SII902X_TPI_MISC_INFOFRAME_BASE)161 162#define SII902X_I2C_BUS_ACQUISITION_TIMEOUT_MS 500163 164#define SII902X_AUDIO_PORT_INDEX 3165 166/*167 * The maximum resolution supported by the HDMI bridge is 1080p@60Hz168 * and 1920x1200 requiring a pixel clock of 165MHz and the minimum169 * resolution supported is 480p@60Hz requiring a pixel clock of 25MHz170 */171#define SII902X_MIN_PIXEL_CLOCK_KHZ 25000172#define SII902X_MAX_PIXEL_CLOCK_KHZ 165000173 174struct sii902x {175 struct i2c_client *i2c;176 struct regmap *regmap;177 struct drm_bridge bridge;178 struct drm_bridge *next_bridge;179 struct drm_connector connector;180 struct gpio_desc *reset_gpio;181 struct i2c_mux_core *i2cmux;182 bool sink_is_hdmi;183 /*184 * Mutex protects audio and video functions from interfering185 * each other, by keeping their i2c command sequences atomic.186 */187 struct mutex mutex;188 struct sii902x_audio {189 struct platform_device *pdev;190 struct clk *mclk;191 u32 i2s_fifo_sequence[4];192 } audio;193};194 195static int sii902x_read_unlocked(struct i2c_client *i2c, u8 reg, u8 *val)196{197 union i2c_smbus_data data;198 int ret;199 200 ret = __i2c_smbus_xfer(i2c->adapter, i2c->addr, i2c->flags,201 I2C_SMBUS_READ, reg, I2C_SMBUS_BYTE_DATA, &data);202 203 if (ret < 0)204 return ret;205 206 *val = data.byte;207 return 0;208}209 210static int sii902x_write_unlocked(struct i2c_client *i2c, u8 reg, u8 val)211{212 union i2c_smbus_data data;213 214 data.byte = val;215 216 return __i2c_smbus_xfer(i2c->adapter, i2c->addr, i2c->flags,217 I2C_SMBUS_WRITE, reg, I2C_SMBUS_BYTE_DATA,218 &data);219}220 221static int sii902x_update_bits_unlocked(struct i2c_client *i2c, u8 reg, u8 mask,222 u8 val)223{224 int ret;225 u8 status;226 227 ret = sii902x_read_unlocked(i2c, reg, &status);228 if (ret)229 return ret;230 status &= ~mask;231 status |= val & mask;232 return sii902x_write_unlocked(i2c, reg, status);233}234 235static inline struct sii902x *bridge_to_sii902x(struct drm_bridge *bridge)236{237 return container_of(bridge, struct sii902x, bridge);238}239 240static inline struct sii902x *connector_to_sii902x(struct drm_connector *con)241{242 return container_of(con, struct sii902x, connector);243}244 245static void sii902x_reset(struct sii902x *sii902x)246{247 if (!sii902x->reset_gpio)248 return;249 250 gpiod_set_value_cansleep(sii902x->reset_gpio, 1);251 252 /* The datasheet says treset-min = 100us. Make it 150us to be sure. */253 usleep_range(150, 200);254 255 gpiod_set_value_cansleep(sii902x->reset_gpio, 0);256}257 258static enum drm_connector_status sii902x_detect(struct sii902x *sii902x)259{260 unsigned int status;261 262 mutex_lock(&sii902x->mutex);263 264 regmap_read(sii902x->regmap, SII902X_INT_STATUS, &status);265 266 mutex_unlock(&sii902x->mutex);267 268 return (status & SII902X_PLUGGED_STATUS) ?269 connector_status_connected : connector_status_disconnected;270}271 272static enum drm_connector_status273sii902x_connector_detect(struct drm_connector *connector, bool force)274{275 struct sii902x *sii902x = connector_to_sii902x(connector);276 277 return sii902x_detect(sii902x);278}279 280static const struct drm_connector_funcs sii902x_connector_funcs = {281 .detect = sii902x_connector_detect,282 .fill_modes = drm_helper_probe_single_connector_modes,283 .destroy = drm_connector_cleanup,284 .reset = drm_atomic_helper_connector_reset,285 .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,286 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,287};288 289static const struct drm_edid *sii902x_edid_read(struct sii902x *sii902x,290 struct drm_connector *connector)291{292 const struct drm_edid *drm_edid;293 294 mutex_lock(&sii902x->mutex);295 296 drm_edid = drm_edid_read_ddc(connector, sii902x->i2cmux->adapter[0]);297 298 mutex_unlock(&sii902x->mutex);299 300 return drm_edid;301}302 303static int sii902x_get_modes(struct drm_connector *connector)304{305 struct sii902x *sii902x = connector_to_sii902x(connector);306 const struct drm_edid *drm_edid;307 int num = 0;308 309 drm_edid = sii902x_edid_read(sii902x, connector);310 drm_edid_connector_update(connector, drm_edid);311 if (drm_edid) {312 num = drm_edid_connector_add_modes(connector);313 drm_edid_free(drm_edid);314 }315 316 sii902x->sink_is_hdmi = connector->display_info.is_hdmi;317 318 return num;319}320 321static const struct drm_connector_helper_funcs sii902x_connector_helper_funcs = {322 .get_modes = sii902x_get_modes,323};324 325static void sii902x_bridge_atomic_disable(struct drm_bridge *bridge,326 struct drm_bridge_state *old_bridge_state)327{328 struct sii902x *sii902x = bridge_to_sii902x(bridge);329 330 mutex_lock(&sii902x->mutex);331 332 regmap_update_bits(sii902x->regmap, SII902X_SYS_CTRL_DATA,333 SII902X_SYS_CTRL_PWR_DWN,334 SII902X_SYS_CTRL_PWR_DWN);335 336 mutex_unlock(&sii902x->mutex);337}338 339static void sii902x_bridge_atomic_enable(struct drm_bridge *bridge,340 struct drm_bridge_state *old_bridge_state)341{342 struct sii902x *sii902x = bridge_to_sii902x(bridge);343 344 mutex_lock(&sii902x->mutex);345 346 regmap_update_bits(sii902x->regmap, SII902X_PWR_STATE_CTRL,347 SII902X_AVI_POWER_STATE_MSK,348 SII902X_AVI_POWER_STATE_D(0));349 regmap_update_bits(sii902x->regmap, SII902X_SYS_CTRL_DATA,350 SII902X_SYS_CTRL_PWR_DWN, 0);351 352 mutex_unlock(&sii902x->mutex);353}354 355static void sii902x_bridge_mode_set(struct drm_bridge *bridge,356 const struct drm_display_mode *mode,357 const struct drm_display_mode *adj)358{359 struct sii902x *sii902x = bridge_to_sii902x(bridge);360 u8 output_mode = SII902X_SYS_CTRL_OUTPUT_DVI;361 struct regmap *regmap = sii902x->regmap;362 u8 buf[HDMI_INFOFRAME_SIZE(AVI)];363 struct hdmi_avi_infoframe frame;364 u16 pixel_clock_10kHz = adj->clock / 10;365 int ret;366 367 if (sii902x->sink_is_hdmi)368 output_mode = SII902X_SYS_CTRL_OUTPUT_HDMI;369 370 buf[0] = pixel_clock_10kHz & 0xff;371 buf[1] = pixel_clock_10kHz >> 8;372 buf[2] = drm_mode_vrefresh(adj);373 buf[3] = 0x00;374 buf[4] = adj->hdisplay;375 buf[5] = adj->hdisplay >> 8;376 buf[6] = adj->vdisplay;377 buf[7] = adj->vdisplay >> 8;378 buf[8] = SII902X_TPI_CLK_RATIO_1X | SII902X_TPI_AVI_PIXEL_REP_NONE |379 SII902X_TPI_AVI_PIXEL_REP_BUS_24BIT;380 buf[9] = SII902X_TPI_AVI_INPUT_RANGE_AUTO |381 SII902X_TPI_AVI_INPUT_COLORSPACE_RGB;382 383 mutex_lock(&sii902x->mutex);384 385 ret = regmap_update_bits(sii902x->regmap, SII902X_SYS_CTRL_DATA,386 SII902X_SYS_CTRL_OUTPUT_MODE, output_mode);387 if (ret)388 goto out;389 390 ret = regmap_bulk_write(regmap, SII902X_TPI_VIDEO_DATA, buf, 10);391 if (ret)392 goto out;393 394 ret = drm_hdmi_avi_infoframe_from_display_mode(&frame,395 &sii902x->connector, adj);396 if (ret < 0) {397 DRM_ERROR("couldn't fill AVI infoframe\n");398 goto out;399 }400 401 ret = hdmi_avi_infoframe_pack(&frame, buf, sizeof(buf));402 if (ret < 0) {403 DRM_ERROR("failed to pack AVI infoframe: %d\n", ret);404 goto out;405 }406 407 /* Do not send the infoframe header, but keep the CRC field. */408 regmap_bulk_write(regmap, SII902X_TPI_AVI_INFOFRAME,409 buf + HDMI_INFOFRAME_HEADER_SIZE - 1,410 HDMI_AVI_INFOFRAME_SIZE + 1);411 412out:413 mutex_unlock(&sii902x->mutex);414}415 416static int sii902x_bridge_attach(struct drm_bridge *bridge,417 enum drm_bridge_attach_flags flags)418{419 struct sii902x *sii902x = bridge_to_sii902x(bridge);420 u32 bus_format = MEDIA_BUS_FMT_RGB888_1X24;421 struct drm_device *drm = bridge->dev;422 int ret;423 424 if (flags & DRM_BRIDGE_ATTACH_NO_CONNECTOR)425 return drm_bridge_attach(bridge->encoder, sii902x->next_bridge,426 bridge, flags);427 428 drm_connector_helper_add(&sii902x->connector,429 &sii902x_connector_helper_funcs);430 431 if (!drm_core_check_feature(drm, DRIVER_ATOMIC)) {432 dev_err(&sii902x->i2c->dev,433 "sii902x driver is only compatible with DRM devices supporting atomic updates\n");434 return -ENOTSUPP;435 }436 437 ret = drm_connector_init(drm, &sii902x->connector,438 &sii902x_connector_funcs,439 DRM_MODE_CONNECTOR_HDMIA);440 if (ret)441 return ret;442 443 if (sii902x->i2c->irq > 0)444 sii902x->connector.polled = DRM_CONNECTOR_POLL_HPD;445 else446 sii902x->connector.polled = DRM_CONNECTOR_POLL_CONNECT;447 448 ret = drm_display_info_set_bus_formats(&sii902x->connector.display_info,449 &bus_format, 1);450 if (ret)451 return ret;452 453 drm_connector_attach_encoder(&sii902x->connector, bridge->encoder);454 455 return 0;456}457 458static enum drm_connector_status sii902x_bridge_detect(struct drm_bridge *bridge)459{460 struct sii902x *sii902x = bridge_to_sii902x(bridge);461 462 return sii902x_detect(sii902x);463}464 465static const struct drm_edid *sii902x_bridge_edid_read(struct drm_bridge *bridge,466 struct drm_connector *connector)467{468 struct sii902x *sii902x = bridge_to_sii902x(bridge);469 470 return sii902x_edid_read(sii902x, connector);471}472 473static u32 *sii902x_bridge_atomic_get_input_bus_fmts(struct drm_bridge *bridge,474 struct drm_bridge_state *bridge_state,475 struct drm_crtc_state *crtc_state,476 struct drm_connector_state *conn_state,477 u32 output_fmt,478 unsigned int *num_input_fmts)479{480 u32 *input_fmts;481 482 *num_input_fmts = 0;483 484 input_fmts = kcalloc(1, sizeof(*input_fmts), GFP_KERNEL);485 if (!input_fmts)486 return NULL;487 488 input_fmts[0] = MEDIA_BUS_FMT_RGB888_1X24;489 *num_input_fmts = 1;490 491 return input_fmts;492}493 494static int sii902x_bridge_atomic_check(struct drm_bridge *bridge,495 struct drm_bridge_state *bridge_state,496 struct drm_crtc_state *crtc_state,497 struct drm_connector_state *conn_state)498{499 if (crtc_state->mode.clock < SII902X_MIN_PIXEL_CLOCK_KHZ ||500 crtc_state->mode.clock > SII902X_MAX_PIXEL_CLOCK_KHZ)501 return -EINVAL;502 503 /*504 * There might be flags negotiation supported in future but505 * set the bus flags in atomic_check statically for now.506 */507 bridge_state->input_bus_cfg.flags = bridge->timings->input_bus_flags;508 509 return 0;510}511 512static enum drm_mode_status513sii902x_bridge_mode_valid(struct drm_bridge *bridge,514 const struct drm_display_info *info,515 const struct drm_display_mode *mode)516{517 if (mode->clock < SII902X_MIN_PIXEL_CLOCK_KHZ)518 return MODE_CLOCK_LOW;519 520 if (mode->clock > SII902X_MAX_PIXEL_CLOCK_KHZ)521 return MODE_CLOCK_HIGH;522 523 return MODE_OK;524}525 526static const struct drm_bridge_funcs sii902x_bridge_funcs = {527 .attach = sii902x_bridge_attach,528 .mode_set = sii902x_bridge_mode_set,529 .atomic_disable = sii902x_bridge_atomic_disable,530 .atomic_enable = sii902x_bridge_atomic_enable,531 .detect = sii902x_bridge_detect,532 .edid_read = sii902x_bridge_edid_read,533 .atomic_reset = drm_atomic_helper_bridge_reset,534 .atomic_duplicate_state = drm_atomic_helper_bridge_duplicate_state,535 .atomic_destroy_state = drm_atomic_helper_bridge_destroy_state,536 .atomic_get_input_bus_fmts = sii902x_bridge_atomic_get_input_bus_fmts,537 .atomic_check = sii902x_bridge_atomic_check,538 .mode_valid = sii902x_bridge_mode_valid,539};540 541static int sii902x_mute(struct sii902x *sii902x, bool mute)542{543 struct device *dev = &sii902x->i2c->dev;544 unsigned int val = mute ? SII902X_TPI_AUDIO_MUTE_ENABLE :545 SII902X_TPI_AUDIO_MUTE_DISABLE;546 547 dev_dbg(dev, "%s: %s\n", __func__, mute ? "Muted" : "Unmuted");548 549 return regmap_update_bits(sii902x->regmap,550 SII902X_TPI_AUDIO_CONFIG_BYTE2_REG,551 SII902X_TPI_AUDIO_MUTE_ENABLE, val);552}553 554static const int sii902x_mclk_div_table[] = {555 128, 256, 384, 512, 768, 1024, 1152, 192 };556 557static int sii902x_select_mclk_div(u8 *i2s_config_reg, unsigned int rate,558 unsigned int mclk)559{560 int div = mclk / rate;561 int distance = 100000;562 u8 i, nearest = 0;563 564 for (i = 0; i < ARRAY_SIZE(sii902x_mclk_div_table); i++) {565 unsigned int d = abs(div - sii902x_mclk_div_table[i]);566 567 if (d >= distance)568 continue;569 570 nearest = i;571 distance = d;572 if (d == 0)573 break;574 }575 576 *i2s_config_reg |= nearest << 4;577 578 return sii902x_mclk_div_table[nearest];579}580 581static const struct sii902x_sample_freq {582 u32 freq;583 u8 val;584} sii902x_sample_freq[] = {585 { .freq = 32000, .val = SII902X_TPI_AUDIO_FREQ_32KHZ },586 { .freq = 44000, .val = SII902X_TPI_AUDIO_FREQ_44KHZ },587 { .freq = 48000, .val = SII902X_TPI_AUDIO_FREQ_48KHZ },588 { .freq = 88000, .val = SII902X_TPI_AUDIO_FREQ_88KHZ },589 { .freq = 96000, .val = SII902X_TPI_AUDIO_FREQ_96KHZ },590 { .freq = 176000, .val = SII902X_TPI_AUDIO_FREQ_176KHZ },591 { .freq = 192000, .val = SII902X_TPI_AUDIO_FREQ_192KHZ },592};593 594static int sii902x_audio_hw_params(struct device *dev, void *data,595 struct hdmi_codec_daifmt *daifmt,596 struct hdmi_codec_params *params)597{598 struct sii902x *sii902x = dev_get_drvdata(dev);599 u8 i2s_config_reg = SII902X_TPI_I2S_SD_DIRECTION_MSB_FIRST;600 u8 config_byte2_reg = (SII902X_TPI_AUDIO_INTERFACE_I2S |601 SII902X_TPI_AUDIO_MUTE_ENABLE |602 SII902X_TPI_AUDIO_CODING_PCM);603 u8 config_byte3_reg = 0;604 u8 infoframe_buf[HDMI_INFOFRAME_SIZE(AUDIO)];605 unsigned long mclk_rate;606 int i, ret;607 608 if (daifmt->bit_clk_provider || daifmt->frame_clk_provider) {609 dev_dbg(dev, "%s: I2S clock provider mode not supported\n",610 __func__);611 return -EINVAL;612 }613 614 switch (daifmt->fmt) {615 case HDMI_I2S:616 i2s_config_reg |= SII902X_TPI_I2S_FIRST_BIT_SHIFT_YES |617 SII902X_TPI_I2S_SD_JUSTIFY_LEFT;618 break;619 case HDMI_RIGHT_J:620 i2s_config_reg |= SII902X_TPI_I2S_SD_JUSTIFY_RIGHT;621 break;622 case HDMI_LEFT_J:623 i2s_config_reg |= SII902X_TPI_I2S_SD_JUSTIFY_LEFT;624 break;625 default:626 dev_dbg(dev, "%s: Unsupported i2s format %u\n", __func__,627 daifmt->fmt);628 return -EINVAL;629 }630 631 if (daifmt->bit_clk_inv)632 i2s_config_reg |= SII902X_TPI_I2S_SCK_EDGE_FALLING;633 else634 i2s_config_reg |= SII902X_TPI_I2S_SCK_EDGE_RISING;635 636 if (daifmt->frame_clk_inv)637 i2s_config_reg |= SII902X_TPI_I2S_WS_POLARITY_LOW;638 else639 i2s_config_reg |= SII902X_TPI_I2S_WS_POLARITY_HIGH;640 641 if (params->channels > 2)642 config_byte2_reg |= SII902X_TPI_AUDIO_LAYOUT_8_CHANNELS;643 else644 config_byte2_reg |= SII902X_TPI_AUDIO_LAYOUT_2_CHANNELS;645 646 switch (params->sample_width) {647 case 16:648 config_byte3_reg |= SII902X_TPI_AUDIO_SAMPLE_SIZE_16;649 break;650 case 20:651 config_byte3_reg |= SII902X_TPI_AUDIO_SAMPLE_SIZE_20;652 break;653 case 24:654 case 32:655 config_byte3_reg |= SII902X_TPI_AUDIO_SAMPLE_SIZE_24;656 break;657 default:658 dev_err(dev, "%s: Unsupported sample width %u\n", __func__,659 params->sample_width);660 return -EINVAL;661 }662 663 for (i = 0; i < ARRAY_SIZE(sii902x_sample_freq); i++) {664 if (params->sample_rate == sii902x_sample_freq[i].freq) {665 config_byte3_reg |= sii902x_sample_freq[i].val;666 break;667 }668 }669 670 ret = clk_prepare_enable(sii902x->audio.mclk);671 if (ret) {672 dev_err(dev, "Enabling mclk failed: %d\n", ret);673 return ret;674 }675 676 if (sii902x->audio.mclk) {677 mclk_rate = clk_get_rate(sii902x->audio.mclk);678 ret = sii902x_select_mclk_div(&i2s_config_reg,679 params->sample_rate, mclk_rate);680 if (mclk_rate != ret * params->sample_rate)681 dev_dbg(dev, "Inaccurate reference clock (%ld/%d != %u)\n",682 mclk_rate, ret, params->sample_rate);683 }684 685 mutex_lock(&sii902x->mutex);686 687 ret = regmap_write(sii902x->regmap,688 SII902X_TPI_AUDIO_CONFIG_BYTE2_REG,689 config_byte2_reg);690 if (ret < 0)691 goto out;692 693 ret = regmap_write(sii902x->regmap, SII902X_TPI_I2S_INPUT_CONFIG_REG,694 i2s_config_reg);695 if (ret)696 goto out;697 698 for (i = 0; i < ARRAY_SIZE(sii902x->audio.i2s_fifo_sequence) &&699 sii902x->audio.i2s_fifo_sequence[i]; i++)700 regmap_write(sii902x->regmap,701 SII902X_TPI_I2S_ENABLE_MAPPING_REG,702 sii902x->audio.i2s_fifo_sequence[i]);703 704 ret = regmap_write(sii902x->regmap, SII902X_TPI_AUDIO_CONFIG_BYTE3_REG,705 config_byte3_reg);706 if (ret)707 goto out;708 709 ret = regmap_bulk_write(sii902x->regmap, SII902X_TPI_I2S_STRM_HDR_BASE,710 params->iec.status,711 min((size_t) SII902X_TPI_I2S_STRM_HDR_SIZE,712 sizeof(params->iec.status)));713 if (ret)714 goto out;715 716 ret = hdmi_audio_infoframe_pack(¶ms->cea, infoframe_buf,717 sizeof(infoframe_buf));718 if (ret < 0) {719 dev_err(dev, "%s: Failed to pack audio infoframe: %d\n",720 __func__, ret);721 goto out;722 }723 724 ret = regmap_bulk_write(sii902x->regmap,725 SII902X_TPI_MISC_INFOFRAME_BASE,726 infoframe_buf,727 min(ret, SII902X_TPI_MISC_INFOFRAME_SIZE));728 if (ret)729 goto out;730 731 /* Decode Level 0 Packets */732 ret = regmap_write(sii902x->regmap, SII902X_IND_SET_PAGE, 0x02);733 if (ret)734 goto out;735 736 ret = regmap_write(sii902x->regmap, SII902X_IND_OFFSET, 0x24);737 if (ret)738 goto out;739 740 ret = regmap_write(sii902x->regmap, SII902X_IND_VALUE, 0x02);741 if (ret)742 goto out;743 744 dev_dbg(dev, "%s: hdmi audio enabled\n", __func__);745out:746 mutex_unlock(&sii902x->mutex);747 748 if (ret) {749 clk_disable_unprepare(sii902x->audio.mclk);750 dev_err(dev, "%s: hdmi audio enable failed: %d\n", __func__,751 ret);752 }753 754 return ret;755}756 757static void sii902x_audio_shutdown(struct device *dev, void *data)758{759 struct sii902x *sii902x = dev_get_drvdata(dev);760 761 mutex_lock(&sii902x->mutex);762 763 regmap_write(sii902x->regmap, SII902X_TPI_AUDIO_CONFIG_BYTE2_REG,764 SII902X_TPI_AUDIO_INTERFACE_DISABLE);765 766 mutex_unlock(&sii902x->mutex);767 768 clk_disable_unprepare(sii902x->audio.mclk);769}770 771static int sii902x_audio_mute(struct device *dev, void *data,772 bool enable, int direction)773{774 struct sii902x *sii902x = dev_get_drvdata(dev);775 776 mutex_lock(&sii902x->mutex);777 778 sii902x_mute(sii902x, enable);779 780 mutex_unlock(&sii902x->mutex);781 782 return 0;783}784 785static int sii902x_audio_get_eld(struct device *dev, void *data,786 uint8_t *buf, size_t len)787{788 struct sii902x *sii902x = dev_get_drvdata(dev);789 790 mutex_lock(&sii902x->mutex);791 792 memcpy(buf, sii902x->connector.eld,793 min(sizeof(sii902x->connector.eld), len));794 795 mutex_unlock(&sii902x->mutex);796 797 return 0;798}799 800static int sii902x_audio_get_dai_id(struct snd_soc_component *component,801 struct device_node *endpoint)802{803 struct of_endpoint of_ep;804 int ret;805 806 ret = of_graph_parse_endpoint(endpoint, &of_ep);807 if (ret < 0)808 return ret;809 810 /*811 * HDMI sound should be located at reg = <3>812 * Return expected DAI index 0.813 */814 if (of_ep.port == SII902X_AUDIO_PORT_INDEX)815 return 0;816 817 return -EINVAL;818}819 820static const struct hdmi_codec_ops sii902x_audio_codec_ops = {821 .hw_params = sii902x_audio_hw_params,822 .audio_shutdown = sii902x_audio_shutdown,823 .mute_stream = sii902x_audio_mute,824 .get_eld = sii902x_audio_get_eld,825 .get_dai_id = sii902x_audio_get_dai_id,826 .no_capture_mute = 1,827};828 829static int sii902x_audio_codec_init(struct sii902x *sii902x,830 struct device *dev)831{832 static const u8 audio_fifo_id[] = {833 SII902X_TPI_I2S_CONFIG_FIFO0,834 SII902X_TPI_I2S_CONFIG_FIFO1,835 SII902X_TPI_I2S_CONFIG_FIFO2,836 SII902X_TPI_I2S_CONFIG_FIFO3,837 };838 static const u8 i2s_lane_id[] = {839 SII902X_TPI_I2S_SELECT_SD0,840 SII902X_TPI_I2S_SELECT_SD1,841 SII902X_TPI_I2S_SELECT_SD2,842 SII902X_TPI_I2S_SELECT_SD3,843 };844 struct hdmi_codec_pdata codec_data = {845 .ops = &sii902x_audio_codec_ops,846 .i2s = 1, /* Only i2s support for now. */847 .spdif = 0,848 .max_i2s_channels = 0,849 };850 u8 lanes[4];851 int num_lanes, i;852 853 if (!of_property_read_bool(dev->of_node, "#sound-dai-cells")) {854 dev_dbg(dev, "%s: No \"#sound-dai-cells\", no audio\n",855 __func__);856 return 0;857 }858 859 num_lanes = of_property_read_variable_u8_array(dev->of_node,860 "sil,i2s-data-lanes",861 lanes, 1,862 ARRAY_SIZE(lanes));863 864 if (num_lanes == -EINVAL) {865 dev_dbg(dev,866 "%s: No \"sil,i2s-data-lanes\", use default <0>\n",867 __func__);868 num_lanes = 1;869 lanes[0] = 0;870 } else if (num_lanes < 0) {871 dev_err(dev,872 "%s: Error gettin \"sil,i2s-data-lanes\": %d\n",873 __func__, num_lanes);874 return num_lanes;875 }876 codec_data.max_i2s_channels = 2 * num_lanes;877 878 for (i = 0; i < num_lanes; i++)879 sii902x->audio.i2s_fifo_sequence[i] |= audio_fifo_id[i] |880 i2s_lane_id[lanes[i]] | SII902X_TPI_I2S_FIFO_ENABLE;881 882 sii902x->audio.mclk = devm_clk_get_optional(dev, "mclk");883 if (IS_ERR(sii902x->audio.mclk)) {884 dev_err(dev, "%s: No clock (audio mclk) found: %ld\n",885 __func__, PTR_ERR(sii902x->audio.mclk));886 return PTR_ERR(sii902x->audio.mclk);887 }888 889 sii902x->audio.pdev = platform_device_register_data(890 dev, HDMI_CODEC_DRV_NAME, PLATFORM_DEVID_AUTO,891 &codec_data, sizeof(codec_data));892 893 return PTR_ERR_OR_ZERO(sii902x->audio.pdev);894}895 896static const struct regmap_range sii902x_volatile_ranges[] = {897 { .range_min = 0, .range_max = 0xff },898};899 900static const struct regmap_access_table sii902x_volatile_table = {901 .yes_ranges = sii902x_volatile_ranges,902 .n_yes_ranges = ARRAY_SIZE(sii902x_volatile_ranges),903};904 905static const struct regmap_config sii902x_regmap_config = {906 .reg_bits = 8,907 .val_bits = 8,908 .disable_locking = true, /* struct sii902x mutex should be enough */909 .max_register = SII902X_TPI_MISC_INFOFRAME_END,910 .volatile_table = &sii902x_volatile_table,911 .cache_type = REGCACHE_NONE,912};913 914static irqreturn_t sii902x_interrupt(int irq, void *data)915{916 struct sii902x *sii902x = data;917 unsigned int status = 0;918 919 mutex_lock(&sii902x->mutex);920 921 regmap_read(sii902x->regmap, SII902X_INT_STATUS, &status);922 regmap_write(sii902x->regmap, SII902X_INT_STATUS, status);923 924 mutex_unlock(&sii902x->mutex);925 926 if ((status & SII902X_HOTPLUG_EVENT) && sii902x->bridge.dev) {927 drm_helper_hpd_irq_event(sii902x->bridge.dev);928 drm_bridge_hpd_notify(&sii902x->bridge, (status & SII902X_PLUGGED_STATUS)929 ? connector_status_connected930 : connector_status_disconnected);931 }932 933 return IRQ_HANDLED;934}935 936/*937 * The purpose of sii902x_i2c_bypass_select is to enable the pass through938 * mode of the HDMI transmitter. Do not use regmap from within this function,939 * only use sii902x_*_unlocked functions to read/modify/write registers.940 * We are holding the parent adapter lock here, keep this in mind before941 * adding more i2c transactions.942 *943 * Also, since SII902X_SYS_CTRL_DATA is used with regmap_update_bits elsewhere944 * in this driver, we need to make sure that we only touch 0x1A[2:1] from945 * within sii902x_i2c_bypass_select and sii902x_i2c_bypass_deselect, and that946 * we leave the remaining bits as we have found them.947 */948static int sii902x_i2c_bypass_select(struct i2c_mux_core *mux, u32 chan_id)949{950 struct sii902x *sii902x = i2c_mux_priv(mux);951 struct device *dev = &sii902x->i2c->dev;952 unsigned long timeout;953 u8 status;954 int ret;955 956 ret = sii902x_update_bits_unlocked(sii902x->i2c, SII902X_SYS_CTRL_DATA,957 SII902X_SYS_CTRL_DDC_BUS_REQ,958 SII902X_SYS_CTRL_DDC_BUS_REQ);959 if (ret)960 return ret;961 962 timeout = jiffies +963 msecs_to_jiffies(SII902X_I2C_BUS_ACQUISITION_TIMEOUT_MS);964 do {965 ret = sii902x_read_unlocked(sii902x->i2c, SII902X_SYS_CTRL_DATA,966 &status);967 if (ret)968 return ret;969 } while (!(status & SII902X_SYS_CTRL_DDC_BUS_GRTD) &&970 time_before(jiffies, timeout));971 972 if (!(status & SII902X_SYS_CTRL_DDC_BUS_GRTD)) {973 dev_err(dev, "Failed to acquire the i2c bus\n");974 return -ETIMEDOUT;975 }976 977 return sii902x_write_unlocked(sii902x->i2c, SII902X_SYS_CTRL_DATA,978 status);979}980 981/*982 * The purpose of sii902x_i2c_bypass_deselect is to disable the pass through983 * mode of the HDMI transmitter. Do not use regmap from within this function,984 * only use sii902x_*_unlocked functions to read/modify/write registers.985 * We are holding the parent adapter lock here, keep this in mind before986 * adding more i2c transactions.987 *988 * Also, since SII902X_SYS_CTRL_DATA is used with regmap_update_bits elsewhere989 * in this driver, we need to make sure that we only touch 0x1A[2:1] from990 * within sii902x_i2c_bypass_select and sii902x_i2c_bypass_deselect, and that991 * we leave the remaining bits as we have found them.992 */993static int sii902x_i2c_bypass_deselect(struct i2c_mux_core *mux, u32 chan_id)994{995 struct sii902x *sii902x = i2c_mux_priv(mux);996 struct device *dev = &sii902x->i2c->dev;997 unsigned long timeout;998 unsigned int retries;999 u8 status;1000 int ret;1001 1002 /*1003 * When the HDMI transmitter is in pass through mode, we need an1004 * (undocumented) additional delay between STOP and START conditions1005 * to guarantee the bus won't get stuck.1006 */1007 udelay(30);1008 1009 /*1010 * Sometimes the I2C bus can stall after failure to use the1011 * EDID channel. Retry a few times to see if things clear1012 * up, else continue anyway.1013 */1014 retries = 5;1015 do {1016 ret = sii902x_read_unlocked(sii902x->i2c, SII902X_SYS_CTRL_DATA,1017 &status);1018 retries--;1019 } while (ret && retries);1020 if (ret) {1021 dev_err(dev, "failed to read status (%d)\n", ret);1022 return ret;1023 }1024 1025 ret = sii902x_update_bits_unlocked(sii902x->i2c, SII902X_SYS_CTRL_DATA,1026 SII902X_SYS_CTRL_DDC_BUS_REQ |1027 SII902X_SYS_CTRL_DDC_BUS_GRTD, 0);1028 if (ret)1029 return ret;1030 1031 timeout = jiffies +1032 msecs_to_jiffies(SII902X_I2C_BUS_ACQUISITION_TIMEOUT_MS);1033 do {1034 ret = sii902x_read_unlocked(sii902x->i2c, SII902X_SYS_CTRL_DATA,1035 &status);1036 if (ret)1037 return ret;1038 } while (status & (SII902X_SYS_CTRL_DDC_BUS_REQ |1039 SII902X_SYS_CTRL_DDC_BUS_GRTD) &&1040 time_before(jiffies, timeout));1041 1042 if (status & (SII902X_SYS_CTRL_DDC_BUS_REQ |1043 SII902X_SYS_CTRL_DDC_BUS_GRTD)) {1044 dev_err(dev, "failed to release the i2c bus\n");1045 return -ETIMEDOUT;1046 }1047 1048 return 0;1049}1050 1051static const struct drm_bridge_timings default_sii902x_timings = {1052 .input_bus_flags = DRM_BUS_FLAG_PIXDATA_SAMPLE_NEGEDGE1053 | DRM_BUS_FLAG_SYNC_SAMPLE_NEGEDGE1054 | DRM_BUS_FLAG_DE_HIGH,1055};1056 1057static int sii902x_init(struct sii902x *sii902x)1058{1059 struct device *dev = &sii902x->i2c->dev;1060 unsigned int status = 0;1061 u8 chipid[4];1062 int ret;1063 1064 sii902x_reset(sii902x);1065 1066 ret = regmap_write(sii902x->regmap, SII902X_REG_TPI_RQB, 0x0);1067 if (ret)1068 return ret;1069 1070 ret = regmap_bulk_read(sii902x->regmap, SII902X_REG_CHIPID(0),1071 &chipid, 4);1072 if (ret) {1073 dev_err(dev, "regmap_read failed %d\n", ret);1074 return ret;1075 }1076 1077 if (chipid[0] != 0xb0) {1078 dev_err(dev, "Invalid chipid: %02x (expecting 0xb0)\n",1079 chipid[0]);1080 return -EINVAL;1081 }1082 1083 /* Clear all pending interrupts */1084 regmap_read(sii902x->regmap, SII902X_INT_STATUS, &status);1085 regmap_write(sii902x->regmap, SII902X_INT_STATUS, status);1086 1087 if (sii902x->i2c->irq > 0) {1088 regmap_write(sii902x->regmap, SII902X_INT_ENABLE,1089 SII902X_HOTPLUG_EVENT);1090 1091 ret = devm_request_threaded_irq(dev, sii902x->i2c->irq, NULL,1092 sii902x_interrupt,1093 IRQF_ONESHOT, dev_name(dev),1094 sii902x);1095 if (ret)1096 return ret;1097 }1098 1099 ret = sii902x_audio_codec_init(sii902x, dev);1100 if (ret)1101 return ret;1102 1103 i2c_set_clientdata(sii902x->i2c, sii902x);1104 1105 sii902x->i2cmux = i2c_mux_alloc(sii902x->i2c->adapter, dev,1106 1, 0, I2C_MUX_GATE,1107 sii902x_i2c_bypass_select,1108 sii902x_i2c_bypass_deselect);1109 if (!sii902x->i2cmux) {1110 ret = -ENOMEM;1111 goto err_unreg_audio;1112 }1113 1114 sii902x->i2cmux->priv = sii902x;1115 ret = i2c_mux_add_adapter(sii902x->i2cmux, 0, 0);1116 if (ret)1117 goto err_unreg_audio;1118 1119 sii902x->bridge.funcs = &sii902x_bridge_funcs;1120 sii902x->bridge.of_node = dev->of_node;1121 sii902x->bridge.timings = &default_sii902x_timings;1122 sii902x->bridge.ops = DRM_BRIDGE_OP_DETECT | DRM_BRIDGE_OP_EDID;1123 1124 if (sii902x->i2c->irq > 0)1125 sii902x->bridge.ops |= DRM_BRIDGE_OP_HPD;1126 1127 drm_bridge_add(&sii902x->bridge);1128 1129 return 0;1130 1131err_unreg_audio:1132 if (!PTR_ERR_OR_ZERO(sii902x->audio.pdev))1133 platform_device_unregister(sii902x->audio.pdev);1134 1135 return ret;1136}1137 1138static int sii902x_probe(struct i2c_client *client)1139{1140 struct device *dev = &client->dev;1141 struct device_node *endpoint;1142 struct sii902x *sii902x;1143 static const char * const supplies[] = {"iovcc", "cvcc12"};1144 int ret;1145 1146 ret = i2c_check_functionality(client->adapter,1147 I2C_FUNC_SMBUS_BYTE_DATA);1148 if (!ret) {1149 dev_err(dev, "I2C adapter not suitable\n");1150 return -EIO;1151 }1152 1153 sii902x = devm_kzalloc(dev, sizeof(*sii902x), GFP_KERNEL);1154 if (!sii902x)1155 return -ENOMEM;1156 1157 sii902x->i2c = client;1158 sii902x->regmap = devm_regmap_init_i2c(client, &sii902x_regmap_config);1159 if (IS_ERR(sii902x->regmap))1160 return PTR_ERR(sii902x->regmap);1161 1162 sii902x->reset_gpio = devm_gpiod_get_optional(dev, "reset",1163 GPIOD_OUT_LOW);1164 if (IS_ERR(sii902x->reset_gpio)) {1165 dev_err(dev, "Failed to retrieve/request reset gpio: %ld\n",1166 PTR_ERR(sii902x->reset_gpio));1167 return PTR_ERR(sii902x->reset_gpio);1168 }1169 1170 endpoint = of_graph_get_endpoint_by_regs(dev->of_node, 1, -1);1171 if (endpoint) {1172 struct device_node *remote = of_graph_get_remote_port_parent(endpoint);1173 1174 of_node_put(endpoint);1175 if (!remote) {1176 dev_err(dev, "Endpoint in port@1 unconnected\n");1177 return -ENODEV;1178 }1179 1180 if (!of_device_is_available(remote)) {1181 dev_err(dev, "port@1 remote device is disabled\n");1182 of_node_put(remote);1183 return -ENODEV;1184 }1185 1186 sii902x->next_bridge = of_drm_find_bridge(remote);1187 of_node_put(remote);1188 if (!sii902x->next_bridge)1189 return dev_err_probe(dev, -EPROBE_DEFER,1190 "Failed to find remote bridge\n");1191 }1192 1193 mutex_init(&sii902x->mutex);1194 1195 ret = devm_regulator_bulk_get_enable(dev, ARRAY_SIZE(supplies), supplies);1196 if (ret < 0)1197 return dev_err_probe(dev, ret, "Failed to enable supplies");1198 1199 return sii902x_init(sii902x);1200}1201 1202static void sii902x_remove(struct i2c_client *client)1203{1204 struct sii902x *sii902x = i2c_get_clientdata(client);1205 1206 drm_bridge_remove(&sii902x->bridge);1207 i2c_mux_del_adapters(sii902x->i2cmux);1208 1209 if (!PTR_ERR_OR_ZERO(sii902x->audio.pdev))1210 platform_device_unregister(sii902x->audio.pdev);1211}1212 1213static const struct of_device_id sii902x_dt_ids[] = {1214 { .compatible = "sil,sii9022", },1215 { }1216};1217MODULE_DEVICE_TABLE(of, sii902x_dt_ids);1218 1219static const struct i2c_device_id sii902x_i2c_ids[] = {1220 { "sii9022", 0 },1221 { },1222};1223MODULE_DEVICE_TABLE(i2c, sii902x_i2c_ids);1224 1225static struct i2c_driver sii902x_driver = {1226 .probe = sii902x_probe,1227 .remove = sii902x_remove,1228 .driver = {1229 .name = "sii902x",1230 .of_match_table = sii902x_dt_ids,1231 },1232 .id_table = sii902x_i2c_ids,1233};1234module_i2c_driver(sii902x_driver);1235 1236MODULE_AUTHOR("Boris Brezillon <boris.brezillon@free-electrons.com>");1237MODULE_DESCRIPTION("SII902x RGB -> HDMI bridges");1238MODULE_LICENSE("GPL");1239